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714bc55b | 1 | /* |
a0794948 | 2 | *(C) Copyright 2005-2008 Netstal Maschinen AG |
714bc55b NG |
3 | * Niklaus Giger (Niklaus.Giger@netstal.com) |
4 | * | |
5 | * See file CREDITS for list of people who contributed to this | |
6 | * project. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or | |
9 | * modify it under the terms of the GNU General Public License as | |
10 | * published by the Free Software Foundation; either version 2 of | |
11 | * the License, or (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
21 | * MA 02111-1307 USA | |
22 | */ | |
23 | ||
24 | /************************************************************************ | |
25 | * hcu4.h - configuration for HCU4 board (similar to hcu5.h) | |
26 | ***********************************************************************/ | |
27 | ||
28 | #ifndef __CONFIG_H | |
29 | #define __CONFIG_H | |
30 | ||
31 | /*----------------------------------------------------------------------- | |
32 | * High Level Configuration Options | |
33 | *----------------------------------------------------------------------*/ | |
34 | #define CONFIG_HCU4 1 /* Board is HCU4 */ | |
35 | #define CONFIG_4xx 1 /* ... PPC4xx family */ | |
714bc55b NG |
36 | #define CONFIG_405GP 1 |
37 | #define CONFIG_4xx 1 | |
c11da194 NG |
38 | #define CONFIG_HOSTNAME hcu4 |
39 | ||
40 | /* | |
41 | * Include common defines/options for all boards produced by Netstal Maschinen | |
42 | */ | |
43 | #include "netstal-common.h" | |
714bc55b NG |
44 | |
45 | #define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */ | |
46 | ||
47 | #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ | |
48 | #define CONFIG_MISC_INIT_R 1 /* Call misc_init_r */ | |
49 | ||
50 | /*----------------------------------------------------------------------- | |
51 | * Base addresses -- Note these are effective addresses where the | |
52 | * actual resources get mapped (not physical addresses) | |
53 | *----------------------------------------------------------------------*/ | |
6d0f6bcf JCPV |
54 | #define CONFIG_SYS_MONITOR_LEN (320 * 1024) /* Reserve 320 kB for Monitor */ |
55 | #define CONFIG_SYS_MALLOC_LEN (256 * 1024) /* Reserve 256 kB for malloc() */ | |
714bc55b NG |
56 | |
57 | ||
6d0f6bcf JCPV |
58 | #define CONFIG_SYS_SDRAM_BASE 0x00000000 /* _must_ be 0 */ |
59 | #define CONFIG_SYS_FLASH_BASE 0xfff80000 /* start of FLASH */ | |
60 | #define CONFIG_SYS_MONITOR_BASE TEXT_BASE | |
714bc55b NG |
61 | |
62 | /* ... with on-chip memory here (4KBytes) */ | |
6d0f6bcf JCPV |
63 | #define CONFIG_SYS_OCM_DATA_ADDR 0xF4000000 |
64 | #define CONFIG_SYS_OCM_DATA_SIZE 0x00001000 | |
714bc55b | 65 | /* Do not set up locked dcache as init ram. */ |
6d0f6bcf | 66 | #undef CONFIG_SYS_INIT_DCACHE_CS |
714bc55b NG |
67 | |
68 | /* Use the On-Chip-Memory (OCM) as a temporary stack for the startup code. */ | |
6d0f6bcf | 69 | #define CONFIG_SYS_TEMP_STACK_OCM 1 |
714bc55b | 70 | |
6d0f6bcf JCPV |
71 | #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_OCM_DATA_ADDR /* OCM */ |
72 | #define CONFIG_SYS_INIT_RAM_END CONFIG_SYS_OCM_DATA_SIZE | |
73 | #define CONFIG_SYS_GBL_DATA_SIZE 256 /* num bytes initial data */ | |
74 | #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) | |
75 | #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_POST_WORD_ADDR | |
714bc55b NG |
76 | |
77 | /*----------------------------------------------------------------------- | |
78 | * Serial Port | |
79 | *----------------------------------------------------------------------*/ | |
80 | /* | |
6d0f6bcf JCPV |
81 | * If CONFIG_SYS_EXT_SERIAL_CLOCK, then the UART divisor is 1. |
82 | * If CONFIG_SYS_405_UART_ERRATA_59, then UART divisor is 31. | |
83 | * Otherwise, UART divisor is determined by CPU Clock and CONFIG_SYS_BASE_BAUD value. | |
714bc55b NG |
84 | * The Linux BASE_BAUD define should match this configuration. |
85 | * baseBaud = cpuClock/(uartDivisor*16) | |
6d0f6bcf | 86 | * If CONFIG_SYS_405_UART_ERRATA_59 and 200MHz CPU clock, |
714bc55b NG |
87 | * set Linux BASE_BAUD to 403200. |
88 | */ | |
6d0f6bcf JCPV |
89 | #undef CONFIG_SYS_405_UART_ERRATA_59 /* 405GP/CR Rev. D silicon */ |
90 | #define CONFIG_SYS_BASE_BAUD 691200 | |
714bc55b | 91 | |
714bc55b NG |
92 | /* Set console baudrate to 9600 */ |
93 | #define CONFIG_BAUDRATE 9600 | |
94 | ||
4bd5036e NG |
95 | /*----------------------------------------------------------------------- |
96 | * Flash | |
97 | *----------------------------------------------------------------------*/ | |
98 | ||
a0794948 | 99 | /* Use common CFI driver */ |
6d0f6bcf | 100 | #define CONFIG_SYS_FLASH_CFI |
00b1883a | 101 | #define CONFIG_FLASH_CFI_DRIVER |
a0794948 NG |
102 | /* board provides its own flash_init code */ |
103 | #define CONFIG_FLASH_CFI_LEGACY 1 | |
6d0f6bcf JCPV |
104 | #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT |
105 | #define CONFIG_SYS_FLASH_LEGACY_512Kx8 1 | |
4bd5036e | 106 | |
a0794948 | 107 | /* print 'E' for empty sector on flinfo */ |
6d0f6bcf | 108 | #define CONFIG_SYS_FLASH_EMPTY_INFO |
4bd5036e | 109 | |
6d0f6bcf JCPV |
110 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ |
111 | #define CONFIG_SYS_MAX_FLASH_SECT 8 /* max number of sectors on one chip */ | |
4bd5036e | 112 | |
714bc55b NG |
113 | /*----------------------------------------------------------------------- |
114 | * Environment | |
115 | *----------------------------------------------------------------------*/ | |
116 | ||
9314cee6 | 117 | #undef CONFIG_ENV_IS_IN_NVRAM |
5a1aceb0 | 118 | #define CONFIG_ENV_IS_IN_FLASH |
93f6d725 | 119 | #undef CONFIG_ENV_IS_NOWHERE |
714bc55b | 120 | |
bb1f8b4f | 121 | #ifdef CONFIG_ENV_IS_IN_EEPROM |
714bc55b | 122 | /* Put the environment after the SDRAM configuration */ |
53677ef1 | 123 | #define PROM_SIZE 2048 |
0e8d1586 JCPV |
124 | #define CONFIG_ENV_OFFSET 512 |
125 | #define CONFIG_ENV_SIZE (PROM_SIZE-CONFIG_ENV_OFFSET) | |
714bc55b NG |
126 | #endif |
127 | ||
5a1aceb0 | 128 | #ifdef CONFIG_ENV_IS_IN_FLASH |
714bc55b | 129 | /* Put the environment in Flash */ |
0e8d1586 | 130 | #define CONFIG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */ |
6d0f6bcf | 131 | #define CONFIG_ENV_ADDR ((-CONFIG_SYS_MONITOR_LEN)-CONFIG_ENV_SECT_SIZE) |
0e8d1586 | 132 | #define CONFIG_ENV_SIZE 8*1024 /* 8 KB Environment Sector */ |
714bc55b NG |
133 | |
134 | /* Address and size of Redundant Environment Sector */ | |
0e8d1586 JCPV |
135 | #define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR-CONFIG_ENV_SECT_SIZE) |
136 | #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) | |
714bc55b NG |
137 | #endif |
138 | ||
139 | /*----------------------------------------------------------------------- | |
140 | * I2C stuff for a ATMEL AT24C16 (2kB holding ENV, we are using the | |
141 | * the first internal I2C controller of the PPC440EPx | |
142 | *----------------------------------------------------------------------*/ | |
6d0f6bcf | 143 | #define CONFIG_SYS_SPD_BUS_NUM 0 |
714bc55b | 144 | |
c11da194 | 145 | #define CONFIG_IPADDR 172.25.1.14 |
714bc55b | 146 | |
c11da194 NG |
147 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
148 | CONFIG_NETSTAL_DEF_ENV \ | |
149 | CONFIG_NETSTAL_DEF_ENV_POWERPC \ | |
714bc55b | 150 | "" |
3b3bff4c SR |
151 | |
152 | /* | |
153 | * BOOTP options | |
154 | */ | |
155 | #define CONFIG_BOOTP_BOOTFILESIZE | |
156 | #define CONFIG_BOOTP_BOOTPATH | |
157 | #define CONFIG_BOOTP_GATEWAY | |
158 | #define CONFIG_BOOTP_HOSTNAME | |
159 | ||
160 | /* | |
161 | * Command line configuration. | |
162 | */ | |
163 | #include <config_cmd_default.h> | |
164 | ||
165 | #define CONFIG_CMD_ASKENV | |
3b3bff4c SR |
166 | #define CONFIG_CMD_CACHE |
167 | #define CONFIG_CMD_DHCP | |
168 | #define CONFIG_CMD_DIAG | |
169 | #define CONFIG_CMD_EEPROM | |
170 | #define CONFIG_CMD_ELF | |
171 | #define CONFIG_CMD_FLASH | |
172 | #define CONFIG_CMD_I2C | |
173 | #define CONFIG_CMD_IMMAP | |
174 | #define CONFIG_CMD_IRQ | |
175 | #define CONFIG_CMD_MII | |
176 | #define CONFIG_CMD_NET | |
177 | #define CONFIG_CMD_PING | |
178 | #define CONFIG_CMD_REGINFO | |
179 | #define CONFIG_CMD_SDRAM | |
714bc55b NG |
180 | |
181 | /* SPD EEPROM (sdram speed config) disabled */ | |
182 | #define CONFIG_SPD_EEPROM 1 | |
183 | #define SPD_EEPROM_ADDRESS 0x50 | |
184 | ||
4bd5036e | 185 | /* POST support */ |
6d0f6bcf JCPV |
186 | #define CONFIG_POST (CONFIG_SYS_POST_MEMORY | \ |
187 | CONFIG_SYS_POST_CPU | \ | |
188 | CONFIG_SYS_POST_UART | \ | |
189 | CONFIG_SYS_POST_I2C | \ | |
190 | CONFIG_SYS_POST_CACHE | \ | |
191 | CONFIG_SYS_POST_ETHER | \ | |
192 | CONFIG_SYS_POST_SPR) | |
193 | ||
194 | #define CONFIG_SYS_POST_UART_TABLE {UART0_BASE} | |
195 | #define CONFIG_SYS_POST_WORD_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 0x4) | |
4bd5036e | 196 | #undef CONFIG_LOGBUFFER |
6d0f6bcf JCPV |
197 | #define CONFIG_SYS_POST_CACHE_ADDR 0x00800000 /* free virtual address */ |
198 | #define CONFIG_SYS_CONSOLE_IS_IN_ENV /* Otherwise it catches logbuffer as output */ | |
4bd5036e | 199 | |
714bc55b NG |
200 | /*----------------------------------------------------------------------- |
201 | * Miscellaneous configurable options | |
202 | *----------------------------------------------------------------------*/ | |
6d0f6bcf JCPV |
203 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
204 | #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ | |
3b3bff4c | 205 | #if defined(CONFIG_CMD_KGDB) |
6d0f6bcf | 206 | #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ |
714bc55b | 207 | #else |
6d0f6bcf | 208 | #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ |
714bc55b | 209 | #endif |
6d0f6bcf JCPV |
210 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ |
211 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ | |
212 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ | |
714bc55b | 213 | |
6d0f6bcf JCPV |
214 | #define CONFIG_SYS_MEMTEST_START 0x0400000 /* memtest works on */ |
215 | #define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */ | |
714bc55b NG |
216 | |
217 | ||
6d0f6bcf | 218 | #define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */ |
714bc55b NG |
219 | |
220 | /*----------------------------------------------------------------------- | |
221 | * External Bus Controller (EBC) Setup | |
222 | */ | |
223 | ||
6d0f6bcf | 224 | #define CONFIG_SYS_EBC_CFG 0x98400000 |
714bc55b | 225 | |
4bd5036e | 226 | /* Memory Bank 0 (Flash Bank 0) initialization */ |
6d0f6bcf JCPV |
227 | #define CONFIG_SYS_EBC_PB0AP 0x02005400 |
228 | #define CONFIG_SYS_EBC_PB0CR 0xFFF18000 /* BAS=0xFFF,BS=1MB,BU=R/W,BW=8bit */ | |
714bc55b | 229 | |
6d0f6bcf JCPV |
230 | #define CONFIG_SYS_EBC_PB1AP 0x03041200 |
231 | #define CONFIG_SYS_EBC_PB1CR 0x7009A000 /* BAS=,BS=MB,BU=R/W,BW=bit */ | |
714bc55b | 232 | |
6d0f6bcf JCPV |
233 | #define CONFIG_SYS_EBC_PB2AP 0x02054500 |
234 | #define CONFIG_SYS_EBC_PB2CR 0x78018000 /* BAS=,BS=MB,BU=R/W,BW=bit */ | |
714bc55b | 235 | |
6d0f6bcf JCPV |
236 | #define CONFIG_SYS_EBC_PB3AP 0x01840300 |
237 | #define CONFIG_SYS_EBC_PB3CR 0x7c0ba000 /* BAS=,BS=MB,BU=R/W,BW=bit */ | |
714bc55b | 238 | |
6d0f6bcf JCPV |
239 | #define CONFIG_SYS_EBC_PB4AP 0x01800300 |
240 | #define CONFIG_SYS_EBC_PB4CR 0x7e0ba000 /* BAS=,BS=MB,BU=R/W,BW=bit */ | |
4bd5036e | 241 | |
6d0f6bcf JCPV |
242 | #define CONFIG_SYS_GPIO0_OR 0xF27FFFFF /* GPIO value */ |
243 | #define CONFIG_SYS_GPIO0_TCR 0x7FFE0000 /* GPIO value */ | |
244 | #define CONFIG_SYS_GPIO0_ODR 0x00E897FC /* GPIO value */ | |
714bc55b NG |
245 | |
246 | /* | |
247 | * For booting Linux, the board info and command line data | |
248 | * have to be in the first 8 MB of memory, since this is | |
249 | * the maximum mapped by the Linux kernel during initialization. | |
250 | */ | |
6d0f6bcf | 251 | #define CONFIG_SYS_BOOTMAPSZ (8 << 20)/* Initial Memory map for Linux */ |
714bc55b NG |
252 | |
253 | /* Init Memory Controller: | |
254 | * | |
255 | * BR0/1 and OR0/1 (FLASH) | |
256 | */ | |
257 | ||
6d0f6bcf | 258 | #define FLASH_BASE0_PRELIM CONFIG_SYS_FLASH_BASE /* FLASH bank #0 */ |
714bc55b NG |
259 | #define FLASH_BASE1_PRELIM 0 /* FLASH bank #1 */ |
260 | ||
261 | ||
262 | /* Configuration Port location */ | |
263 | #define CONFIG_PORT_ADDR 0xF0000500 | |
264 | ||
6d0f6bcf JCPV |
265 | #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ |
266 | #ifdef CONFIG_SYS_HUSH_PARSER | |
267 | #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " | |
714bc55b NG |
268 | #endif |
269 | ||
3b3bff4c | 270 | #if defined(CONFIG_CMD_KGDB) |
714bc55b NG |
271 | #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ |
272 | #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ | |
273 | #endif | |
4bd5036e | 274 | |
714bc55b | 275 | #endif /* __CONFIG_H */ |