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714bc55b 1/*
a0794948 2 *(C) Copyright 2005-2008 Netstal Maschinen AG
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3 * Niklaus Giger (Niklaus.Giger@netstal.com)
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24/************************************************************************
25 * hcu4.h - configuration for HCU4 board (similar to hcu5.h)
26 ***********************************************************************/
27
28#ifndef __CONFIG_H
29#define __CONFIG_H
30
31/*-----------------------------------------------------------------------
32 * High Level Configuration Options
33 *----------------------------------------------------------------------*/
34#define CONFIG_HCU4 1 /* Board is HCU4 */
35#define CONFIG_4xx 1 /* ... PPC4xx family */
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36#define CONFIG_405GP 1
37#define CONFIG_4xx 1
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38#define CONFIG_HOSTNAME hcu4
39
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40#define CONFIG_SYS_TEXT_BASE 0xFFFB0000
41
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42/*
43 * Include common defines/options for all boards produced by Netstal Maschinen
44 */
45#include "netstal-common.h"
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46
47#define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */
48
49#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
50#define CONFIG_MISC_INIT_R 1 /* Call misc_init_r */
51
52/*-----------------------------------------------------------------------
53 * Base addresses -- Note these are effective addresses where the
54 * actual resources get mapped (not physical addresses)
55*----------------------------------------------------------------------*/
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56#define CONFIG_SYS_MONITOR_LEN (320 * 1024) /* Reserve 320 kB for Monitor */
57#define CONFIG_SYS_MALLOC_LEN (256 * 1024) /* Reserve 256 kB for malloc() */
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58
59
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60#define CONFIG_SYS_SDRAM_BASE 0x00000000 /* _must_ be 0 */
61#define CONFIG_SYS_FLASH_BASE 0xfff80000 /* start of FLASH */
14d0a02a 62#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
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63
64/* ... with on-chip memory here (4KBytes) */
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65#define CONFIG_SYS_OCM_DATA_ADDR 0xF4000000
66#define CONFIG_SYS_OCM_DATA_SIZE 0x00001000
714bc55b 67/* Do not set up locked dcache as init ram. */
6d0f6bcf 68#undef CONFIG_SYS_INIT_DCACHE_CS
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69
70/* Use the On-Chip-Memory (OCM) as a temporary stack for the startup code. */
6d0f6bcf 71#define CONFIG_SYS_TEMP_STACK_OCM 1
714bc55b 72
6d0f6bcf 73#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_OCM_DATA_ADDR /* OCM */
553f0982 74#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_OCM_DATA_SIZE
25ddd1fb 75#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
800eb096 76#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
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77
78/*-----------------------------------------------------------------------
79 * Serial Port
80 *----------------------------------------------------------------------*/
81/*
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82 * If CONFIG_SYS_EXT_SERIAL_CLOCK, then the UART divisor is 1.
83 * If CONFIG_SYS_405_UART_ERRATA_59, then UART divisor is 31.
84 * Otherwise, UART divisor is determined by CPU Clock and CONFIG_SYS_BASE_BAUD value.
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85 * The Linux BASE_BAUD define should match this configuration.
86 * baseBaud = cpuClock/(uartDivisor*16)
6d0f6bcf 87 * If CONFIG_SYS_405_UART_ERRATA_59 and 200MHz CPU clock,
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88 * set Linux BASE_BAUD to 403200.
89 */
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90#undef CONFIG_SYS_405_UART_ERRATA_59 /* 405GP/CR Rev. D silicon */
91#define CONFIG_SYS_BASE_BAUD 691200
714bc55b 92
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93/* Set console baudrate to 9600 */
94#define CONFIG_BAUDRATE 9600
95
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96/*-----------------------------------------------------------------------
97 * Flash
98 *----------------------------------------------------------------------*/
99
a0794948 100/* Use common CFI driver */
6d0f6bcf 101#define CONFIG_SYS_FLASH_CFI
00b1883a 102#define CONFIG_FLASH_CFI_DRIVER
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103/* board provides its own flash_init code */
104#define CONFIG_FLASH_CFI_LEGACY 1
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105#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
106#define CONFIG_SYS_FLASH_LEGACY_512Kx8 1
4bd5036e 107
a0794948 108/* print 'E' for empty sector on flinfo */
6d0f6bcf 109#define CONFIG_SYS_FLASH_EMPTY_INFO
4bd5036e 110
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111#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
112#define CONFIG_SYS_MAX_FLASH_SECT 8 /* max number of sectors on one chip */
4bd5036e 113
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114/*-----------------------------------------------------------------------
115 * Environment
116 *----------------------------------------------------------------------*/
117
9314cee6 118#undef CONFIG_ENV_IS_IN_NVRAM
5a1aceb0 119#define CONFIG_ENV_IS_IN_FLASH
93f6d725 120#undef CONFIG_ENV_IS_NOWHERE
714bc55b 121
bb1f8b4f 122#ifdef CONFIG_ENV_IS_IN_EEPROM
714bc55b 123/* Put the environment after the SDRAM configuration */
53677ef1 124#define PROM_SIZE 2048
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125#define CONFIG_ENV_OFFSET 512
126#define CONFIG_ENV_SIZE (PROM_SIZE-CONFIG_ENV_OFFSET)
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127#endif
128
5a1aceb0 129#ifdef CONFIG_ENV_IS_IN_FLASH
714bc55b 130/* Put the environment in Flash */
0e8d1586 131#define CONFIG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */
6d0f6bcf 132#define CONFIG_ENV_ADDR ((-CONFIG_SYS_MONITOR_LEN)-CONFIG_ENV_SECT_SIZE)
0e8d1586 133#define CONFIG_ENV_SIZE 8*1024 /* 8 KB Environment Sector */
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134
135/* Address and size of Redundant Environment Sector */
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136#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR-CONFIG_ENV_SECT_SIZE)
137#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
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138#endif
139
140/*-----------------------------------------------------------------------
141 * I2C stuff for a ATMEL AT24C16 (2kB holding ENV, we are using the
142 * the first internal I2C controller of the PPC440EPx
143 *----------------------------------------------------------------------*/
6d0f6bcf 144#define CONFIG_SYS_SPD_BUS_NUM 0
714bc55b 145
c11da194 146#define CONFIG_IPADDR 172.25.1.14
714bc55b 147
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148#define CONFIG_EXTRA_ENV_SETTINGS \
149 CONFIG_NETSTAL_DEF_ENV \
150 CONFIG_NETSTAL_DEF_ENV_POWERPC \
714bc55b 151 ""
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152
153/*
154 * BOOTP options
155 */
156#define CONFIG_BOOTP_BOOTFILESIZE
157#define CONFIG_BOOTP_BOOTPATH
158#define CONFIG_BOOTP_GATEWAY
159#define CONFIG_BOOTP_HOSTNAME
160
161/*
162 * Command line configuration.
163 */
164#include <config_cmd_default.h>
165
166#define CONFIG_CMD_ASKENV
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167#define CONFIG_CMD_CACHE
168#define CONFIG_CMD_DHCP
169#define CONFIG_CMD_DIAG
170#define CONFIG_CMD_EEPROM
171#define CONFIG_CMD_ELF
172#define CONFIG_CMD_FLASH
173#define CONFIG_CMD_I2C
174#define CONFIG_CMD_IMMAP
175#define CONFIG_CMD_IRQ
176#define CONFIG_CMD_MII
177#define CONFIG_CMD_NET
178#define CONFIG_CMD_PING
179#define CONFIG_CMD_REGINFO
180#define CONFIG_CMD_SDRAM
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181
182/* SPD EEPROM (sdram speed config) disabled */
183#define CONFIG_SPD_EEPROM 1
184#define SPD_EEPROM_ADDRESS 0x50
185
4bd5036e 186/* POST support */
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187#define CONFIG_POST (CONFIG_SYS_POST_MEMORY | \
188 CONFIG_SYS_POST_CPU | \
189 CONFIG_SYS_POST_UART | \
190 CONFIG_SYS_POST_I2C | \
191 CONFIG_SYS_POST_CACHE | \
192 CONFIG_SYS_POST_ETHER | \
193 CONFIG_SYS_POST_SPR)
194
5d7c73e6 195#define CONFIG_SYS_POST_UART_TABLE { CONFIG_SYS_NS16550_COM1 }
4bd5036e 196#undef CONFIG_LOGBUFFER
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197#define CONFIG_SYS_POST_CACHE_ADDR 0x00800000 /* free virtual address */
198#define CONFIG_SYS_CONSOLE_IS_IN_ENV /* Otherwise it catches logbuffer as output */
4bd5036e 199
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200/*-----------------------------------------------------------------------
201 * Miscellaneous configurable options
202 *----------------------------------------------------------------------*/
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203#define CONFIG_SYS_LONGHELP /* undef to save memory */
204#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
3b3bff4c 205#if defined(CONFIG_CMD_KGDB)
6d0f6bcf 206 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
714bc55b 207#else
6d0f6bcf 208 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
714bc55b 209#endif
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210#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
211#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
212#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
714bc55b 213
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214#define CONFIG_SYS_MEMTEST_START 0x0400000 /* memtest works on */
215#define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
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216
217
6d0f6bcf 218#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
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219
220/*-----------------------------------------------------------------------
221 * External Bus Controller (EBC) Setup
222 */
223
6d0f6bcf 224#define CONFIG_SYS_EBC_CFG 0x98400000
714bc55b 225
4bd5036e 226/* Memory Bank 0 (Flash Bank 0) initialization */
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227#define CONFIG_SYS_EBC_PB0AP 0x02005400
228#define CONFIG_SYS_EBC_PB0CR 0xFFF18000 /* BAS=0xFFF,BS=1MB,BU=R/W,BW=8bit */
714bc55b 229
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230#define CONFIG_SYS_EBC_PB1AP 0x03041200
231#define CONFIG_SYS_EBC_PB1CR 0x7009A000 /* BAS=,BS=MB,BU=R/W,BW=bit */
714bc55b 232
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233#define CONFIG_SYS_EBC_PB2AP 0x02054500
234#define CONFIG_SYS_EBC_PB2CR 0x78018000 /* BAS=,BS=MB,BU=R/W,BW=bit */
714bc55b 235
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236#define CONFIG_SYS_EBC_PB3AP 0x01840300
237#define CONFIG_SYS_EBC_PB3CR 0x7c0ba000 /* BAS=,BS=MB,BU=R/W,BW=bit */
714bc55b 238
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239#define CONFIG_SYS_EBC_PB4AP 0x01800300
240#define CONFIG_SYS_EBC_PB4CR 0x7e0ba000 /* BAS=,BS=MB,BU=R/W,BW=bit */
4bd5036e 241
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242#define CONFIG_SYS_GPIO0_OR 0xF27FFFFF /* GPIO value */
243#define CONFIG_SYS_GPIO0_TCR 0x7FFE0000 /* GPIO value */
244#define CONFIG_SYS_GPIO0_ODR 0x00E897FC /* GPIO value */
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245
246/*
247 * For booting Linux, the board info and command line data
248 * have to be in the first 8 MB of memory, since this is
249 * the maximum mapped by the Linux kernel during initialization.
250 */
6d0f6bcf 251#define CONFIG_SYS_BOOTMAPSZ (8 << 20)/* Initial Memory map for Linux */
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252
253/* Init Memory Controller:
254 *
255 * BR0/1 and OR0/1 (FLASH)
256 */
257
6d0f6bcf 258#define FLASH_BASE0_PRELIM CONFIG_SYS_FLASH_BASE /* FLASH bank #0 */
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259#define FLASH_BASE1_PRELIM 0 /* FLASH bank #1 */
260
261
262/* Configuration Port location */
263#define CONFIG_PORT_ADDR 0xF0000500
264
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265#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
266#ifdef CONFIG_SYS_HUSH_PARSER
267#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
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268#endif
269
3b3bff4c 270#if defined(CONFIG_CMD_KGDB)
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271#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
272#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
273#endif
4bd5036e 274
714bc55b 275#endif /* __CONFIG_H */