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1 | /* |
2 | *(C) Copyright 2005-2007 Netstal Maschinen AG | |
3 | * Niklaus Giger (Niklaus.Giger@netstal.com) | |
4 | * | |
5 | * See file CREDITS for list of people who contributed to this | |
6 | * project. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or | |
9 | * modify it under the terms of the GNU General Public License as | |
10 | * published by the Free Software Foundation; either version 2 of | |
11 | * the License, or (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
21 | * MA 02111-1307 USA | |
22 | */ | |
23 | ||
24 | /************************************************************************ | |
25 | * hcu4.h - configuration for HCU4 board (similar to hcu5.h) | |
26 | ***********************************************************************/ | |
27 | ||
28 | #ifndef __CONFIG_H | |
29 | #define __CONFIG_H | |
30 | ||
31 | /*----------------------------------------------------------------------- | |
32 | * High Level Configuration Options | |
33 | *----------------------------------------------------------------------*/ | |
34 | #define CONFIG_HCU4 1 /* Board is HCU4 */ | |
35 | #define CONFIG_4xx 1 /* ... PPC4xx family */ | |
36 | #define CONFIG_405GPr 1 /* HCU4 has a 405GPr */ | |
37 | #define CONFIG_405GP 1 | |
38 | #define CONFIG_4xx 1 | |
39 | ||
40 | #define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */ | |
41 | ||
42 | #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ | |
43 | #define CONFIG_MISC_INIT_R 1 /* Call misc_init_r */ | |
44 | ||
45 | /*----------------------------------------------------------------------- | |
46 | * Base addresses -- Note these are effective addresses where the | |
47 | * actual resources get mapped (not physical addresses) | |
48 | *----------------------------------------------------------------------*/ | |
49 | #define CFG_MONITOR_LEN (384 * 1024) /* Reserve 384 kB for Monitor */ | |
50 | #define CFG_MALLOC_LEN (256 * 1024) /* Reserve 256 kB for malloc() */ | |
51 | ||
52 | ||
53 | #define CFG_SDRAM_BASE 0x00000000 /* _must_ be 0 */ | |
54 | #define CFG_FLASH_BASE 0xfff80000 /* start of FLASH */ | |
55 | #define CFG_MONITOR_BASE TEXT_BASE | |
56 | ||
57 | /* ... with on-chip memory here (4KBytes) */ | |
58 | #define CFG_OCM_DATA_ADDR 0xF4000000 | |
59 | #define CFG_OCM_DATA_SIZE 0x00001000 | |
60 | /* Do not set up locked dcache as init ram. */ | |
61 | #undef CFG_INIT_DCACHE_CS | |
62 | ||
63 | /* Use the On-Chip-Memory (OCM) as a temporary stack for the startup code. */ | |
64 | #define CFG_TEMP_STACK_OCM 1 | |
65 | ||
66 | #define CFG_INIT_RAM_ADDR CFG_OCM_DATA_ADDR /* OCM */ | |
67 | #define CFG_INIT_RAM_END CFG_OCM_DATA_SIZE | |
68 | #define CFG_GBL_DATA_SIZE 256 /* num bytes initial data */ | |
69 | #define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) | |
70 | #define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET | |
71 | ||
72 | /*----------------------------------------------------------------------- | |
73 | * Serial Port | |
74 | *----------------------------------------------------------------------*/ | |
75 | /* | |
76 | * If CFG_EXT_SERIAL_CLOCK, then the UART divisor is 1. | |
77 | * If CFG_405_UART_ERRATA_59, then UART divisor is 31. | |
78 | * Otherwise, UART divisor is determined by CPU Clock and CFG_BASE_BAUD value. | |
79 | * The Linux BASE_BAUD define should match this configuration. | |
80 | * baseBaud = cpuClock/(uartDivisor*16) | |
81 | * If CFG_405_UART_ERRATA_59 and 200MHz CPU clock, | |
82 | * set Linux BASE_BAUD to 403200. | |
83 | */ | |
84 | #undef CFG_EXT_SERIAL_CLOCK /* external serial clock */ | |
85 | #undef CONFIG_SERIAL_MULTI /* needed to be able to define | |
86 | CONFIG_SERIAL_SOFTWARE_FIFO */ | |
87 | #undef CFG_405_UART_ERRATA_59 /* 405GP/CR Rev. D silicon */ | |
88 | #define CFG_BASE_BAUD 691200 | |
89 | ||
90 | /* Size (bytes) of interrupt driven serial port buffer. | |
91 | * Set to 0 to use polling instead of interrupts. | |
92 | * Setting to 0 will also disable RTS/CTS handshaking. | |
93 | */ | |
94 | #undef CONFIG_SERIAL_SOFTWARE_FIFO | |
95 | ||
96 | /* Set console baudrate to 9600 */ | |
97 | #define CONFIG_BAUDRATE 9600 | |
98 | ||
99 | ||
100 | #define CFG_BAUDRATE_TABLE \ | |
101 | {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200} | |
102 | ||
103 | /*----------------------------------------------------------------------- | |
104 | * Environment | |
105 | *----------------------------------------------------------------------*/ | |
106 | ||
107 | #undef CFG_ENV_IS_IN_NVRAM | |
108 | #undef CFG_ENV_IS_IN_FLASH | |
109 | #define CFG_ENV_IS_IN_EEPROM | |
110 | #undef CFG_ENV_IS_NOWHERE | |
111 | ||
112 | #ifdef CFG_ENV_IS_IN_EEPROM | |
113 | /* Put the environment after the SDRAM configuration */ | |
114 | #define PROM_SIZE 2048 | |
115 | #define CFG_ENV_OFFSET 512 | |
116 | #define CFG_ENV_SIZE (PROM_SIZE-CFG_ENV_OFFSET) | |
117 | #endif | |
118 | ||
119 | #ifdef CFG_ENV_IS_IN_FLASH | |
120 | /* Put the environment in Flash */ | |
121 | #define CFG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */ | |
122 | #define CFG_ENV_ADDR ((-CFG_MONITOR_LEN)-CFG_ENV_SECT_SIZE) | |
123 | #define CFG_ENV_SIZE 0x10000 /* Total Size of Environment Sector */ | |
124 | ||
125 | /* Address and size of Redundant Environment Sector */ | |
126 | #define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR-CFG_ENV_SECT_SIZE) | |
127 | #define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE) | |
128 | #endif | |
129 | ||
130 | /*----------------------------------------------------------------------- | |
131 | * I2C stuff for a ATMEL AT24C16 (2kB holding ENV, we are using the | |
132 | * the first internal I2C controller of the PPC440EPx | |
133 | *----------------------------------------------------------------------*/ | |
134 | #define CFG_SPD_BUS_NUM 0 | |
135 | ||
136 | #define CONFIG_HARD_I2C 1 /* I2C with hardware support */ | |
137 | #undef CONFIG_SOFT_I2C /* I2C bit-banged */ | |
138 | #define CFG_I2C_SPEED 400000 /* I2C speed and slave address */ | |
139 | #define CFG_I2C_SLAVE 0x7F | |
140 | ||
141 | /* This is the 7bit address of the device, not including P. */ | |
142 | #define CFG_I2C_EEPROM_ADDR 0x50 | |
143 | #define CFG_I2C_EEPROM_ADDR_LEN 1 | |
144 | ||
145 | /* The EEPROM can do 16byte ( 1 << 4 ) page writes. */ | |
146 | #define CFG_I2C_EEPROM_ADDR_OVERFLOW 0x07 | |
147 | #define CFG_EEPROM_PAGE_WRITE_BITS 4 | |
148 | #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 | |
149 | #define CFG_EEPROM_PAGE_WRITE_ENABLE | |
150 | #undef CFG_I2C_MULTI_EEPROMS | |
151 | ||
152 | ||
153 | #define CONFIG_PREBOOT "echo;" \ | |
154 | "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \ | |
155 | "echo" | |
156 | ||
157 | #undef CONFIG_BOOTARGS | |
158 | ||
159 | /* Setup some board specific values for the default environment variables */ | |
160 | #define CONFIG_HOSTNAME hcu4 | |
161 | #define CONFIG_IPADDR 172.25.1.42 | |
162 | #define CONFIG_ETHADDR 00:60:13:00:00:00 /* Netstal Machines AG MAC */ | |
163 | #define CONFIG_OVERWRITE_ETHADDR_ONCE | |
164 | #define CONFIG_SERVERIP 172.25.1.3 | |
165 | ||
166 | #define CFG_TFTP_LOADADDR 0x01000000 /* @16 MB */ | |
167 | ||
168 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
169 | "netdev=eth0\0" \ | |
170 | "loadaddr=0x01000000\0" \ | |
171 | "nfsargs=setenv bootargs root=/dev/nfs rw " \ | |
172 | "nfsroot=${serverip}:${rootpath}\0" \ | |
173 | "ramargs=setenv bootargs root=/dev/ram rw\0" \ | |
174 | "addip=setenv bootargs ${bootargs} " \ | |
175 | "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ | |
176 | ":${hostname}:${netdev}:off panic=1\0" \ | |
177 | "addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0"\ | |
178 | "nfs=tftp 200000 ${bootfile};run nfsargs addip addtty;" \ | |
179 | "bootm\0" \ | |
180 | "rootpath=/home/diagnose/eldk/ppc_4xx\0" \ | |
181 | "bootfile=/tftpboot/hcu4/uImage\0" \ | |
182 | "load=tftp 100000 hcu4/u-boot.bin\0" \ | |
183 | "update=protect off FFFa0000 FFFFFFFF;era FFFa0000 FFFFFFFF;" \ | |
184 | "cp.b 100000 FFFa0000 60000\0" \ | |
185 | "upd=run load;run update\0" \ | |
186 | "vx=tftp ${loadaddr} hcu4_vx_rom;" \ | |
187 | "setenv bootargs emac(0,0)hcu4_vx_rom e=${ipaddr} " \ | |
188 | " h=${serverip} u=dpu pw=netstal8752 tn=hcu4 f=0x3008;" \ | |
189 | "bootvx ${loadaddr}\0" \ | |
190 | "" | |
191 | #define CONFIG_BOOTCOMMAND "run vx" | |
192 | ||
193 | #if 0 | |
194 | #define CONFIG_BOOTDELAY -1 /* autoboot disabled */ | |
195 | #else | |
196 | #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ | |
197 | #endif | |
198 | ||
199 | #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ | |
200 | #define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ | |
201 | ||
202 | #define CONFIG_MII 1 /* MII PHY management */ | |
203 | #define CONFIG_PHY_ADDR 1 /* PHY address */ | |
204 | ||
205 | #define CONFIG_PHY_RESET 1 /* reset phy upon startup */ | |
206 | ||
207 | #define CONFIG_HAS_ETH0 | |
208 | #define CFG_RX_ETH_BUFFER 16 /* Number of ethernet rx buffers & descriptors */ | |
209 | #define CONFIG_COMMANDS (CONFIG_CMD_DFL | \ | |
210 | CFG_CMD_ASKENV | \ | |
211 | CFG_CMD_BSP | \ | |
212 | CFG_CMD_CACHE | \ | |
213 | CFG_CMD_DHCP | \ | |
214 | CFG_CMD_DIAG | \ | |
215 | CFG_CMD_EEPROM | \ | |
216 | CFG_CMD_ELF | \ | |
217 | CFG_CMD_FLASH | \ | |
218 | CFG_CMD_I2C | \ | |
219 | CFG_CMD_IMMAP | \ | |
220 | CFG_CMD_IRQ | \ | |
221 | CFG_CMD_MII | \ | |
222 | CFG_CMD_NET | \ | |
223 | CFG_CMD_PING | \ | |
224 | CFG_CMD_REGINFO | \ | |
225 | CFG_CMD_SDRAM \ | |
226 | ) | |
227 | ||
228 | /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ | |
229 | #include <cmd_confdefs.h> | |
230 | ||
231 | /* SPD EEPROM (sdram speed config) disabled */ | |
232 | #define CONFIG_SPD_EEPROM 1 | |
233 | #define SPD_EEPROM_ADDRESS 0x50 | |
234 | ||
235 | /*----------------------------------------------------------------------- | |
236 | * Miscellaneous configurable options | |
237 | *----------------------------------------------------------------------*/ | |
238 | #define CFG_LONGHELP /* undef to save memory */ | |
239 | #define CFG_PROMPT "=> " /* Monitor Command Prompt */ | |
240 | #if (CONFIG_COMMANDS & CFG_CMD_KGDB) | |
241 | #define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ | |
242 | #else | |
243 | #define CFG_CBSIZE 256 /* Console I/O Buffer Size */ | |
244 | #endif | |
245 | #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ | |
246 | #define CFG_MAXARGS 16 /* max number of command args */ | |
247 | #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ | |
248 | ||
249 | #define CFG_MEMTEST_START 0x0400000 /* memtest works on */ | |
250 | #define CFG_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */ | |
251 | ||
252 | ||
253 | #define CFG_LOAD_ADDR 0x100000 /* default load address */ | |
254 | #define CFG_EXTBDINFO 1 /* To use extended board_into (bd_t) */ | |
255 | ||
256 | #define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */ | |
257 | ||
258 | #define CONFIG_CMDLINE_EDITING 1 /* add command line history */ | |
259 | #define CONFIG_LOOPW 1 /* enable loopw command */ | |
260 | #define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ | |
261 | #define CONFIG_VERSION_VARIABLE 1 /* include version env variable */ | |
262 | ||
263 | /*----------------------------------------------------------------------- | |
264 | * External Bus Controller (EBC) Setup | |
265 | */ | |
266 | ||
267 | /* Memory Bank 0 (Flash Bank 0) initialization */ | |
268 | #define CFG_EBC_PB0AP 0x02005400 | |
269 | #define CFG_EBC_PB0CR 0xFFF18000 /* BAS=0xFFF,BS=1MB,BU=R/W,BW=8bit */ | |
270 | ||
271 | #define CFG_EBC_PB1AP 0x03041200 | |
272 | #define CFG_EBC_PB1CR 0x7009A000 /* BAS=,BS=MB,BU=R/W,BW=bit */ | |
273 | ||
274 | #define CFG_EBC_PB2AP 0x02054500 | |
275 | #define CFG_EBC_PB2CR 0x78018000 /* BAS=,BS=MB,BU=R/W,BW=bit */ | |
276 | ||
277 | #define CFG_EBC_PB3AP 0x01840300 | |
278 | #define CFG_EBC_PB3CR 0x7c0ba000 /* BAS=,BS=MB,BU=R/W,BW=bit */ | |
279 | ||
280 | #define CFG_EBC_PB4AP 0x01800300 | |
281 | #define CFG_EBC_PB4CR 0x7e0ba000 /* BAS=,BS=MB,BU=R/W,BW=bit */ | |
282 | ||
283 | #define CFG_GPIO0_TCR 0x7ffe0000 /* GPIO value */ | |
284 | ||
285 | /* | |
286 | * For booting Linux, the board info and command line data | |
287 | * have to be in the first 8 MB of memory, since this is | |
288 | * the maximum mapped by the Linux kernel during initialization. | |
289 | */ | |
290 | #define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ | |
291 | ||
292 | /*----------------------------------------------------------------------- | |
293 | * FLASH organization | |
294 | */ | |
295 | #define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ | |
296 | #define CFG_MAX_FLASH_SECT 256 /* max number of sectors on one chip */ | |
297 | ||
298 | ||
299 | #define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ | |
300 | #define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ | |
301 | ||
302 | /* Init Memory Controller: | |
303 | * | |
304 | * BR0/1 and OR0/1 (FLASH) | |
305 | */ | |
306 | ||
307 | #define FLASH_BASE0_PRELIM CFG_FLASH_BASE /* FLASH bank #0 */ | |
308 | #define FLASH_BASE1_PRELIM 0 /* FLASH bank #1 */ | |
309 | ||
310 | ||
311 | /* Configuration Port location */ | |
312 | #define CONFIG_PORT_ADDR 0xF0000500 | |
313 | ||
314 | ||
714bc55b NG |
315 | /*----------------------------------------------------------------------- |
316 | * Cache Configuration | |
317 | *----------------------------------------------------------------------*/ | |
318 | #define CFG_DCACHE_SIZE 16384 /* For IBM 405GPr CPUs */ | |
319 | #define CFG_CACHELINE_SIZE 32 /* ... */ | |
320 | #if (CONFIG_COMMANDS & CFG_CMD_KGDB) | |
321 | #define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */ | |
322 | #endif | |
323 | ||
324 | /* | |
325 | * Internal Definitions | |
326 | * | |
327 | * Boot Flags | |
328 | */ | |
329 | #define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ | |
330 | #define BOOTFLAG_WARM 0x02 /* Software reboot */ | |
331 | ||
332 | #define CFG_HUSH_PARSER /* use "hush" command parser */ | |
333 | #ifdef CFG_HUSH_PARSER | |
35d22f95 | 334 | #define CFG_PROMPT_HUSH_PS2 "> " |
714bc55b NG |
335 | #endif |
336 | ||
337 | #if (CONFIG_COMMANDS & CFG_CMD_KGDB) | |
338 | #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ | |
339 | #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ | |
340 | #endif | |
341 | #endif /* __CONFIG_H */ |