[people/ms/u-boot.git] / include / configs / impa7.h

/*
 * (C) Copyright 2000
 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
 * Marius Groeger <mgroeger@sysgo.de>
 *
 * Configuation settings for the implementa impA7 board.
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#ifndef __CONFIG_H
#define __CONFIG_H

/*
 * High Level Configuration Options
 * (easy to change)
 */
#define CONFIG_ARM7		1	/* This is a ARM7 CPU	*/
#define CONFIG_IMPA7		1	/* on an impA7 Board      */
#define CONFIG_ARM_THUMB	1	/* this is an ARM720TDMI */
#define CONFIG_ARM7_REVD	1	/* enable ARM720 REV.D Workarounds */

#undef CONFIG_USE_IRQ			/* don't need them anymore */

/*
 * Size of malloc() pool
 */
#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 128*1024)

/*
 * Hardware drivers
 */
#define CONFIG_NET_MULTI
#define CONFIG_CS8900		/* we have a CS8900 on-board */
#define CONFIG_CS8900_BASE	0x20000000
#define CONFIG_CS8900_BUS32

/*
 * select serial console configuration
 */
#define CONFIG_CLPS7111_SERIAL
#define CONFIG_SERIAL1		1	/* we use Serial line 1 */

/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE

#define CONFIG_BAUDRATE		9600

/*
 * BOOTP options
 */
#define CONFIG_BOOTP_SUBNETMASK
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_BOOTFILESIZE


/*
 * Command line configuration.
 */
#include <config_cmd_default.h>

#define CONFIG_CMD_JFFS2


#define CONFIG_BOOTDELAY	3
#define CONFIG_BOOTARGS		"devfs=mount root=ramfs console=ttyS0,9600"
/*#define CONFIG_ETHADDR	08:00:3e:26:0a:5a	*/
/*#define CONFIG_NETMASK        255.255.0.0	*/
/*#define CONFIG_IPADDR		172.22.2.128	*/
/*#define CONFIG_SERVERIP	172.22.2.126	*/
/*#define CONFIG_BOOTFILE	"impa7"	*/
#define CONFIG_BOOTCOMMAND	"bootp;bootm"

#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE	230400		/* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX	2		/* which serial port to use */
#endif

/*
 * Miscellaneous configurable options
 */
#define	CONFIG_SYS_LONGHELP				/* undef to save memory		*/
#define	CONFIG_SYS_PROMPT		"impA7 # "		/* Monitor Command Prompt	*/
#define	CONFIG_SYS_CBSIZE		256		/* Console I/O Buffer Size	*/
#define	CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
#define	CONFIG_SYS_MAXARGS		16		/* max number of command args	*/
#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE	/* Boot Argument Buffer Size	*/

#define CONFIG_SYS_MEMTEST_START	0xc0400000	/* memtest works on	*/
#define CONFIG_SYS_MEMTEST_END		0xc0800000	/* 4 ... 8 MB in DRAM	*/

#define	CONFIG_SYS_LOAD_ADDR		0xc1000000	/* default load address	*/

#define	CONFIG_SYS_HZ			2000		/* decrementer freq: 2 kHz */

						/* valid baudrates */
#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }

/*-----------------------------------------------------------------------
 * Stack sizes
 *
 * The stack sizes are set up in start.S using the settings below
 */
#define CONFIG_STACKSIZE	(128*1024)	/* regular stack */
#ifdef CONFIG_USE_IRQ
#define CONFIG_STACKSIZE_IRQ	(4*1024)	/* IRQ stack */
#define CONFIG_STACKSIZE_FIQ	(4*1024)	/* FIQ stack */
#endif

/*-----------------------------------------------------------------------
 * Physical Memory Map
 */
#define CONFIG_NR_DRAM_BANKS	2	   /* we have 2 banks of DRAM */
#define PHYS_SDRAM_1		0xc0000000 /* SDRAM Bank #1 */
#define PHYS_SDRAM_1_SIZE	0x00800000 /* 8 MB */
#define PHYS_SDRAM_2		0xc1000000 /* SDRAM Bank #2 */
#define PHYS_SDRAM_2_SIZE	0x00800000 /* 8 MB */

#define PHYS_FLASH_1		0x00000000 /* Flash Bank #1 */
#define PHYS_FLASH_2		0x10000000 /* Flash Bank #2 */
#define PHYS_FLASH_SIZE		0x00800000 /* 16 MB */

#define CONFIG_SYS_FLASH_BASE		PHYS_FLASH_1

/*-----------------------------------------------------------------------
 * FLASH and environment organization
 */
#define CONFIG_SYS_MAX_FLASH_BANKS	2	/* max number of memory banks		*/
#define CONFIG_SYS_MAX_FLASH_SECT	71	/* max number of sectors on one chip	*/

/* timeout values are in ticks */
#define CONFIG_SYS_FLASH_ERASE_TOUT	(2*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
#define CONFIG_SYS_FLASH_WRITE_TOUT	(2*CONFIG_SYS_HZ) /* Timeout for Flash Write */

#define	CONFIG_ENV_IS_IN_FLASH	1
#define CONFIG_ENV_ADDR		(PHYS_FLASH_1 + 0x1C000)	/* Addr of Environment Sector	*/
#define CONFIG_ENV_SIZE		0x4000	/* Total Size of Environment Sector	*/

/*
 * JFFS2 partitions
 *
 */
/* No command line, one static partition, whole device */
#undef CONFIG_CMD_MTDPARTS
#define CONFIG_JFFS2_DEV		"nor0"
#define CONFIG_JFFS2_PART_SIZE		0xFFFFFFFF
#define CONFIG_JFFS2_PART_OFFSET	0x00020000

/* mtdparts command line support */
/*
#define CONFIG_CMD_MTDPARTS
#define MTDIDS_DEFAULT		"nor0=impA7 NOR Flash Bank #0,nor1=impA7 NOR Flash Bank #1"
#define MTDPARTS_DEFAULT	"mtdparts=impA7 NOR Flash Bank #0:-(FileSystem1);impA7 NOR Flash Bank #1:-(FileSystem2)"
*/

#endif	/* __CONFIG_H */
Commit	Line	Data
da27dcf0 WD	1	/*
	2	* (C) Copyright 2000
	3	* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
	4	* Marius Groeger <mgroeger@sysgo.de>
	5	*
	6	* Configuation settings for the implementa impA7 board.
	7	*
	8	* See file CREDITS for list of people who contributed to this
	9	* project.
	10	*
	11	* This program is free software; you can redistribute it and/or
	12	* modify it under the terms of the GNU General Public License as
	13	* published by the Free Software Foundation; either version 2 of
	14	* the License, or (at your option) any later version.
	15	*
	16	* This program is distributed in the hope that it will be useful,
	17	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	18	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	19	* GNU General Public License for more details.
	20	*
	21	* You should have received a copy of the GNU General Public License
	22	* along with this program; if not, write to the Free Software
	23	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	24	* MA 02111-1307 USA
	25	*/
	26
	27	#ifndef __CONFIG_H
	28	#define __CONFIG_H
	29
da27dcf0 WD	30	/*
	31	* High Level Configuration Options
	32	* (easy to change)
	33	*/
	34	#define CONFIG_ARM7 1 /* This is a ARM7 CPU */
	35	#define CONFIG_IMPA7 1 /* on an impA7 Board */
	36	#define CONFIG_ARM_THUMB 1 /* this is an ARM720TDMI */
53677ef1	37	#define CONFIG_ARM7_REVD 1 /* enable ARM720 REV.D Workarounds */
da27dcf0 WD	38
	39	#undef CONFIG_USE_IRQ /* don't need them anymore */
	40
	41	/*
	42	* Size of malloc() pool
	43	*/
6d0f6bcf	44	#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
da27dcf0 WD	45
	46	/*
	47	* Hardware drivers
	48	*/
b1c0eaac BW	49	#define CONFIG_NET_MULTI
	50	#define CONFIG_CS8900 /* we have a CS8900 on-board */
	51	#define CONFIG_CS8900_BASE 0x20000000
	52	#define CONFIG_CS8900_BUS32
da27dcf0 WD	53
	54	/*
	55	* select serial console configuration
	56	*/
a6ef3dde	57	#define CONFIG_CLPS7111_SERIAL
da27dcf0 WD	58	#define CONFIG_SERIAL1 1 /* we use Serial line 1 */
	59
	60	/* allow to overwrite serial and ethaddr */
	61	#define CONFIG_ENV_OVERWRITE
	62
	63	#define CONFIG_BAUDRATE 9600
	64
2fd90ce5 JL	65	/*
	66	* BOOTP options
	67	*/
	68	#define CONFIG_BOOTP_SUBNETMASK
	69	#define CONFIG_BOOTP_GATEWAY
	70	#define CONFIG_BOOTP_HOSTNAME
	71	#define CONFIG_BOOTP_BOOTPATH
	72	#define CONFIG_BOOTP_BOOTFILESIZE
da27dcf0	73
da27dcf0	74
1d2c6bc4 JL	75	/*
	76	* Command line configuration.
	77	*/
	78	#include <config_cmd_default.h>
	79
	80	#define CONFIG_CMD_JFFS2
	81
da27dcf0 WD	82
da27dcf0 WD	83	#define CONFIG_BOOTDELAY 3
53677ef1	84	#define CONFIG_BOOTARGS "devfs=mount root=ramfs console=ttyS0,9600"
da27dcf0 WD	85	/#define CONFIG_ETHADDR 08:00:3e:26:0a:5a /
	86	/#define CONFIG_NETMASK 255.255.0.0 /
	87	/#define CONFIG_IPADDR 172.22.2.128 /
	88	/#define CONFIG_SERVERIP 172.22.2.126 /
	89	/#define CONFIG_BOOTFILE "impa7" /
	90	#define CONFIG_BOOTCOMMAND "bootp;bootm"
	91
1d2c6bc4	92	#if defined(CONFIG_CMD_KGDB)
da27dcf0 WD	93	#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
	94	#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
	95	#endif
	96
	97	/*
	98	* Miscellaneous configurable options
	99	*/
6d0f6bcf JCPV	100	#define CONFIG_SYS_LONGHELP /* undef to save memory */
	101	#define CONFIG_SYS_PROMPT "impA7 # " /* Monitor Command Prompt */
	102	#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
	103	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
	104	#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
	105	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
da27dcf0	106
6d0f6bcf JCPV	107	#define CONFIG_SYS_MEMTEST_START 0xc0400000 /* memtest works on */
6d0f6bcf JCPV	108	#define CONFIG_SYS_MEMTEST_END 0xc0800000 /* 4 ... 8 MB in DRAM */
da27dcf0	109
6d0f6bcf	110	#define CONFIG_SYS_LOAD_ADDR 0xc1000000 /* default load address */
da27dcf0	111
6d0f6bcf	112	#define CONFIG_SYS_HZ 2000 /* decrementer freq: 2 kHz */
da27dcf0 WD	113
da27dcf0 WD	114	/* valid baudrates */
6d0f6bcf	115	#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
da27dcf0 WD	116
	117	/*-----------------------------------------------------------------------
	118	* Stack sizes
	119	*
	120	* The stack sizes are set up in start.S using the settings below
	121	*/
	122	#define CONFIG_STACKSIZE (1281024) / regular stack */
	123	#ifdef CONFIG_USE_IRQ
	124	#define CONFIG_STACKSIZE_IRQ (41024) / IRQ stack */
	125	#define CONFIG_STACKSIZE_FIQ (41024) / FIQ stack */
	126	#endif
	127
	128	/*-----------------------------------------------------------------------
	129	* Physical Memory Map
	130	*/
	131	#define CONFIG_NR_DRAM_BANKS 2 /* we have 2 banks of DRAM */
	132	#define PHYS_SDRAM_1 0xc0000000 /* SDRAM Bank #1 */
	133	#define PHYS_SDRAM_1_SIZE 0x00800000 /* 8 MB */
	134	#define PHYS_SDRAM_2 0xc1000000 /* SDRAM Bank #2 */
	135	#define PHYS_SDRAM_2_SIZE 0x00800000 /* 8 MB */
	136
	137	#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
	138	#define PHYS_FLASH_2 0x10000000 /* Flash Bank #2 */
	139	#define PHYS_FLASH_SIZE 0x00800000 /* 16 MB */
	140
6d0f6bcf	141	#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
da27dcf0 WD	142
	143	/*-----------------------------------------------------------------------
	144	* FLASH and environment organization
	145	*/
6d0f6bcf JCPV	146	#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */
6d0f6bcf JCPV	147	#define CONFIG_SYS_MAX_FLASH_SECT 71 /* max number of sectors on one chip */
da27dcf0 WD	148
da27dcf0 WD	149	/* timeout values are in ticks */
6d0f6bcf JCPV	150	#define CONFIG_SYS_FLASH_ERASE_TOUT (2CONFIG_SYS_HZ) / Timeout for Flash Erase */
6d0f6bcf JCPV	151	#define CONFIG_SYS_FLASH_WRITE_TOUT (2CONFIG_SYS_HZ) / Timeout for Flash Write */
da27dcf0	152
5a1aceb0	153	#define CONFIG_ENV_IS_IN_FLASH 1
0e8d1586 JCPV	154	#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x1C000) /* Addr of Environment Sector */
0e8d1586 JCPV	155	#define CONFIG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */
da27dcf0	156
700a0c64 WD	157	/*
	158	* JFFS2 partitions
	159	*
	160	*/
	161	/* No command line, one static partition, whole device */
68d7d651	162	#undef CONFIG_CMD_MTDPARTS
700a0c64 WD	163	#define CONFIG_JFFS2_DEV "nor0"
	164	#define CONFIG_JFFS2_PART_SIZE 0xFFFFFFFF
	165	#define CONFIG_JFFS2_PART_OFFSET 0x00020000
	166
	167	/* mtdparts command line support */
	168	/*
68d7d651	169	#define CONFIG_CMD_MTDPARTS
700a0c64 WD	170	#define MTDIDS_DEFAULT "nor0=impA7 NOR Flash Bank #0,nor1=impA7 NOR Flash Bank #1"
	171	#define MTDPARTS_DEFAULT "mtdparts=impA7 NOR Flash Bank #0:-(FileSystem1);impA7 NOR Flash Bank #1:-(FileSystem2)"
	172	*/
da27dcf0 WD	173
da27dcf0 WD	174	#endif /* __CONFIG_H */