[thirdparty/u-boot.git] / include / configs / imx8mp_evk.h

/* SPDX-License-Identifier: GPL-2.0+ */
/*
 * Copyright 2019 NXP
 */

#ifndef __IMX8MP_EVK_H
#define __IMX8MP_EVK_H

#include <linux/sizes.h>
#include <linux/stringify.h>
#include <asm/arch/imx-regs.h>

#ifdef CONFIG_SECURE_BOOT
#define CONFIG_CSF_SIZE			0x2000 /* 8K region */
#endif

#define CONFIG_SPL_MAX_SIZE		(152 * 1024)
#define CONFIG_SYS_MONITOR_LEN		(512 * 1024)
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	0x300
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	1
#define CONFIG_SYS_UBOOT_BASE	(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)

#ifdef CONFIG_SPL_BUILD
/*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
#define CONFIG_SPL_LDSCRIPT		"arch/arm/cpu/armv8/u-boot-spl.lds"
#define CONFIG_SPL_STACK		0x990000
#define CONFIG_SPL_BSS_START_ADDR      0x0095e000
#define CONFIG_SPL_BSS_MAX_SIZE        0x2000	/* 8 KB */
#define CONFIG_SYS_SPL_MALLOC_START    0x42200000
#define CONFIG_SYS_SPL_MALLOC_SIZE     SZ_512K	/* 512 KB */
#define CONFIG_SYS_ICACHE_OFF
#define CONFIG_SYS_DCACHE_OFF

#define CONFIG_MALLOC_F_ADDR		0x940000

#define CONFIG_SPL_ABORT_ON_RAW_IMAGE

#undef CONFIG_DM_MMC
#undef CONFIG_DM_PMIC
#undef CONFIG_DM_PMIC_PFUZE100

#define CONFIG_POWER
#define CONFIG_POWER_I2C
#define CONFIG_POWER_PCA9450

#undef CONFIG_DM_I2C
#define CONFIG_SYS_I2C

#endif

/* Initial environment variables */
#define CONFIG_EXTRA_ENV_SETTINGS		\
	"script=boot.scr\0" \
	"image=Image\0" \
	"console=ttymxc1,115200 earlycon=ec_imx6q,0x30890000,115200\0" \
	"fdt_addr=0x43000000\0"			\
	"fdt_high=0xffffffffffffffff\0"		\
	"boot_fdt=try\0" \
	"fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
	"initrd_addr=0x43800000\0"		\
	"initrd_high=0xffffffffffffffff\0" \
	"mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
	"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
	"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
	"mmcautodetect=yes\0" \
	"mmcargs=setenv bootargs ${jh_clk} console=${console} root=${mmcroot}\0 " \
	"loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
	"bootscript=echo Running bootscript from mmc ...; " \
		"source\0" \
	"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
	"mmcboot=echo Booting from mmc ...; " \
		"run mmcargs; " \
		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
			"if run loadfdt; then " \
				"booti ${loadaddr} - ${fdt_addr}; " \
			"else " \
				"echo WARN: Cannot load the DT; " \
			"fi; " \
		"else " \
			"echo wait for boot; " \
		"fi;\0" \
	"netargs=setenv bootargs ${jh_clk} console=${console} " \
		"root=/dev/nfs " \
		"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
	"netboot=echo Booting from net ...; " \
		"run netargs;  " \
		"if test ${ip_dyn} = yes; then " \
			"setenv get_cmd dhcp; " \
		"else " \
			"setenv get_cmd tftp; " \
		"fi; " \
		"${get_cmd} ${loadaddr} ${image}; " \
		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
			"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
				"booti ${loadaddr} - ${fdt_addr}; " \
			"else " \
				"echo WARN: Cannot load the DT; " \
			"fi; " \
		"else " \
			"booti; " \
		"fi;\0"

#define CONFIG_BOOTCOMMAND \
	   "mmc dev ${mmcdev}; if mmc rescan; then " \
		   "if run loadbootscript; then " \
			   "run bootscript; " \
		   "else " \
			   "if run loadimage; then " \
				   "run mmcboot; " \
			   "else run netboot; " \
			   "fi; " \
		   "fi; " \
	   "else booti ${loadaddr} - ${fdt_addr}; fi"

/* Link Definitions */
#define CONFIG_LOADADDR			0x40480000

#define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR

#define CONFIG_SYS_INIT_RAM_ADDR	0x40000000
#define CONFIG_SYS_INIT_RAM_SIZE	0x80000
#define CONFIG_SYS_INIT_SP_OFFSET \
	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR \
	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)

#define CONFIG_ENV_OVERWRITE
#define CONFIG_SYS_MMC_ENV_DEV		1   /* USDHC2 */
#define CONFIG_MMCROOT			"/dev/mmcblk1p2"  /* USDHC2 */

/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN		SZ_32M

/* Totally 6GB DDR */
#define CONFIG_SYS_SDRAM_BASE		0x40000000
#define PHYS_SDRAM			0x40000000
#define PHYS_SDRAM_SIZE			0xC0000000	/* 3 GB */
#define PHYS_SDRAM_2			0x100000000
#define PHYS_SDRAM_2_SIZE		0xC0000000	/* 3 GB */

#define CONFIG_MXC_UART_BASE		UART2_BASE_ADDR

/* Monitor Command Prompt */
#define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
#define CONFIG_SYS_CBSIZE		2048
#define CONFIG_SYS_MAXARGS		64
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
					sizeof(CONFIG_SYS_PROMPT) + 16)

#define CONFIG_FSL_USDHC

#define CONFIG_SYS_FSL_USDHC_NUM	2
#define CONFIG_SYS_FSL_ESDHC_ADDR	0

#define CONFIG_SYS_MMC_IMG_LOAD_PART	1

#define CONFIG_SYS_I2C_SPEED		100000

#endif
Commit	Line	Data
439321b2 PF	1	/* SPDX-License-Identifier: GPL-2.0+ */
	2	/*
	3	* Copyright 2019 NXP
	4	*/
	5
	6	#ifndef __IMX8MP_EVK_H
	7	#define __IMX8MP_EVK_H
	8
	9	#include <linux/sizes.h>
1af3c7f4	10	#include <linux/stringify.h>
439321b2 PF	11	#include <asm/arch/imx-regs.h>
	12
	13	#ifdef CONFIG_SECURE_BOOT
	14	#define CONFIG_CSF_SIZE 0x2000 /* 8K region */
	15	#endif
	16
	17	#define CONFIG_SPL_MAX_SIZE (152 * 1024)
	18	#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
	19	#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
	20	#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300
	21	#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
	22	#define CONFIG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
	23
	24	#ifdef CONFIG_SPL_BUILD
	25	/#define CONFIG_ENABLE_DDR_TRAINING_DEBUG/
	26	#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
	27	#define CONFIG_SPL_STACK 0x990000
	28	#define CONFIG_SPL_BSS_START_ADDR 0x0095e000
	29	#define CONFIG_SPL_BSS_MAX_SIZE 0x2000 /* 8 KB */
	30	#define CONFIG_SYS_SPL_MALLOC_START 0x42200000
	31	#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */
	32	#define CONFIG_SYS_ICACHE_OFF
	33	#define CONFIG_SYS_DCACHE_OFF
	34
	35	#define CONFIG_MALLOC_F_ADDR 0x940000
	36
	37	#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
	38
	39	#undef CONFIG_DM_MMC
	40	#undef CONFIG_DM_PMIC
	41	#undef CONFIG_DM_PMIC_PFUZE100
	42
	43	#define CONFIG_POWER
	44	#define CONFIG_POWER_I2C
	45	#define CONFIG_POWER_PCA9450
	46
	47	#undef CONFIG_DM_I2C
	48	#define CONFIG_SYS_I2C
	49
	50	#endif
	51
	52	/* Initial environment variables */
	53	#define CONFIG_EXTRA_ENV_SETTINGS \
	54	"script=boot.scr\0" \
	55	"image=Image\0" \
	56	"console=ttymxc1,115200 earlycon=ec_imx6q,0x30890000,115200\0" \
	57	"fdt_addr=0x43000000\0" \
	58	"fdt_high=0xffffffffffffffff\0" \
	59	"boot_fdt=try\0" \
	60	"fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
	61	"initrd_addr=0x43800000\0" \
	62	"initrd_high=0xffffffffffffffff\0" \
	63	"mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
	64	"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
	65	"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
	66	"mmcautodetect=yes\0" \
	67	"mmcargs=setenv bootargs ${jh_clk} console=${console} root=${mmcroot}\0 " \
	68	"loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
	69	"bootscript=echo Running bootscript from mmc ...; " \
	70	"source\0" \
	71	"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
	72	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
	73	"mmcboot=echo Booting from mmc ...; " \
	74	"run mmcargs; " \
75	"if test ${boot_fdt} = yes \|\| test ${boot_fdt} = try; then " \
76	"if run loadfdt; then " \
77	"booti ${loadaddr} - ${fdt_addr}; " \
78	"else " \
79	"echo WARN: Cannot load the DT; " \
80	"fi; " \
81	"else " \
82	"echo wait for boot; " \
83	"fi;\0" \
84	"netargs=setenv bootargs ${jh_clk} console=${console} " \
85	"root=/dev/nfs " \
86	"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
87	"netboot=echo Booting from net ...; " \
88	"run netargs; " \
89	"if test ${ip_dyn} = yes; then " \
90	"setenv get_cmd dhcp; " \
91	"else " \
92	"setenv get_cmd tftp; " \
93	"fi; " \
94	"${get_cmd} ${loadaddr} ${image}; " \
95	"if test ${boot_fdt} = yes \|\| test ${boot_fdt} = try; then " \
96	"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
97	"booti ${loadaddr} - ${fdt_addr}; " \
98	"else " \
99	"echo WARN: Cannot load the DT; " \
100	"fi; " \
101	"else " \
102	"booti; " \
103	"fi;\0"
104
105	#define CONFIG_BOOTCOMMAND \
106	"mmc dev ${mmcdev}; if mmc rescan; then " \
107	"if run loadbootscript; then " \
108	"run bootscript; " \
109	"else " \
110	"if run loadimage; then " \
111	"run mmcboot; " \
112	"else run netboot; " \
113	"fi; " \
114	"fi; " \
115	"else booti ${loadaddr} - ${fdt_addr}; fi"
116
117	/* Link Definitions */
118	#define CONFIG_LOADADDR 0x40480000
119
120	#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
121
122	#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
123	#define CONFIG_SYS_INIT_RAM_SIZE 0x80000
124	#define CONFIG_SYS_INIT_SP_OFFSET \
125	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
126	#define CONFIG_SYS_INIT_SP_ADDR \
127	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
128
129	#define CONFIG_ENV_OVERWRITE
130	#define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */
131	#define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */
132
133	/* Size of malloc() pool */
134	#define CONFIG_SYS_MALLOC_LEN SZ_32M
135
136	/* Totally 6GB DDR */
137	#define CONFIG_SYS_SDRAM_BASE 0x40000000
138	#define PHYS_SDRAM 0x40000000
139	#define PHYS_SDRAM_SIZE 0xC0000000 /* 3 GB */
140	#define PHYS_SDRAM_2 0x100000000
141	#define PHYS_SDRAM_2_SIZE 0xC0000000 /* 3 GB */
142
439321b2 PF	143	#define CONFIG_MXC_UART_BASE UART2_BASE_ADDR
	144
	145	/* Monitor Command Prompt */
	146	#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
	147	#define CONFIG_SYS_CBSIZE 2048
	148	#define CONFIG_SYS_MAXARGS 64
	149	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
	150	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
	151	sizeof(CONFIG_SYS_PROMPT) + 16)
	152
	153	#define CONFIG_FSL_USDHC
	154
	155	#define CONFIG_SYS_FSL_USDHC_NUM 2
	156	#define CONFIG_SYS_FSL_ESDHC_ADDR 0
	157
	158	#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
	159
	160	#define CONFIG_SYS_I2C_SPEED 100000
	161
	162	#endif