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eef72440 OG |
1 | // SPDX-License-Identifier: GPL-2.0+ |
2 | /* | |
3 | * Copyright 2017-2018 NXP | |
4 | */ | |
5 | ||
6 | #ifndef __IMX8QM_ROM7720_H | |
7 | #define __IMX8QM_ROM7720_H | |
8 | ||
9 | #include <linux/sizes.h> | |
10 | #include <asm/arch/imx-regs.h> | |
11 | #define CONFIG_REMAKE_ELF | |
12 | ||
13 | #define CONFIG_SPL_MAX_SIZE (124 * 1024) | |
14 | #define CONFIG_SPL_BSS_START_ADDR 0x00128000 | |
15 | #define CONFIG_SPL_BSS_MAX_SIZE 0x1000 /* 4 KB */ | |
16 | ||
17 | #undef CONFIG_BOOTM_NETBSD | |
18 | ||
19 | #define CONFIG_FSL_USDHC | |
18271637 | 20 | #define CONFIG_SYS_BOOTMAPSZ (256 << 20) |
eef72440 | 21 | #define CONFIG_SYS_FSL_ESDHC_ADDR 0 |
d1d78db1 OG |
22 | #define USDHC1_BASE_ADDR 0x5B010000 |
23 | #define USDHC2_BASE_ADDR 0x5B020000 | |
24 | #define USDHC3_BASE_ADDR 0x5B030000 | |
25 | ||
eef72440 OG |
26 | #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ |
27 | ||
28 | #define CONFIG_ENV_OVERWRITE | |
29 | ||
30 | #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG | |
31 | /* FUSE command */ | |
32 | #define CONFIG_CMD_FUSE | |
33 | ||
34 | /* Boot M4 */ | |
35 | #define M4_BOOT_ENV \ | |
36 | "m4_0_image=m4_0.bin\0" \ | |
37 | "m4_1_image=m4_1.bin\0" \ | |
38 | "loadm4image_0=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4_0_image}\0" \ | |
39 | "loadm4image_1=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4_1_image}\0" \ | |
40 | "m4boot_0=run loadm4image_0; dcache flush; bootaux ${loadaddr} 0\0" \ | |
41 | "m4boot_1=run loadm4image_1; dcache flush; bootaux ${loadaddr} 1\0" \ | |
42 | ||
43 | #ifdef CONFIG_NAND_BOOT | |
44 | #define MFG_NAND_PARTITION "mtdparts=gpmi-nand:128m(boot),32m(kernel),16m(dtb),8m(misc),-(rootfs) " | |
45 | #else | |
46 | #define MFG_NAND_PARTITION "" | |
47 | #endif | |
48 | ||
49 | #define CONFIG_MFG_ENV_SETTINGS \ | |
50 | "mfgtool_args=setenv bootargs console=${console},${baudrate} " \ | |
51 | "rdinit=/linuxrc " \ | |
52 | "g_mass_storage.stall=0 g_mass_storage.removable=1 " \ | |
53 | "g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\ | |
54 | "g_mass_storage.iSerialNumber=\"\" "\ | |
55 | MFG_NAND_PARTITION \ | |
56 | "clk_ignore_unused "\ | |
57 | "\0" \ | |
58 | "initrd_addr=0x83800000\0" \ | |
59 | "initrd_high=0xffffffffffffffff\0" \ | |
60 | "bootcmd_mfg=run mfgtool_args;booti ${loadaddr} ${initrd_addr} ${fdt_addr};\0" \ | |
61 | ||
62 | /* Initial environment variables */ | |
63 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
64 | CONFIG_MFG_ENV_SETTINGS \ | |
65 | M4_BOOT_ENV \ | |
66 | "script=boot.scr\0" \ | |
67 | "image=Image\0" \ | |
68 | "panel=NULL\0" \ | |
69 | "console=ttyLP0\0" \ | |
70 | "fdt_addr=0x83000000\0" \ | |
eef72440 OG |
71 | "boot_fdt=try\0" \ |
72 | "fdt_file=imx8qm-rom7720-a1.dtb\0" \ | |
73 | "initrd_addr=0x83800000\0" \ | |
eef72440 OG |
74 | "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ |
75 | "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ | |
76 | "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ | |
77 | "mmcautodetect=yes\0" \ | |
78 | "mmcargs=setenv bootargs console=${console},${baudrate} root=${mmcroot} earlycon\0 " \ | |
79 | "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ | |
80 | "bootscript=echo Running bootscript from mmc ...; " \ | |
81 | "source\0" \ | |
82 | "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ | |
83 | "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ | |
84 | "mmcboot=echo Booting from mmc ...; " \ | |
85 | "run mmcargs; " \ | |
86 | "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ | |
87 | "if run loadfdt; then " \ | |
88 | "booti ${loadaddr} - ${fdt_addr}; " \ | |
89 | "else " \ | |
90 | "echo WARN: Cannot load the DT; " \ | |
91 | "fi; " \ | |
92 | "else " \ | |
93 | "echo wait for boot; " \ | |
94 | "fi;\0" \ | |
95 | "netargs=setenv bootargs console=${console},${baudrate} " \ | |
96 | "root=/dev/nfs " \ | |
97 | "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp rw earlycon\0" \ | |
98 | "netboot=echo Booting from net ...; " \ | |
99 | "run netargs; " \ | |
100 | "if test ${ip_dyn} = yes; then " \ | |
101 | "setenv get_cmd dhcp; " \ | |
102 | "else " \ | |
103 | "setenv get_cmd tftp; " \ | |
104 | "fi; " \ | |
105 | "${get_cmd} ${loadaddr} ${image}; " \ | |
106 | "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ | |
107 | "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ | |
108 | "booti ${loadaddr} - ${fdt_addr}; " \ | |
109 | "else " \ | |
110 | "echo WARN: Cannot load the DT; " \ | |
111 | "fi; " \ | |
112 | "else " \ | |
113 | "booti; " \ | |
114 | "fi;\0" | |
115 | ||
116 | #define CONFIG_BOOTCOMMAND \ | |
117 | "mmc dev ${mmcdev}; if mmc rescan; then " \ | |
118 | "if run loadbootscript; then " \ | |
119 | "run bootscript; " \ | |
120 | "else " \ | |
121 | "if run loadimage; then " \ | |
122 | "run mmcboot; " \ | |
123 | "else run netboot; " \ | |
124 | "fi; " \ | |
125 | "fi; " \ | |
126 | "else booti ${loadaddr} - ${fdt_addr}; fi" | |
127 | ||
128 | /* Link Definitions */ | |
129 | #define CONFIG_LOADADDR 0x80280000 | |
130 | ||
131 | #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR | |
132 | ||
133 | #define CONFIG_SYS_INIT_SP_ADDR 0x80200000 | |
134 | ||
135 | /* Default environment is in SD */ | |
eef72440 OG |
136 | |
137 | #ifdef CONFIG_QSPI_BOOT | |
eef72440 OG |
138 | #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS |
139 | #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS | |
140 | #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE | |
141 | #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED | |
142 | #else | |
eef72440 OG |
143 | #define CONFIG_SYS_MMC_ENV_PART 0 /* user area */ |
144 | #endif | |
145 | ||
146 | #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 | |
147 | ||
148 | /* On LPDDR4 board, USDHC1 is for eMMC, USDHC2 is for SD on CPU board, | |
149 | * USDHC3 is for SD on base board On DDR4 board, USDHC1 is mux for NAND, | |
150 | * USDHC2 is for SD, USDHC3 is for SD on base board | |
151 | */ | |
152 | #define CONFIG_SYS_MMC_ENV_DEV 2 /* USDHC3 */ | |
153 | #define CONFIG_MMCROOT "/dev/mmcblk2p2" /* USDHC3 */ | |
154 | #define CONFIG_SYS_FSL_USDHC_NUM 3 | |
155 | ||
156 | /* Size of malloc() pool */ | |
157 | #define CONFIG_SYS_MALLOC_LEN ((CONFIG_ENV_SIZE + (32 * 1024)) * 1024) | |
158 | ||
159 | #define CONFIG_SYS_SDRAM_BASE 0x80000000 | |
160 | #define PHYS_SDRAM_1 0x80000000 | |
161 | #define PHYS_SDRAM_2 0x880000000 | |
162 | #define PHYS_SDRAM_1_SIZE 0x80000000 /* 2 GB */ | |
163 | /* LPDDR4 board total DDR is 6GB, DDR4 board total DDR is 4 GB */ | |
164 | #define PHYS_SDRAM_2_SIZE 0x80000000 /* 2 GB */ | |
165 | ||
eef72440 OG |
166 | /* Serial */ |
167 | #define CONFIG_BAUDRATE 115200 | |
168 | ||
169 | /* Generic Timer Definitions */ | |
170 | #define COUNTER_FREQUENCY 8000000 /* 8MHz */ | |
171 | ||
172 | /* Networking */ | |
173 | #define CONFIG_FEC_XCV_TYPE RGMII | |
174 | #define FEC_QUIRK_ENET_MAC | |
175 | ||
176 | #endif /* __IMX8QM_ROM7720_H */ |