]>
Commit | Line | Data |
---|---|---|
c021880a | 1 | /* |
414eec35 | 2 | * (C) Copyright 2003-2005 |
c021880a WD |
3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
4 | * | |
1a459660 | 5 | * SPDX-License-Identifier: GPL-2.0+ |
c021880a WD |
6 | */ |
7 | ||
8 | /* | |
9 | * This file contains the configuration parameters for the INCA-IP board. | |
10 | */ | |
11 | ||
12 | #ifndef __CONFIG_H | |
13 | #define __CONFIG_H | |
14 | ||
15 | #define CONFIG_MIPS32 1 /* MIPS 4Kc CPU core */ | |
16 | #define CONFIG_INCA_IP 1 /* on a INCA-IP Board */ | |
17 | ||
60b74bde DS |
18 | #define CONFIG_XWAY_SWAP_BYTES |
19 | ||
536884f9 SK |
20 | /* |
21 | * Clock for the MIPS core (MHz) | |
22 | * allowed values: 100000000, 133000000, and 150000000 (default) | |
23 | */ | |
24 | #ifndef CONFIG_CPU_CLOCK_RATE | |
25 | #define CONFIG_CPU_CLOCK_RATE 150000000 | |
e0ac62d7 | 26 | #endif |
c021880a | 27 | |
7185adb4 | 28 | #define CONFIG_SYS_XWAY_EBU_BOOTCFG 0x40C4 /* CMULT = 8 */ |
c021880a | 29 | |
3e38691e | 30 | #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ |
c021880a | 31 | |
3e38691e | 32 | #define CONFIG_BAUDRATE 115200 |
c021880a | 33 | |
3e38691e WD |
34 | #define CONFIG_TIMESTAMP /* Print image info with timestamp */ |
35 | ||
36 | #define CONFIG_PREBOOT "echo;" \ | |
32bf3d14 | 37 | "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \ |
3e38691e WD |
38 | "echo" |
39 | ||
40 | #undef CONFIG_BOOTARGS | |
41 | ||
42 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
43 | "nfsargs=setenv bootargs root=/dev/nfs rw " \ | |
fe126d8b | 44 | "nfsroot=${serverip}:${rootpath}\0" \ |
3e38691e | 45 | "ramargs=setenv bootargs root=/dev/ram rw\0" \ |
fe126d8b WD |
46 | "addip=setenv bootargs ${bootargs} " \ |
47 | "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ | |
48 | ":${hostname}:${netdev}:off\0" \ | |
49 | "addmisc=setenv bootargs ${bootargs} " \ | |
50 | "console=ttyS0,${baudrate} " \ | |
51 | "ethaddr=${ethaddr} " \ | |
3e38691e WD |
52 | "panic=1\0" \ |
53 | "flash_nfs=run nfsargs addip addmisc;" \ | |
fe126d8b | 54 | "bootm ${kernel_addr}\0" \ |
3e38691e | 55 | "flash_self=run ramargs addip addmisc;" \ |
fe126d8b WD |
56 | "bootm ${kernel_addr} ${ramdisk_addr}\0" \ |
57 | "net_nfs=tftp 80500000 ${bootfile};" \ | |
3e38691e WD |
58 | "run nfsargs addip addmisc;bootm\0" \ |
59 | "rootpath=/opt/eldk/mips_4KC\0" \ | |
60 | "bootfile=/tftpboot/INCA/uImage\0" \ | |
61 | "kernel_addr=B0040000\0" \ | |
62 | "ramdisk_addr=B0100000\0" \ | |
63 | "u-boot=/tftpboot/INCA/u-boot.bin\0" \ | |
fe126d8b | 64 | "load=tftp 80500000 ${u-boot}\0" \ |
3e38691e | 65 | "update=protect off 1:0-2;era 1:0-2;" \ |
fe126d8b | 66 | "cp.b 80500000 B0000000 ${filesize}\0" \ |
3e38691e WD |
67 | "" |
68 | #define CONFIG_BOOTCOMMAND "run flash_self" | |
69 | ||
1d2c6bc4 | 70 | |
7f5c0157 JL |
71 | /* |
72 | * BOOTP options | |
73 | */ | |
74 | #define CONFIG_BOOTP_BOOTFILESIZE | |
75 | #define CONFIG_BOOTP_BOOTPATH | |
76 | #define CONFIG_BOOTP_GATEWAY | |
77 | #define CONFIG_BOOTP_HOSTNAME | |
78 | ||
79 | ||
1d2c6bc4 JL |
80 | /* |
81 | * Command line configuration. | |
82 | */ | |
83 | #include <config_cmd_default.h> | |
84 | ||
85 | #define CONFIG_CMD_ASKENV | |
86 | #define CONFIG_CMD_DHCP | |
87 | #define CONFIG_CMD_ELF | |
88 | #define CONFIG_CMD_JFFS2 | |
89 | #define CONFIG_CMD_NFS | |
90 | #define CONFIG_CMD_PING | |
91 | #define CONFIG_CMD_SNTP | |
92 | ||
c021880a WD |
93 | |
94 | /* | |
95 | * Miscellaneous configurable options | |
96 | */ | |
6d0f6bcf JCPV |
97 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
98 | #define CONFIG_SYS_PROMPT "INCA-IP # " /* Monitor Command Prompt */ | |
99 | #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ | |
100 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ | |
101 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args*/ | |
c021880a | 102 | |
6d0f6bcf | 103 | #define CONFIG_SYS_MALLOC_LEN 128*1024 |
3e38691e | 104 | |
6d0f6bcf | 105 | #define CONFIG_SYS_BOOTPARAMS_LEN 128*1024 |
3e38691e | 106 | |
6d0f6bcf | 107 | #define CONFIG_SYS_MIPS_TIMER_FREQ (incaip_get_cpuclk() / 2) |
a55d4817 | 108 | |
6d0f6bcf | 109 | #define CONFIG_SYS_HZ 1000 |
3e38691e | 110 | |
6d0f6bcf | 111 | #define CONFIG_SYS_SDRAM_BASE 0x80000000 |
3e38691e | 112 | |
6d0f6bcf | 113 | #define CONFIG_SYS_LOAD_ADDR 0x80100000 /* default load address */ |
c021880a | 114 | |
6d0f6bcf JCPV |
115 | #define CONFIG_SYS_MEMTEST_START 0x80100000 |
116 | #define CONFIG_SYS_MEMTEST_END 0x80800000 | |
c021880a WD |
117 | |
118 | /*----------------------------------------------------------------------- | |
119 | * FLASH and environment organization | |
120 | */ | |
6d0f6bcf JCPV |
121 | #define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */ |
122 | #define CONFIG_SYS_MAX_FLASH_SECT (128) /* max number of sectors on one chip */ | |
c021880a WD |
123 | |
124 | #define PHYS_FLASH_1 0xb0000000 /* Flash Bank #1 */ | |
125 | #define PHYS_FLASH_2 0xb0800000 /* Flash Bank #2 */ | |
126 | ||
127 | /* The following #defines are needed to get flash environment right */ | |
14d0a02a | 128 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE |
6d0f6bcf | 129 | #define CONFIG_SYS_MONITOR_LEN (192 << 10) |
c021880a | 130 | |
6d0f6bcf | 131 | #define CONFIG_SYS_INIT_SP_OFFSET 0x400000 |
c021880a | 132 | |
6d0f6bcf | 133 | #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 |
c021880a WD |
134 | |
135 | /* timeout values are in ticks */ | |
6d0f6bcf JCPV |
136 | #define CONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS_HZ) /* Timeout for Flash Erase */ |
137 | #define CONFIG_SYS_FLASH_WRITE_TOUT (2 * CONFIG_SYS_HZ) /* Timeout for Flash Write */ | |
c021880a | 138 | |
5a1aceb0 | 139 | #define CONFIG_ENV_IS_IN_FLASH 1 |
c021880a WD |
140 | |
141 | /* Address and size of Primary Environment Sector */ | |
0e8d1586 JCPV |
142 | #define CONFIG_ENV_ADDR 0xB0030000 |
143 | #define CONFIG_ENV_SIZE 0x10000 | |
c021880a WD |
144 | |
145 | #define CONFIG_FLASH_16BIT | |
146 | ||
147 | #define CONFIG_NR_DRAM_BANKS 1 | |
148 | ||
149 | #define CONFIG_INCA_IP_SWITCH | |
0c852a28 | 150 | #define CONFIG_INCA_IP_SWITCH_AMDIX |
c021880a | 151 | |
700a0c64 WD |
152 | /* |
153 | * JFFS2 partitions | |
154 | */ | |
155 | /* No command line, one static partition, use all space on the device */ | |
68d7d651 | 156 | #undef CONFIG_CMD_MTDPARTS |
700a0c64 WD |
157 | #define CONFIG_JFFS2_DEV "nor1" |
158 | #define CONFIG_JFFS2_PART_SIZE 0xFFFFFFFF | |
159 | #define CONFIG_JFFS2_PART_OFFSET 0x00000000 | |
160 | ||
161 | /* mtdparts command line support */ | |
162 | /* | |
68d7d651 | 163 | #define CONFIG_CMD_MTDPARTS |
700a0c64 WD |
164 | #define MTDIDS_DEFAULT "nor0=INCA-IP Bank 0" |
165 | #define MTDPARTS_DEFAULT "mtdparts=INCA-IP Bank 0:192k(uboot)," \ | |
166 | "64k(env)," \ | |
167 | "768k(linux)," \ | |
168 | "1m@3m(rootfs)," \ | |
169 | "768k(linux2)," \ | |
170 | "3m@5m(rootfs2)" | |
171 | */ | |
5c745d26 | 172 | |
c021880a WD |
173 | /*----------------------------------------------------------------------- |
174 | * Cache Configuration | |
175 | */ | |
6d0f6bcf JCPV |
176 | #define CONFIG_SYS_DCACHE_SIZE 4096 |
177 | #define CONFIG_SYS_ICACHE_SIZE 4096 | |
178 | #define CONFIG_SYS_CACHELINE_SIZE 16 | |
c021880a WD |
179 | |
180 | #endif /* __CONFIG_H */ |