[people/ms/u-boot.git] / include / configs / integrator-common.h

/*
 * (C) Copyright 2012
 * Linaro
 * Linus Walleij <linus.walleij@linaro.org>
 * Common ARM Integrator configuration settings
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#define CONFIG_SYS_TEXT_BASE		0x01000000
#define CONFIG_SYS_MEMTEST_START	0x100000
#define CONFIG_SYS_MEMTEST_END		0x10000000
#define CONFIG_SYS_TIMERBASE		0x13000100	/* Timer1 */
#define CONFIG_SYS_LOAD_ADDR		0x7fc0	/* default load address */
#define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_HUSH_PARSER
#define CONFIG_SYS_CBSIZE		256	/* Console I/O Buffer Size*/
#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
#define CONFIG_SYS_MAXARGS		16	/* max number of command args */
#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size*/
#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 128*1024) /* Size of malloc() pool */

/* Serial port PL010/PL011 through the device model */
#define CONFIG_PL01X_SERIAL
#define CONFIG_BAUDRATE			38400
#define CONFIG_CONS_INDEX		0

#define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs  */
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_OF_LIBFDT		/* enable passing a Device Tree */
#define CONFIG_MISC_INIT_R		/* call misc_init_r during start up */
#define CONFIG_SYS_GENERIC_BOARD

/*
 * There are various dependencies on the core module (CM) fitted
 * Users should refer to their CM user guide
 */
#include "armcoremodule.h"

/*
 * Initialize and remap the core module, use SPD to detect memory size
 * If CONFIG_SKIP_LOWLEVEL_INIT is not defined &
 * the core module has a CM_INIT register
 * then the U-Boot initialisation code will
 * e.g. ARM Boot Monitor or pre-loader is repeated once
 * (to re-initialise any existing CM_INIT settings to safe values).
 *
 * This is usually not the desired behaviour since the platform
 * will either reboot into the ARM monitor (or pre-loader)
 * or continuously cycle thru it without U-Boot running,
 * depending upon the setting of Integrator/CP switch S2-4.
 *
 * However it may be needed if Integrator/CP switch S2-1
 * is set OFF to boot direct into U-Boot.
 * In that case comment out the line below.
 */
#define CONFIG_CM_INIT
#define CONFIG_CM_REMAP
#define CONFIG_CM_SPD_DETECT

/*
 * The ARM boot monitor initializes the board.
 * However, the default U-Boot code also performs the initialization.
 * If desired, this can be prevented by defining SKIP_LOWLEVEL_INIT
 * - see documentation supplied with board for details of how to choose the
 * image to run at reset/power up
 * e.g. whether the ARM Boot Monitor runs before U-Boot
 */
/* #define CONFIG_SKIP_LOWLEVEL_INIT */

/*
 * The ARM boot monitor does not relocate U-Boot.
 * However, the default U-Boot code performs the relocation check,
 * and may relocate the code if the memory map is changed.
 * If necessary this can be prevented by defining SKIP_RELOCATE_UBOOT
 */
/* #define SKIP_CONFIG_RELOCATE_UBOOT */


/*
 * Physical Memory Map
 */
#define CONFIG_NR_DRAM_BANKS	1		/* we have 1 bank of DRAM */
#define PHYS_SDRAM_1		0x00000000	/* SDRAM Bank #1 */
#define PHYS_SDRAM_1_SIZE	0x08000000	/* 128 MB */
#define CONFIG_SYS_SDRAM_BASE	PHYS_SDRAM_1
#define CONFIG_SYS_INIT_RAM_SIZE PHYS_SDRAM_1_SIZE
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_BASE + \
				    CONFIG_SYS_INIT_RAM_SIZE - \
				    GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_GBL_DATA_OFFSET

/*
 * FLASH and environment organization
 * Top varies according to amount fitted
 * Reserve top 4 blocks of flash
 * - ARM Boot Monitor
 * - Unused
 * - SIB block
 * - U-Boot environment
 */
#define CONFIG_CMD_ARMFLASH
#define CONFIG_SYS_FLASH_CFI		1
#define CONFIG_FLASH_CFI_DRIVER		1
#define CONFIG_SYS_FLASH_BASE		0x24000000
#define CONFIG_SYS_MAX_FLASH_BANKS	1

/* Timeout values in ticks */
#define CONFIG_SYS_FLASH_ERASE_TOUT	(2 * CONFIG_SYS_HZ) /* Erase Timeout */
#define CONFIG_SYS_FLASH_WRITE_TOUT	(2 * CONFIG_SYS_HZ) /* Write Timeout */
#define CONFIG_SYS_FLASH_PROTECTION	/* The devices have real protection */
#define CONFIG_SYS_FLASH_EMPTY_INFO	/* flinfo indicates empty blocks */
Commit	Line	Data
e62b008f LW	1	/*
	2	* (C) Copyright 2012
	3	* Linaro
	4	* Linus Walleij <linus.walleij@linaro.org>
	5	* Common ARM Integrator configuration settings
	6	*
3765b3e7	7	* SPDX-License-Identifier: GPL-2.0+
e62b008f LW	8	*/
e62b008f LW	9
e62b008f LW	10	#define CONFIG_SYS_TEXT_BASE 0x01000000
	11	#define CONFIG_SYS_MEMTEST_START 0x100000
	12	#define CONFIG_SYS_MEMTEST_END 0x10000000
e62b008f LW	13	#define CONFIG_SYS_TIMERBASE 0x13000100 /* Timer1 */
	14	#define CONFIG_SYS_LOAD_ADDR 0x7fc0 /* default load address */
	15	#define CONFIG_SYS_LONGHELP
	16	#define CONFIG_SYS_HUSH_PARSER
	17	#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size*/
	18	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
	19	#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
	20	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size*/
	21	#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1281024) / Size of malloc() pool */
	22
3f394e70 LW	23	/* Serial port PL010/PL011 through the device model */
	24	#define CONFIG_PL01X_SERIAL
	25	#define CONFIG_BAUDRATE 38400
	26	#define CONFIG_CONS_INDEX 0
	27
e62b008f LW	28	#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
e62b008f LW	29	#define CONFIG_SETUP_MEMORY_TAGS
5e7ffaa4	30	#define CONFIG_OF_LIBFDT /* enable passing a Device Tree */
e62b008f	31	#define CONFIG_MISC_INIT_R /* call misc_init_r during start up */
7285c095	32	#define CONFIG_SYS_GENERIC_BOARD
e62b008f LW	33
	34	/*
	35	* There are various dependencies on the core module (CM) fitted
	36	* Users should refer to their CM user guide
	37	*/
	38	#include "armcoremodule.h"
	39
	40	/*
	41	* Initialize and remap the core module, use SPD to detect memory size
	42	* If CONFIG_SKIP_LOWLEVEL_INIT is not defined &
	43	* the core module has a CM_INIT register
	44	* then the U-Boot initialisation code will
	45	* e.g. ARM Boot Monitor or pre-loader is repeated once
	46	* (to re-initialise any existing CM_INIT settings to safe values).
	47	*
	48	* This is usually not the desired behaviour since the platform
	49	* will either reboot into the ARM monitor (or pre-loader)
	50	* or continuously cycle thru it without U-Boot running,
	51	* depending upon the setting of Integrator/CP switch S2-4.
	52	*
	53	* However it may be needed if Integrator/CP switch S2-1
	54	* is set OFF to boot direct into U-Boot.
	55	* In that case comment out the line below.
	56	*/
	57	#define CONFIG_CM_INIT
	58	#define CONFIG_CM_REMAP
	59	#define CONFIG_CM_SPD_DETECT
	60
	61	/*
	62	* The ARM boot monitor initializes the board.
	63	* However, the default U-Boot code also performs the initialization.
	64	* If desired, this can be prevented by defining SKIP_LOWLEVEL_INIT
	65	* - see documentation supplied with board for details of how to choose the
	66	* image to run at reset/power up
	67	* e.g. whether the ARM Boot Monitor runs before U-Boot
	68	*/
	69	/* #define CONFIG_SKIP_LOWLEVEL_INIT */
	70
	71	/*
	72	* The ARM boot monitor does not relocate U-Boot.
	73	* However, the default U-Boot code performs the relocation check,
	74	* and may relocate the code if the memory map is changed.
	75	* If necessary this can be prevented by defining SKIP_RELOCATE_UBOOT
	76	*/
	77	/* #define SKIP_CONFIG_RELOCATE_UBOOT */
	78
	79
	80	/*
	81	* Physical Memory Map
	82	*/
	83	#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
	84	#define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */
	85	#define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */
	86	#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
	87	#define CONFIG_SYS_INIT_RAM_SIZE PHYS_SDRAM_1_SIZE
	88	#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_BASE + \
	89	CONFIG_SYS_INIT_RAM_SIZE - \
	90	GENERATED_GBL_DATA_SIZE)
	91	#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_GBL_DATA_OFFSET
a7b00a7b LW	92
	93	/*
	94	* FLASH and environment organization
	95	* Top varies according to amount fitted
	96	* Reserve top 4 blocks of flash
	97	* - ARM Boot Monitor
	98	* - Unused
	99	* - SIB block
	100	* - U-Boot environment
	101	*/
a7b00a7b LW	102	#define CONFIG_CMD_ARMFLASH
	103	#define CONFIG_SYS_FLASH_CFI 1
	104	#define CONFIG_FLASH_CFI_DRIVER 1
	105	#define CONFIG_SYS_FLASH_BASE 0x24000000
	106	#define CONFIG_SYS_MAX_FLASH_BANKS 1
	107
	108	/* Timeout values in ticks */
	109	#define CONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS_HZ) /* Erase Timeout */
	110	#define CONFIG_SYS_FLASH_WRITE_TOUT (2 * CONFIG_SYS_HZ) /* Write Timeout */
	111	#define CONFIG_SYS_FLASH_PROTECTION /* The devices have real protection */
	112	#define CONFIG_SYS_FLASH_EMPTY_INFO /* flinfo indicates empty blocks */