projects / people / ms / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 1251e490 NI |
1 | /* |
| 2 | * include/configs/koelsch.h | |
| 3 | * | |
| 4 | * Copyright (C) 2013 Renesas Electronics Corporation | |
| 5 | * | |
| 6 | * SPDX-License-Identifier: GPL-2.0 | |
| 7 | */ | |
| 8 | ||
| 9 | #ifndef __KOELSCH_H | |
| 10 | #define __KOELSCH_H | |
| 11 | ||
| 12 | #undef DEBUG | |
| 1251e490 | 13 | #define CONFIG_R8A7791 |
| 1251e490 | 14 | #define CONFIG_RMOBILE_BOARD_STRING "Koelsch" |
| 1251e490 | 15 | |
| 5ca6dfe6 | 16 | #include "rcar-gen2-common.h" |
| b6c96f7f | 17 | |
| 69191fed NI |
18 | #if defined(CONFIG_RMOBILE_EXTRAM_BOOT) |
| 19 | #define CONFIG_SYS_TEXT_BASE 0x70000000 | |
| 20 | #else | |
| c71b4dd2 | 21 | #define CONFIG_SYS_TEXT_BASE 0xE6304000 |
| 69191fed NI |
22 | #endif |
| 23 | ||
| 1251e490 | 24 | /* STACK */ |
| 69191fed NI |
25 | #if defined(CONFIG_RMOBILE_EXTRAM_BOOT) |
| 26 | #define CONFIG_SYS_INIT_SP_ADDR 0x7003FFFC | |
| 27 | #else | |
| 28 | #define CONFIG_SYS_INIT_SP_ADDR 0xE633fffC | |
| 29 | #endif | |
| 30 | ||
| 31 | #define STACK_AREA_SIZE 0xC000 | |
| 1251e490 NI |
32 | #define LOW_LEVEL_MERAM_STACK \ |
| 33 | (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4) | |
| 34 | ||
| 35 | /* MEMORY */ | |
| 5ca6dfe6 NI |
36 | #define RCAR_GEN2_SDRAM_BASE 0x40000000 |
| 37 | #define RCAR_GEN2_SDRAM_SIZE (2048u * 1024 * 1024) | |
| 38 | #define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024) | |
| 1251e490 NI |
39 | |
| 40 | /* SCIF */ | |
| 41 | #define CONFIG_SCIF_CONSOLE | |
| 42 | #define CONFIG_CONS_SCIF0 | |
| cc45a610 | 43 | #define CONFIG_SCIF_USE_EXT_CLK |
| 1251e490 NI |
44 | |
| 45 | /* FLASH */ | |
| c71b4dd2 NI |
46 | #define CONFIG_SYS_NO_FLASH |
| 47 | #define CONFIG_SPI | |
| 48 | #define CONFIG_SH_QSPI | |
| 49 | #define CONFIG_SPI_FLASH | |
| 50 | #define CONFIG_SPI_FLASH_BAR | |
| 51 | #define CONFIG_SPI_FLASH_SPANSION | |
| 1251e490 | 52 | |
| 90362c0c NI |
53 | /* SH Ether */ |
| 54 | #define CONFIG_NET_MULTI | |
| 55 | #define CONFIG_SH_ETHER | |
| 56 | #define CONFIG_SH_ETHER_USE_PORT 0 | |
| 57 | #define CONFIG_SH_ETHER_PHY_ADDR 0x1 | |
| 58 | #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII | |
| 59 | #define CONFIG_SH_ETHER_CACHE_WRITEBACK | |
| 60 | #define CONFIG_SH_ETHER_CACHE_INVALIDATE | |
| 61 | #define CONFIG_PHYLIB | |
| 62 | #define CONFIG_PHY_MICREL | |
| 63 | #define CONFIG_BITBANGMII | |
| 64 | #define CONFIG_BITBANGMII_MULTI | |
| 65 | #define CONFIG_SH_ETHER_ALIGNE_SIZE 64 | |
| 66 | ||
| 1251e490 | 67 | /* Board Clock */ |
| ae8e1d9d NI |
68 | #define RMOBILE_XTAL_CLK 20000000u |
| 69 | #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK | |
| 70 | #define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2) | |
| 1251e490 NI |
71 | #define CONFIG_SH_SCIF_CLK_FREQ 14745600 |
| 72 | #define CONFIG_SYS_TMU_CLK_DIV 4 | |
| 1251e490 | 73 | |
| bb611cce NI |
74 | /* i2c */ |
| 75 | #define CONFIG_CMD_I2C | |
| 76 | #define CONFIG_SYS_I2C | |
| 77 | #define CONFIG_SYS_I2C_SH | |
| 78 | #define CONFIG_SYS_I2C_SLAVE 0x7F | |
| 79 | #define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 3 | |
| bb611cce | 80 | #define CONFIG_SYS_I2C_SH_SPEED0 400000 |
| bb611cce | 81 | #define CONFIG_SYS_I2C_SH_SPEED1 400000 |
| bb611cce NI |
82 | #define CONFIG_SYS_I2C_SH_SPEED2 400000 |
| 83 | #define CONFIG_SH_I2C_DATA_HIGH 4 | |
| 84 | #define CONFIG_SH_I2C_DATA_LOW 5 | |
| 85 | #define CONFIG_SH_I2C_CLOCK 10000000 | |
| 86 | ||
| b8f383b8 NI |
87 | #define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */ |
| 88 | ||
| aa44ae32 NI |
89 | /* USB */ |
| 90 | #define CONFIG_USB_EHCI | |
| 91 | #define CONFIG_USB_EHCI_RMOBILE | |
| 5906fade | 92 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 |
| aa44ae32 NI |
93 | #define CONFIG_USB_STORAGE |
| 94 | ||
| 1251e490 | 95 | #endif /* __KOELSCH_H */ |