[people/ms/u-boot.git] / include / configs / koelsch.h

/*
 * include/configs/koelsch.h
 *
 * Copyright (C) 2013 Renesas Electronics Corporation
 *
 * SPDX-License-Identifier: GPL-2.0
 */

#ifndef __KOELSCH_H
#define __KOELSCH_H

#undef DEBUG
#define CONFIG_ARMV7
#define CONFIG_R8A7791
#define CONFIG_RMOBILE
#define CONFIG_RMOBILE_BOARD_STRING "Koelsch"
#define CONFIG_SH_GPIO_PFC

#include <asm/arch/rmobile.h>

#define CONFIG_CMD_EDITENV
#define CONFIG_CMD_SAVEENV
#define CONFIG_CMD_MEMORY
#define CONFIG_CMD_DFL
#define CONFIG_CMD_SDRAM
#define CONFIG_CMD_RUN
#define CONFIG_CMD_LOADS
#define CONFIG_CMD_NET
#define CONFIG_CMD_MII
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_NFS
#define CONFIG_CMD_BOOTZ

#if defined(CONFIG_SYS_USE_BOOT_NORFLASH)
#define	CONFIG_CMD_FLASH
#define CONFIG_SYS_TEXT_BASE	0x00000000
#else
/* SPI flash boot is default. */
#define CONFIG_CMD_SF
#define CONFIG_CMD_SPI
#define CONFIG_SYS_TEXT_BASE	0xE6304000
#endif

#define	CONFIG_CMDLINE_TAG
#define	CONFIG_SETUP_MEMORY_TAGS
#define	CONFIG_INITRD_TAG
#define	CONFIG_CMDLINE_EDITING

#define CONFIG_OF_LIBFDT
#define BOARD_LATE_INIT

#define CONFIG_BAUDRATE		38400
#define CONFIG_BOOTDELAY	3
#define CONFIG_BOOTARGS		""

#define CONFIG_VERSION_VARIABLE
#undef	CONFIG_SHOW_BOOT_PROGRESS

#define CONFIG_ARCH_CPU_INIT
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_USE_ARCH_MEMSET
#define CONFIG_USE_ARCH_MEMCPY
#define CONFIG_TMU_TIMER

/* STACK */
#define CONFIG_SYS_INIT_SP_ADDR		0xE633fffc
#define STACK_AREA_SIZE				0xC000
#define LOW_LEVEL_MERAM_STACK	\
		(CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)

/* MEMORY */
#define KOELSCH_SDRAM_BASE	0x40000000
#define KOELSCH_SDRAM_SIZE	(2048u * 1024 * 1024)
#define KOELSCH_UBOOT_SDRAM_SIZE	(512 * 1024 * 1024)

#define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_CBSIZE		256
#define CONFIG_SYS_PBSIZE		256
#define CONFIG_SYS_MAXARGS		16
#define CONFIG_SYS_BARGSIZE		512
#define CONFIG_SYS_BAUDRATE_TABLE	{ 38400, 115200 }

/* SCIF */
#define CONFIG_SCIF_CONSOLE
#define CONFIG_CONS_SCIF0
#define SCIF0_BASE		0xe6e60000
#undef	CONFIG_SYS_CONSOLE_INFO_QUIET
#undef	CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
#undef	CONFIG_SYS_CONSOLE_ENV_OVERWRITE

#define CONFIG_SYS_MEMTEST_START	(KOELSCH_SDRAM_BASE)
#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + \
					 504 * 1024 * 1024)
#undef	CONFIG_SYS_ALT_MEMTEST
#undef	CONFIG_SYS_MEMTEST_SCRATCH
#undef	CONFIG_SYS_LOADS_BAUD_CHANGE

#define CONFIG_SYS_SDRAM_BASE		(KOELSCH_SDRAM_BASE)
#define CONFIG_SYS_SDRAM_SIZE		(KOELSCH_UBOOT_SDRAM_SIZE)
#define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x7fc0)
#define CONFIG_NR_DRAM_BANKS		1

#define CONFIG_SYS_MONITOR_BASE		0x00000000
#define CONFIG_SYS_MONITOR_LEN		(256 * 1024)
#define CONFIG_SYS_MALLOC_LEN		(1 * 1024 * 1024)
#define CONFIG_SYS_GBL_DATA_SIZE	(256)
#define CONFIG_SYS_BOOTMAPSZ		(8 * 1024 * 1024)

/* FLASH */
#if defined(CONFIG_SYS_USE_BOOT_NORFLASH)
#define CONFIG_SYS_FLASH_CFI
#define CONFIG_SYS_FLASH_CFI_WIDTH	FLASH_CFI_16BIT
#define	CONFIG_FLASH_CFI_DRIVER
#define	CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
#define	CONFIG_FLASH_SHOW_PROGRESS	45
#define CONFIG_SYS_FLASH_BASE		0x00000000
#define	CONFIG_SYS_FLASH_SIZE		0x04000000	/* 64 MB */
#define CONFIG_SYS_MAX_FLASH_SECT	1024
#define CONFIG_SYS_MAX_FLASH_BANKS	1
#define CONFIG_SYS_FLASH_BANKS_LIST	{ (CONFIG_SYS_FLASH_BASE) }
#define	CONFIG_SYS_FLASH_BANKS_SIZES	{ (CONFIG_SYS_FLASH_SIZE) }
#define CONFIG_SYS_FLASH_ERASE_TOUT	3000
#define CONFIG_SYS_FLASH_WRITE_TOUT	3000
#define CONFIG_SYS_FLASH_LOCK_TOUT	3000
#define CONFIG_SYS_FLASH_UNLOCK_TOUT	3000
/* ENV setting */
#define CONFIG_ENV_IS_IN_FLASH
#define CONFIG_ENV_ADDR		(CONFIG_SYS_FLASH_BASE + \
				 CONFIG_SYS_MONITOR_LEN)

#else /* CONFIG_SYS_USE_BOOT_NORFLASH */

#define CONFIG_SYS_NO_FLASH
#define CONFIG_SPI
#define CONFIG_SH_QSPI
#define CONFIG_SPI_FLASH
#define CONFIG_SPI_FLASH_BAR
#define CONFIG_SPI_FLASH_SPANSION
/* ENV setting */
#define CONFIG_ENV_IS_IN_SPI_FLASH
#define CONFIG_ENV_ADDR	0xC0000

#endif /* CONFIG_SYS_USE_BOOT_NORFLASH */

/* Common ENV setting */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_ENV_SECT_SIZE	(256 * 1024)
#define CONFIG_ENV_OFFSET	(CONFIG_ENV_ADDR)
#define CONFIG_ENV_SIZE		(CONFIG_ENV_SECT_SIZE)
#define CONFIG_ENV_SIZE_REDUND	(CONFIG_SYS_MONITOR_LEN)

/* SH Ether */
#define	CONFIG_NET_MULTI
#define CONFIG_SH_ETHER
#define CONFIG_SH_ETHER_USE_PORT	0
#define CONFIG_SH_ETHER_PHY_ADDR	0x1
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
#define CONFIG_SH_ETHER_CACHE_WRITEBACK
#define CONFIG_SH_ETHER_CACHE_INVALIDATE
#define CONFIG_PHYLIB
#define CONFIG_PHY_MICREL
#define CONFIG_BITBANGMII
#define CONFIG_BITBANGMII_MULTI
#define CONFIG_SH_ETHER_ALIGNE_SIZE 64

/* Board Clock */
#define	CONFIG_SYS_CLK_FREQ	10000000
#define CONFIG_SH_TMU_CLK_FREQ	CONFIG_SYS_CLK_FREQ
#define CONFIG_SH_SCIF_CLK_FREQ	14745600
#define CONFIG_SYS_TMU_CLK_DIV	4

/* i2c */
#define CONFIG_CMD_I2C
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_SH
#define CONFIG_SYS_I2C_SLAVE	0x7F
#define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS	3
#define CONFIG_SYS_I2C_SH_BASE0		0xE6500000
#define CONFIG_SYS_I2C_SH_SPEED0	400000
#define CONFIG_SYS_I2C_SH_BASE1		0xE6510000
#define CONFIG_SYS_I2C_SH_SPEED1	400000
#define CONFIG_SYS_I2C_SH_BASE2		0xE60B0000
#define CONFIG_SYS_I2C_SH_SPEED2	400000
#define CONFIG_SH_I2C_DATA_HIGH	4
#define CONFIG_SH_I2C_DATA_LOW	5
#define CONFIG_SH_I2C_CLOCK	10000000

#define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */

#endif	/* __KOELSCH_H */
Commit	Line	Data
1251e490 NI	1	/*
	2	* include/configs/koelsch.h
	3	*
	4	* Copyright (C) 2013 Renesas Electronics Corporation
	5	*
	6	* SPDX-License-Identifier: GPL-2.0
	7	*/
	8
	9	#ifndef __KOELSCH_H
	10	#define __KOELSCH_H
	11
	12	#undef DEBUG
	13	#define CONFIG_ARMV7
	14	#define CONFIG_R8A7791
	15	#define CONFIG_RMOBILE
	16	#define CONFIG_RMOBILE_BOARD_STRING "Koelsch"
	17	#define CONFIG_SH_GPIO_PFC
	18
	19	#include <asm/arch/rmobile.h>
	20
90362c0c NI	21	#define CONFIG_CMD_EDITENV
90362c0c NI	22	#define CONFIG_CMD_SAVEENV
1251e490 NI	23	#define CONFIG_CMD_MEMORY
	24	#define CONFIG_CMD_DFL
	25	#define CONFIG_CMD_SDRAM
	26	#define CONFIG_CMD_RUN
	27	#define CONFIG_CMD_LOADS
90362c0c NI	28	#define CONFIG_CMD_NET
	29	#define CONFIG_CMD_MII
	30	#define CONFIG_CMD_PING
	31	#define CONFIG_CMD_DHCP
	32	#define CONFIG_CMD_NFS
1251e490	33	#define CONFIG_CMD_BOOTZ
c71b4dd2 NI	34
c71b4dd2 NI	35	#if defined(CONFIG_SYS_USE_BOOT_NORFLASH)
1251e490	36	#define CONFIG_CMD_FLASH
c71b4dd2 NI	37	#define CONFIG_SYS_TEXT_BASE 0x00000000
	38	#else
	39	/* SPI flash boot is default. */
	40	#define CONFIG_CMD_SF
	41	#define CONFIG_CMD_SPI
	42	#define CONFIG_SYS_TEXT_BASE 0xE6304000
	43	#endif
1251e490 NI	44
	45	#define CONFIG_CMDLINE_TAG
	46	#define CONFIG_SETUP_MEMORY_TAGS
	47	#define CONFIG_INITRD_TAG
	48	#define CONFIG_CMDLINE_EDITING
	49
	50	#define CONFIG_OF_LIBFDT
	51	#define BOARD_LATE_INIT
	52
	53	#define CONFIG_BAUDRATE 38400
	54	#define CONFIG_BOOTDELAY 3
	55	#define CONFIG_BOOTARGS ""
	56
	57	#define CONFIG_VERSION_VARIABLE
	58	#undef CONFIG_SHOW_BOOT_PROGRESS
	59
	60	#define CONFIG_ARCH_CPU_INIT
	61	#define CONFIG_DISPLAY_CPUINFO
	62	#define CONFIG_DISPLAY_BOARDINFO
	63	#define CONFIG_BOARD_EARLY_INIT_F
	64	#define CONFIG_USE_ARCH_MEMSET
	65	#define CONFIG_USE_ARCH_MEMCPY
	66	#define CONFIG_TMU_TIMER
	67
	68	/* STACK */
	69	#define CONFIG_SYS_INIT_SP_ADDR 0xE633fffc
	70	#define STACK_AREA_SIZE 0xC000
	71	#define LOW_LEVEL_MERAM_STACK \
	72	(CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
	73
	74	/* MEMORY */
	75	#define KOELSCH_SDRAM_BASE 0x40000000
	76	#define KOELSCH_SDRAM_SIZE (2048u * 1024 * 1024)
	77	#define KOELSCH_UBOOT_SDRAM_SIZE (512 * 1024 * 1024)
	78
	79	#define CONFIG_SYS_LONGHELP
	80	#define CONFIG_SYS_CBSIZE 256
	81	#define CONFIG_SYS_PBSIZE 256
	82	#define CONFIG_SYS_MAXARGS 16
	83	#define CONFIG_SYS_BARGSIZE 512
	84	#define CONFIG_SYS_BAUDRATE_TABLE { 38400, 115200 }
	85
	86	/* SCIF */
	87	#define CONFIG_SCIF_CONSOLE
	88	#define CONFIG_CONS_SCIF0
	89	#define SCIF0_BASE 0xe6e60000
	90	#undef CONFIG_SYS_CONSOLE_INFO_QUIET
	91	#undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
	92	#undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE
	93
	94	#define CONFIG_SYS_MEMTEST_START (KOELSCH_SDRAM_BASE)
	95	#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \
	96	504 * 1024 * 1024)
	97	#undef CONFIG_SYS_ALT_MEMTEST
	98	#undef CONFIG_SYS_MEMTEST_SCRATCH
	99	#undef CONFIG_SYS_LOADS_BAUD_CHANGE
	100
	101	#define CONFIG_SYS_SDRAM_BASE (KOELSCH_SDRAM_BASE)
	102	#define CONFIG_SYS_SDRAM_SIZE (KOELSCH_UBOOT_SDRAM_SIZE)
	103	#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fc0)
	104	#define CONFIG_NR_DRAM_BANKS 1
	105
	106	#define CONFIG_SYS_MONITOR_BASE 0x00000000
	107	#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
108	#define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024)
109	#define CONFIG_SYS_GBL_DATA_SIZE (256)
110	#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
111
112	/* FLASH */
c71b4dd2	113	#if defined(CONFIG_SYS_USE_BOOT_NORFLASH)
1251e490 NI	114	#define CONFIG_SYS_FLASH_CFI
	115	#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
	116	#define CONFIG_FLASH_CFI_DRIVER
	117	#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
	118	#define CONFIG_FLASH_SHOW_PROGRESS 45
	119	#define CONFIG_SYS_FLASH_BASE 0x00000000
	120	#define CONFIG_SYS_FLASH_SIZE 0x04000000 /* 64 MB */
	121	#define CONFIG_SYS_MAX_FLASH_SECT 1024
	122	#define CONFIG_SYS_MAX_FLASH_BANKS 1
	123	#define CONFIG_SYS_FLASH_BANKS_LIST { (CONFIG_SYS_FLASH_BASE) }
	124	#define CONFIG_SYS_FLASH_BANKS_SIZES { (CONFIG_SYS_FLASH_SIZE) }
	125	#define CONFIG_SYS_FLASH_ERASE_TOUT 3000
	126	#define CONFIG_SYS_FLASH_WRITE_TOUT 3000
	127	#define CONFIG_SYS_FLASH_LOCK_TOUT 3000
	128	#define CONFIG_SYS_FLASH_UNLOCK_TOUT 3000
1251e490 NI	129	/* ENV setting */
1251e490 NI	130	#define CONFIG_ENV_IS_IN_FLASH
1251e490 NI	131	#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + \
1251e490 NI	132	CONFIG_SYS_MONITOR_LEN)
c71b4dd2 NI	133
	134	#else /* CONFIG_SYS_USE_BOOT_NORFLASH */
	135
	136	#define CONFIG_SYS_NO_FLASH
	137	#define CONFIG_SPI
	138	#define CONFIG_SH_QSPI
	139	#define CONFIG_SPI_FLASH
	140	#define CONFIG_SPI_FLASH_BAR
	141	#define CONFIG_SPI_FLASH_SPANSION
	142	/* ENV setting */
	143	#define CONFIG_ENV_IS_IN_SPI_FLASH
	144	#define CONFIG_ENV_ADDR 0xC0000
	145
	146	#endif /* CONFIG_SYS_USE_BOOT_NORFLASH */
	147
	148	/* Common ENV setting */
	149	#define CONFIG_ENV_OVERWRITE
	150	#define CONFIG_ENV_SECT_SIZE (256 * 1024)
1251e490 NI	151	#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR)
	152	#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
	153	#define CONFIG_ENV_SIZE_REDUND (CONFIG_SYS_MONITOR_LEN)
	154
90362c0c NI	155	/* SH Ether */
	156	#define CONFIG_NET_MULTI
	157	#define CONFIG_SH_ETHER
	158	#define CONFIG_SH_ETHER_USE_PORT 0
	159	#define CONFIG_SH_ETHER_PHY_ADDR 0x1
	160	#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
	161	#define CONFIG_SH_ETHER_CACHE_WRITEBACK
	162	#define CONFIG_SH_ETHER_CACHE_INVALIDATE
	163	#define CONFIG_PHYLIB
	164	#define CONFIG_PHY_MICREL
	165	#define CONFIG_BITBANGMII
	166	#define CONFIG_BITBANGMII_MULTI
	167	#define CONFIG_SH_ETHER_ALIGNE_SIZE 64
	168
1251e490 NI	169	/* Board Clock */
	170	#define CONFIG_SYS_CLK_FREQ 10000000
	171	#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
	172	#define CONFIG_SH_SCIF_CLK_FREQ 14745600
	173	#define CONFIG_SYS_TMU_CLK_DIV 4
1251e490	174
bb611cce NI	175	/* i2c */
	176	#define CONFIG_CMD_I2C
	177	#define CONFIG_SYS_I2C
	178	#define CONFIG_SYS_I2C_SH
	179	#define CONFIG_SYS_I2C_SLAVE 0x7F
	180	#define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 3
	181	#define CONFIG_SYS_I2C_SH_BASE0 0xE6500000
	182	#define CONFIG_SYS_I2C_SH_SPEED0 400000
	183	#define CONFIG_SYS_I2C_SH_BASE1 0xE6510000
	184	#define CONFIG_SYS_I2C_SH_SPEED1 400000
	185	#define CONFIG_SYS_I2C_SH_BASE2 0xE60B0000
	186	#define CONFIG_SYS_I2C_SH_SPEED2 400000
	187	#define CONFIG_SH_I2C_DATA_HIGH 4
	188	#define CONFIG_SH_I2C_DATA_LOW 5
	189	#define CONFIG_SH_I2C_CLOCK 10000000
	190
b8f383b8 NI	191	#define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */
b8f383b8 NI	192
1251e490	193	#endif /* __KOELSCH_H */