[people/ms/u-boot.git] / include / configs / lager.h

/*
 * include/configs/lager.h
 *     This file is lager board configuration.
 *
 * Copyright (C) 2013 Renesas Electronics Corporation
 *
 * SPDX-License-Identifier: GPL-2.0
 */

#ifndef __LAGER_H
#define __LAGER_H

#undef DEBUG
#define CONFIG_ARMV7
#define CONFIG_R8A7790
#define CONFIG_RMOBILE
#define CONFIG_RMOBILE_BOARD_STRING "Lager"
#define CONFIG_SH_GPIO_PFC
#define MACH_TYPE_LAGER		4538
#define CONFIG_MACH_TYPE	MACH_TYPE_LAGER

#include <asm/arch/rmobile.h>

#define	CONFIG_CMD_EDITENV
#define	CONFIG_CMD_SAVEENV
#define CONFIG_CMD_MEMORY
#define CONFIG_CMD_DFL
#define CONFIG_CMD_SDRAM
#define CONFIG_CMD_RUN
#define CONFIG_CMD_LOADS
#define CONFIG_CMD_NET
#define CONFIG_CMD_MII
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_NFS
#define CONFIG_CMD_BOOTZ

#if defined(CONFIG_SYS_USE_BOOT_NORFLASH)
#define CONFIG_CMD_FLASH
#define CONFIG_SYS_TEXT_BASE	0x00000000
#else
#define CONFIG_CMD_SF
#define CONFIG_CMD_SPI
#define CONFIG_SYS_TEXT_BASE	0xE8080000
#endif

#define	CONFIG_CMDLINE_TAG
#define	CONFIG_SETUP_MEMORY_TAGS
#define	CONFIG_INITRD_TAG
#define	CONFIG_CMDLINE_EDITING
#define	CONFIG_OF_LIBFDT

/* #define CONFIG_OF_LIBFDT */
#define BOARD_LATE_INIT

#define CONFIG_BAUDRATE		38400
#define CONFIG_BOOTDELAY	3
#define CONFIG_BOOTARGS		""

#define CONFIG_VERSION_VARIABLE
#undef	CONFIG_SHOW_BOOT_PROGRESS

#define CONFIG_ARCH_CPU_INIT
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_USE_ARCH_MEMSET
#define CONFIG_USE_ARCH_MEMCPY
#define CONFIG_TMU_TIMER

/* STACK */
#define CONFIG_SYS_INIT_SP_ADDR		0xE827fffc
#define STACK_AREA_SIZE				0xC000
#define LOW_LEVEL_MERAM_STACK	\
		(CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)

/* MEMORY */
#define LAGER_SDRAM_BASE	0x40000000
#define LAGER_SDRAM_SIZE	(2048u * 1024 * 1024)
#define LAGER_UBOOT_SDRAM_SIZE	(512 * 1024 * 1024)

#define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_CBSIZE		256
#define CONFIG_SYS_PBSIZE		256
#define CONFIG_SYS_MAXARGS		16
#define CONFIG_SYS_BARGSIZE		512
#define CONFIG_SYS_BAUDRATE_TABLE	{ 38400, 115200 }

/* SCIF */
#define CONFIG_SCIF_CONSOLE
#define CONFIG_CONS_SCIF0
#define SCIF0_BASE		0xe6e60000
#undef	CONFIG_SYS_CONSOLE_INFO_QUIET
#undef	CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
#undef	CONFIG_SYS_CONSOLE_ENV_OVERWRITE

#define CONFIG_SYS_MEMTEST_START	(LAGER_SDRAM_BASE)
#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + \
					 504 * 1024 * 1024)
#undef	CONFIG_SYS_ALT_MEMTEST
#undef	CONFIG_SYS_MEMTEST_SCRATCH
#undef	CONFIG_SYS_LOADS_BAUD_CHANGE

#define CONFIG_SYS_SDRAM_BASE		(LAGER_SDRAM_BASE)
#define CONFIG_SYS_SDRAM_SIZE		(LAGER_UBOOT_SDRAM_SIZE)
#define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x7fc0)
#define CONFIG_NR_DRAM_BANKS		1

#define CONFIG_SYS_MONITOR_BASE		0x00000000
#define CONFIG_SYS_MONITOR_LEN		(256 * 1024)
#define CONFIG_SYS_MALLOC_LEN		(1 * 1024 * 1024)
#define CONFIG_SYS_BOOTMAPSZ		(8 * 1024 * 1024)

#if defined(CONFIG_SYS_USE_BOOT_NORFLASH)
/* USE NOR FLASH */
#define CONFIG_SYS_FLASH_CFI
#define CONFIG_SYS_FLASH_CFI_WIDTH	FLASH_CFI_16BIT
#define	CONFIG_FLASH_CFI_DRIVER
#define	CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
#define	CONFIG_FLASH_SHOW_PROGRESS	45
#define CONFIG_SYS_FLASH_BASE		0x00000000
#define	CONFIG_SYS_FLASH_SIZE		0x04000000	/* 64 MB */
#define CONFIG_SYS_MAX_FLASH_SECT	1024
#define CONFIG_SYS_MAX_FLASH_BANKS	1
#define CONFIG_SYS_FLASH_BANKS_LIST	{ (CONFIG_SYS_FLASH_BASE) }
#define	CONFIG_SYS_FLASH_BANKS_SIZES	{ (CONFIG_SYS_FLASH_SIZE) }
#define CONFIG_SYS_FLASH_ERASE_TOUT	3000
#define CONFIG_SYS_FLASH_WRITE_TOUT	3000
#define CONFIG_SYS_FLASH_LOCK_TOUT	3000
#define CONFIG_SYS_FLASH_UNLOCK_TOUT	3000

/* ENV setting */
#define CONFIG_ENV_IS_IN_FLASH
#define CONFIG_ENV_ADDR		(CONFIG_SYS_FLASH_BASE + \
				 CONFIG_SYS_MONITOR_LEN)

#else /* CONFIG_SYS_USE_BOOT_NORFLASH */

/* USE SPI */
#define CONFIG_SPI
#define CONFIG_SPI_FLASH_BAR
#define CONFIG_SH_QSPI
#define CONFIG_SPI_FLASH
#define CONFIG_SPI_FLASH_SPANSION
#define CONFIG_SYS_NO_FLASH

/* ENV setting */
#define CONFIG_ENV_IS_IN_SPI_FLASH
#define CONFIG_ENV_ADDR	0xC0000
#endif

/* Common ENV setting */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_ENV_SECT_SIZE	(256 * 1024)
#define CONFIG_ENV_OFFSET	(CONFIG_ENV_ADDR)
#define CONFIG_ENV_SIZE		(CONFIG_ENV_SECT_SIZE)
#define CONFIG_ENV_SIZE_REDUND	(CONFIG_SYS_MONITOR_LEN)

/* SH Ether */
#define	CONFIG_NET_MULTI
#define CONFIG_SH_ETHER
#define CONFIG_SH_ETHER_USE_PORT	0
#define CONFIG_SH_ETHER_PHY_ADDR	0x1
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
#define CONFIG_SH_ETHER_ALIGNE_SIZE	64
#define CONFIG_SH_ETHER_CACHE_WRITEBACK
#define CONFIG_SH_ETHER_CACHE_INVALIDATE
#define CONFIG_PHYLIB
#define CONFIG_PHY_MICREL
#define CONFIG_BITBANGMII
#define CONFIG_BITBANGMII_MULTI

/* I2C */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_RCAR
#define CONFIG_SYS_RCAR_I2C0_BASE	0xE6508000
#define CONFIG_SYS_RCAR_I2C0_SPEED	400000
#define CONFIG_SYS_RCAR_I2C1_BASE	0xE6518000
#define CONFIG_SYS_RCAR_I2C1_SPEED	400000
#define CONFIG_SYS_RCAR_I2C2_BASE	0xE6530000
#define CONFIG_SYS_RCAR_I2C2_SPEED	400000
#define CONFIG_SYS_RCAR_I2C3_BASE	0xE6540000
#define CONFIG_SYS_RCAR_I2C3_SPEED	400000
#define CONFIF_SYS_RCAR_I2C_NUM_CONTROLLERS	4

#define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */

/* Board Clock */
#define CONFIG_BASE_CLK_FREQ	20000000u
#define CONFIG_SH_TMU_CLK_FREQ	(CONFIG_BASE_CLK_FREQ / 2) /* EXT / 2 */
#define CONFIG_PLL1_CLK_FREQ	(CONFIG_BASE_CLK_FREQ * 156 / 2)
#define CONFIG_PLL1_DIV2_CLK_FREQ	(CONFIG_PLL1_CLK_FREQ / 2)
#define CONFIG_MP_CLK_FREQ	(CONFIG_PLL1_DIV2_CLK_FREQ / 15)
#define CONFIG_HP_CLK_FREQ	(CONFIG_PLL1_CLK_FREQ / 12)
#define CONFIG_SH_SCIF_CLK_FREQ	CONFIG_MP_CLK_FREQ

#define CONFIG_SYS_TMU_CLK_DIV	4

#endif	/* __LAGER_H */
Commit	Line	Data
f4ec4522 NI	1	/*
	2	* include/configs/lager.h
	3	* This file is lager board configuration.
	4	*
	5	* Copyright (C) 2013 Renesas Electronics Corporation
	6	*
	7	* SPDX-License-Identifier: GPL-2.0
	8	*/
	9
	10	#ifndef __LAGER_H
	11	#define __LAGER_H
	12
	13	#undef DEBUG
	14	#define CONFIG_ARMV7
	15	#define CONFIG_R8A7790
	16	#define CONFIG_RMOBILE
	17	#define CONFIG_RMOBILE_BOARD_STRING "Lager"
	18	#define CONFIG_SH_GPIO_PFC
	19	#define MACH_TYPE_LAGER 4538
	20	#define CONFIG_MACH_TYPE MACH_TYPE_LAGER
	21
	22	#include <asm/arch/rmobile.h>
	23
	24	#define CONFIG_CMD_EDITENV
	25	#define CONFIG_CMD_SAVEENV
	26	#define CONFIG_CMD_MEMORY
	27	#define CONFIG_CMD_DFL
	28	#define CONFIG_CMD_SDRAM
	29	#define CONFIG_CMD_RUN
	30	#define CONFIG_CMD_LOADS
23565c6b NI	31	#define CONFIG_CMD_NET
	32	#define CONFIG_CMD_MII
	33	#define CONFIG_CMD_PING
	34	#define CONFIG_CMD_DHCP
	35	#define CONFIG_CMD_NFS
f4ec4522	36	#define CONFIG_CMD_BOOTZ
0e05b217 NI	37
	38	#if defined(CONFIG_SYS_USE_BOOT_NORFLASH)
	39	#define CONFIG_CMD_FLASH
	40	#define CONFIG_SYS_TEXT_BASE 0x00000000
	41	#else
	42	#define CONFIG_CMD_SF
	43	#define CONFIG_CMD_SPI
	44	#define CONFIG_SYS_TEXT_BASE 0xE8080000
	45	#endif
f4ec4522 NI	46
	47	#define CONFIG_CMDLINE_TAG
	48	#define CONFIG_SETUP_MEMORY_TAGS
	49	#define CONFIG_INITRD_TAG
	50	#define CONFIG_CMDLINE_EDITING
	51	#define CONFIG_OF_LIBFDT
	52
	53	/* #define CONFIG_OF_LIBFDT */
	54	#define BOARD_LATE_INIT
	55
	56	#define CONFIG_BAUDRATE 38400
	57	#define CONFIG_BOOTDELAY 3
	58	#define CONFIG_BOOTARGS ""
	59
	60	#define CONFIG_VERSION_VARIABLE
	61	#undef CONFIG_SHOW_BOOT_PROGRESS
	62
	63	#define CONFIG_ARCH_CPU_INIT
	64	#define CONFIG_DISPLAY_CPUINFO
	65	#define CONFIG_DISPLAY_BOARDINFO
	66	#define CONFIG_BOARD_EARLY_INIT_F
	67	#define CONFIG_USE_ARCH_MEMSET
	68	#define CONFIG_USE_ARCH_MEMCPY
	69	#define CONFIG_TMU_TIMER
	70
	71	/* STACK */
	72	#define CONFIG_SYS_INIT_SP_ADDR 0xE827fffc
	73	#define STACK_AREA_SIZE 0xC000
	74	#define LOW_LEVEL_MERAM_STACK \
	75	(CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
	76
	77	/* MEMORY */
	78	#define LAGER_SDRAM_BASE 0x40000000
	79	#define LAGER_SDRAM_SIZE (2048u * 1024 * 1024)
	80	#define LAGER_UBOOT_SDRAM_SIZE (512 * 1024 * 1024)
	81
	82	#define CONFIG_SYS_LONGHELP
	83	#define CONFIG_SYS_CBSIZE 256
	84	#define CONFIG_SYS_PBSIZE 256
	85	#define CONFIG_SYS_MAXARGS 16
	86	#define CONFIG_SYS_BARGSIZE 512
	87	#define CONFIG_SYS_BAUDRATE_TABLE { 38400, 115200 }
	88
	89	/* SCIF */
	90	#define CONFIG_SCIF_CONSOLE
	91	#define CONFIG_CONS_SCIF0
	92	#define SCIF0_BASE 0xe6e60000
	93	#undef CONFIG_SYS_CONSOLE_INFO_QUIET
	94	#undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
	95	#undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE
	96
	97	#define CONFIG_SYS_MEMTEST_START (LAGER_SDRAM_BASE)
	98	#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \
	99	504 * 1024 * 1024)
	100	#undef CONFIG_SYS_ALT_MEMTEST
	101	#undef CONFIG_SYS_MEMTEST_SCRATCH
	102	#undef CONFIG_SYS_LOADS_BAUD_CHANGE
	103
	104	#define CONFIG_SYS_SDRAM_BASE (LAGER_SDRAM_BASE)
	105	#define CONFIG_SYS_SDRAM_SIZE (LAGER_UBOOT_SDRAM_SIZE)
	106	#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fc0)
	107	#define CONFIG_NR_DRAM_BANKS 1
	108
	109	#define CONFIG_SYS_MONITOR_BASE 0x00000000
110	#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
111	#define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024)
f4ec4522 NI	112	#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
f4ec4522 NI	113
0e05b217	114	#if defined(CONFIG_SYS_USE_BOOT_NORFLASH)
f4ec4522	115	/* USE NOR FLASH */
f4ec4522 NI	116	#define CONFIG_SYS_FLASH_CFI
	117	#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
	118	#define CONFIG_FLASH_CFI_DRIVER
	119	#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
	120	#define CONFIG_FLASH_SHOW_PROGRESS 45
	121	#define CONFIG_SYS_FLASH_BASE 0x00000000
	122	#define CONFIG_SYS_FLASH_SIZE 0x04000000 /* 64 MB */
	123	#define CONFIG_SYS_MAX_FLASH_SECT 1024
	124	#define CONFIG_SYS_MAX_FLASH_BANKS 1
	125	#define CONFIG_SYS_FLASH_BANKS_LIST { (CONFIG_SYS_FLASH_BASE) }
	126	#define CONFIG_SYS_FLASH_BANKS_SIZES { (CONFIG_SYS_FLASH_SIZE) }
	127	#define CONFIG_SYS_FLASH_ERASE_TOUT 3000
	128	#define CONFIG_SYS_FLASH_WRITE_TOUT 3000
	129	#define CONFIG_SYS_FLASH_LOCK_TOUT 3000
	130	#define CONFIG_SYS_FLASH_UNLOCK_TOUT 3000
	131
	132	/* ENV setting */
	133	#define CONFIG_ENV_IS_IN_FLASH
f4ec4522 NI	134	#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + \
f4ec4522 NI	135	CONFIG_SYS_MONITOR_LEN)
0e05b217 NI	136
	137	#else /* CONFIG_SYS_USE_BOOT_NORFLASH */
	138
	139	/* USE SPI */
	140	#define CONFIG_SPI
	141	#define CONFIG_SPI_FLASH_BAR
	142	#define CONFIG_SH_QSPI
	143	#define CONFIG_SPI_FLASH
	144	#define CONFIG_SPI_FLASH_SPANSION
	145	#define CONFIG_SYS_NO_FLASH
	146
	147	/* ENV setting */
	148	#define CONFIG_ENV_IS_IN_SPI_FLASH
	149	#define CONFIG_ENV_ADDR 0xC0000
	150	#endif
	151
	152	/* Common ENV setting */
	153	#define CONFIG_ENV_OVERWRITE
	154	#define CONFIG_ENV_SECT_SIZE (256 * 1024)
f4ec4522 NI	155	#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR)
	156	#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
	157	#define CONFIG_ENV_SIZE_REDUND (CONFIG_SYS_MONITOR_LEN)
	158
23565c6b NI	159	/* SH Ether */
	160	#define CONFIG_NET_MULTI
	161	#define CONFIG_SH_ETHER
	162	#define CONFIG_SH_ETHER_USE_PORT 0
	163	#define CONFIG_SH_ETHER_PHY_ADDR 0x1
	164	#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
	165	#define CONFIG_SH_ETHER_ALIGNE_SIZE 64
	166	#define CONFIG_SH_ETHER_CACHE_WRITEBACK
	167	#define CONFIG_SH_ETHER_CACHE_INVALIDATE
	168	#define CONFIG_PHYLIB
	169	#define CONFIG_PHY_MICREL
	170	#define CONFIG_BITBANGMII
	171	#define CONFIG_BITBANGMII_MULTI
	172
b9107adf NI	173	/* I2C */
	174	#define CONFIG_SYS_I2C
	175	#define CONFIG_SYS_I2C_RCAR
	176	#define CONFIG_SYS_RCAR_I2C0_BASE 0xE6508000
	177	#define CONFIG_SYS_RCAR_I2C0_SPEED 400000
	178	#define CONFIG_SYS_RCAR_I2C1_BASE 0xE6518000
	179	#define CONFIG_SYS_RCAR_I2C1_SPEED 400000
	180	#define CONFIG_SYS_RCAR_I2C2_BASE 0xE6530000
	181	#define CONFIG_SYS_RCAR_I2C2_SPEED 400000
	182	#define CONFIG_SYS_RCAR_I2C3_BASE 0xE6540000
	183	#define CONFIG_SYS_RCAR_I2C3_SPEED 400000
	184	#define CONFIF_SYS_RCAR_I2C_NUM_CONTROLLERS 4
	185
b9986be0 NI	186	#define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */
b9986be0 NI	187
f4ec4522 NI	188	/* Board Clock */
	189	#define CONFIG_BASE_CLK_FREQ 20000000u
	190	#define CONFIG_SH_TMU_CLK_FREQ (CONFIG_BASE_CLK_FREQ / 2) /* EXT / 2 */
	191	#define CONFIG_PLL1_CLK_FREQ (CONFIG_BASE_CLK_FREQ * 156 / 2)
	192	#define CONFIG_PLL1_DIV2_CLK_FREQ (CONFIG_PLL1_CLK_FREQ / 2)
	193	#define CONFIG_MP_CLK_FREQ (CONFIG_PLL1_DIV2_CLK_FREQ / 15)
b9107adf	194	#define CONFIG_HP_CLK_FREQ (CONFIG_PLL1_CLK_FREQ / 12)
f4ec4522 NI	195	#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_MP_CLK_FREQ
	196
	197	#define CONFIG_SYS_TMU_CLK_DIV 4
f4ec4522 NI	198
f4ec4522 NI	199	#endif /* __LAGER_H */