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83d290c5 | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
2ac07f75 DL |
2 | /* |
3 | * Copyright (C) 2016 David Lechner <david@lechnology.com> | |
4 | * | |
5 | * Based on da850evm.h | |
6 | * | |
7 | * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ | |
8 | * | |
9 | * Based on davinci_dvevm.h. Original Copyrights follow: | |
10 | * | |
11 | * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> | |
2ac07f75 DL |
12 | */ |
13 | ||
14 | #ifndef __CONFIG_H | |
15 | #define __CONFIG_H | |
16 | ||
17 | /* | |
18 | * SoC Configuration | |
19 | */ | |
2ac07f75 DL |
20 | #define CONFIG_SYS_EXCEPTION_VECTORS_HIGH |
21 | #define CONFIG_SYS_CLK_FREQ clk_get(DAVINCI_ARM_CLKID) | |
22 | #define CONFIG_SYS_OSCIN_FREQ 24000000 | |
23 | #define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE | |
24 | #define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID) | |
18517ab8 | 25 | #define CONFIG_SKIP_LOWLEVEL_INIT |
2ac07f75 | 26 | |
2ac07f75 DL |
27 | /* |
28 | * Memory Info | |
29 | */ | |
30 | #define CONFIG_SYS_MALLOC_LEN (0x10000 + 1*1024*1024) /* malloc() len */ | |
31 | #define PHYS_SDRAM_1 DAVINCI_DDR_EMIF_DATA_BASE /* DDR Start */ | |
32 | #define PHYS_SDRAM_1_SIZE (64 << 20) /* SDRAM size 64MB */ | |
33 | #define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) /* max size from SPRS586*/ | |
34 | ||
35 | /* memtest start addr */ | |
36 | #define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM_1 + 0x2000000) | |
37 | ||
38 | /* memtest will be run on 16MB */ | |
39 | #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + 0x2000000 + 16*1024*1024) | |
40 | ||
2ac07f75 DL |
41 | /* |
42 | * Serial Driver info | |
43 | */ | |
44 | #define CONFIG_SYS_NS16550_SERIAL | |
2ac07f75 | 45 | #define CONFIG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID) |
2ac07f75 | 46 | |
2ac07f75 | 47 | #define CONFIG_SYS_SPI_CLK clk_get(DAVINCI_SPI0_CLKID) |
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48 | |
49 | /* | |
50 | * I2C Configuration | |
51 | */ | |
52 | #define CONFIG_SYS_I2C | |
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53 | #define CONFIG_SYS_DAVINCI_I2C_SPEED 400000 |
54 | #define CONFIG_SYS_DAVINCI_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */ | |
55 | ||
56 | /* | |
57 | * U-Boot general configuration | |
58 | */ | |
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59 | #define CONFIG_BOOTFILE "uImage" /* Boot file name */ |
60 | #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ | |
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61 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */ |
62 | #define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x700000) | |
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63 | |
64 | /* | |
65 | * Linux Information | |
66 | */ | |
67 | #define LINUX_BOOT_PARAM_ADDR (PHYS_SDRAM_1 + 0x100) | |
68 | #define CONFIG_HWCONFIG /* enable hwconfig */ | |
69 | #define CONFIG_CMDLINE_TAG | |
70 | #define CONFIG_REVISION_TAG | |
71 | #define CONFIG_SERIAL_TAG | |
72 | #define CONFIG_SETUP_MEMORY_TAGS | |
73 | #define CONFIG_SETUP_INITRD_TAG | |
2ac07f75 DL |
74 | #define CONFIG_BOOTCOMMAND \ |
75 | "if mmc rescan; then " \ | |
76 | "if run loadbootscr; then " \ | |
77 | "run bootscript; " \ | |
78 | "else " \ | |
f203a479 DL |
79 | "if run loadbootenv; then " \ |
80 | "echo Loaded env from ${bootenvfile};" \ | |
81 | "run importbootenv;" \ | |
82 | "fi;" \ | |
83 | "if test -n $uenvcmd; then " \ | |
84 | "echo Running uenvcmd...;" \ | |
85 | "run uenvcmd;" \ | |
86 | "fi;" \ | |
2ac07f75 DL |
87 | "if run loadimage; then " \ |
88 | "run mmcargs; " \ | |
f203a479 DL |
89 | "if run loadfdt; then " \ |
90 | "echo Using ${fdtfile}...;" \ | |
91 | "run fdtfixup; " \ | |
92 | "run fdtboot; "\ | |
93 | "fi; " \ | |
2ac07f75 | 94 | "run mmcboot; " \ |
2ac07f75 DL |
95 | "fi; " \ |
96 | "fi; " \ | |
f203a479 DL |
97 | "fi; "\ |
98 | "run flashargs; " \ | |
99 | "run flashboot" | |
2ac07f75 | 100 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
f203a479 DL |
101 | "bootenvfile=uEnv.txt\0" \ |
102 | "fdtfile=da850-lego-ev3.dtb\0" \ | |
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103 | "memsize=64M\0" \ |
104 | "filesyssize=10M\0" \ | |
105 | "verify=n\0" \ | |
106 | "console=ttyS1,115200n8\0" \ | |
107 | "bootscraddr=0xC0600000\0" \ | |
f203a479 | 108 | "fdtaddr=0xC0600000\0" \ |
2ac07f75 DL |
109 | "loadaddr=0xC0007FC0\0" \ |
110 | "filesysaddr=0xC1180000\0" \ | |
111 | "fwupdateboot=mw 0xFFFF1FFC 0x5555AAAA; reset\0" \ | |
f203a479 DL |
112 | "importbootenv=echo Importing environment...; " \ |
113 | "env import -t ${loadaddr} ${filesize}\0" \ | |
114 | "loadbootenv=fatload mmc 0 ${loadaddr} ${bootenvfile}\0" \ | |
115 | "mmcargs=setenv bootargs console=${console} root=/dev/mmcblk0p2 rw " \ | |
116 | "rootwait ${optargs}\0" \ | |
2ac07f75 | 117 | "mmcboot=bootm ${loadaddr}\0" \ |
f203a479 DL |
118 | "flashargs=setenv bootargs initrd=${filesysaddr},${filesyssize} " \ |
119 | "root=/dev/ram0 rw rootfstype=squashfs console=${console} " \ | |
120 | "${optargs}\0" \ | |
121 | "flashboot=sf probe 0; " \ | |
122 | "sf read ${fdtaddr} 0x40000 0x10000; " \ | |
123 | "sf read ${loadaddr} 0x50000 0x400000; " \ | |
124 | "sf read ${filesysaddr} 0x450000 0xA00000; " \ | |
125 | "run fdtfixup; " \ | |
126 | "run fdtboot\0" \ | |
2ac07f75 | 127 | "loadimage=fatload mmc 0 ${loadaddr} uImage\0" \ |
f203a479 DL |
128 | "loadfdt=fatload mmc 0 ${fdtaddr} ${fdtfile}\0" \ |
129 | "fdtfixup=fdt addr ${fdtaddr}; fdt resize; fdt chosen\0" \ | |
130 | "fdtboot=bootm ${loadaddr} - ${fdtaddr}\0" \ | |
2ac07f75 | 131 | "loadbootscr=fatload mmc 0 ${bootscraddr} boot.scr\0" \ |
f203a479 | 132 | "bootscript=source ${bootscraddr}\0" |
2ac07f75 | 133 | |
2ac07f75 DL |
134 | #ifdef CONFIG_CMD_BDI |
135 | #define CONFIG_CLOCKS | |
136 | #endif | |
137 | ||
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138 | /* additions for new relocation code, must added to all boards */ |
139 | #define CONFIG_SYS_SDRAM_BASE 0xc0000000 | |
140 | ||
141 | #define CONFIG_SYS_INIT_SP_ADDR 0x80010000 | |
142 | ||
89f5eaa1 SG |
143 | #include <asm/arch/hardware.h> |
144 | ||
2ac07f75 | 145 | #endif /* __CONFIG_H */ |