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c3442c1e SY |
1 | /* |
2 | * ICP DAS LP-8x4x configuration file | |
3 | * | |
4 | * Copyright (C) 2013 Sergey Yanovich <ynvich@gmail.com> | |
5 | * | |
1a459660 | 6 | * SPDX-License-Identifier: GPL-2.0+ |
c3442c1e SY |
7 | */ |
8 | ||
9 | #ifndef __CONFIG_H | |
10 | #define __CONFIG_H | |
11 | ||
12 | /* | |
13 | * High Level Board Configuration Options | |
14 | */ | |
15 | #define CONFIG_CPU_PXA27X /* Marvell PXA270 CPU */ | |
16 | #define MACH_TYPE_LP8X4X 4539 /* ICP DAS LP-8x4x */ | |
17 | #define CONFIG_MACH_TYPE MACH_TYPE_LP8X4X | |
18 | #define CONFIG_SYS_TEXT_BASE 0x00000000 | |
19 | ||
20 | #define CONFIG_SYS_MALLOC_LEN (128*1024) | |
21 | #define CONFIG_ARCH_CPU_INIT | |
22 | #define CONFIG_BOOTCOMMAND \ | |
7cd5441e | 23 | "bootm 80000 - 240000;" |
c3442c1e SY |
24 | |
25 | #define CONFIG_BOOTARGS \ | |
7cd5441e SI |
26 | "console=ttyS0,115200 mem=128M root=/dev/mmcblk0p1 rw" \ |
27 | "init=/sbin/init rootfstype=ext4 rootwait" | |
c3442c1e SY |
28 | |
29 | #define CONFIG_TIMESTAMP | |
30 | #define CONFIG_BOOTDELAY 2 /* Autoboot delay */ | |
31 | #define CONFIG_CMDLINE_TAG | |
32 | #define CONFIG_SETUP_MEMORY_TAGS | |
33 | #define CONFIG_LZMA /* LZMA compression support */ | |
7cd5441e | 34 | #define CONFIG_OF_LIBFDT |
c3442c1e SY |
35 | |
36 | /* | |
37 | * Serial Console Configuration | |
38 | */ | |
39 | #define CONFIG_PXA_SERIAL | |
40 | #define CONFIG_FFUART 1 | |
41 | #define CONFIG_CONS_INDEX 3 | |
42 | #define CONFIG_BAUDRATE 115200 | |
43 | ||
44 | /* | |
45 | * Bootloader Components Configuration | |
46 | */ | |
c3442c1e | 47 | #define CONFIG_CMD_ENV |
c3442c1e SY |
48 | #define CONFIG_CMD_MMC |
49 | #define CONFIG_CMD_USB | |
50 | #undef CONFIG_LCD | |
51 | #undef CONFIG_CMD_IDE | |
52 | ||
53 | /* | |
54 | * Networking Configuration | |
55 | * chip on the ICPDAS LINPAC board | |
56 | */ | |
57 | #ifdef CONFIG_CMD_NET | |
58 | #define CONFIG_CMD_PING | |
59 | #define CONFIG_CMD_DHCP | |
60 | ||
61 | #define CONFIG_DRIVER_DM9000 1 | |
62 | #define CONFIG_DM9000_BASE 0x0C000000 | |
63 | #define DM9000_IO 0x0C000000 | |
64 | #define DM9000_DATA 0x0C004000 | |
65 | #define DM9000_IO_2 0x0D000000 | |
66 | #define DM9000_DATA_2 0x0D004000 | |
67 | #define CONFIG_NET_RETRY_COUNT 10 | |
68 | ||
69 | #define CONFIG_BOOTP_BOOTFILESIZE | |
70 | #define CONFIG_BOOTP_BOOTPATH | |
71 | #define CONFIG_BOOTP_GATEWAY | |
72 | #define CONFIG_BOOTP_HOSTNAME | |
73 | #endif | |
74 | ||
75 | /* | |
76 | * MMC Card Configuration | |
77 | */ | |
78 | #ifdef CONFIG_CMD_MMC | |
79 | #define CONFIG_MMC | |
80 | #define CONFIG_GENERIC_MMC | |
81 | #define CONFIG_PXA_MMC_GENERIC | |
82 | #define CONFIG_CMD_FAT | |
83 | #define CONFIG_CMD_EXT2 | |
84 | #define CONFIG_DOS_PARTITION | |
85 | #endif | |
86 | ||
87 | /* | |
88 | * KGDB | |
89 | */ | |
90 | #ifdef CONFIG_CMD_KGDB | |
91 | #define CONFIG_KGDB_BAUDRATE 230400 /* kgdb serial port speed */ | |
c3442c1e SY |
92 | #endif |
93 | ||
94 | /* | |
95 | * HUSH Shell Configuration | |
96 | */ | |
97 | #define CONFIG_SYS_HUSH_PARSER 1 | |
98 | ||
7cd5441e | 99 | #define CONFIG_SYS_LONGHELP |
c3442c1e SY |
100 | #ifdef CONFIG_SYS_HUSH_PARSER |
101 | #define CONFIG_SYS_PROMPT "$ " | |
102 | #else | |
c3442c1e SY |
103 | #endif |
104 | #define CONFIG_SYS_CBSIZE 256 | |
105 | #define CONFIG_SYS_PBSIZE \ | |
106 | (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) | |
107 | #define CONFIG_SYS_MAXARGS 16 | |
108 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE | |
109 | #define CONFIG_SYS_DEVICE_NULLDEV 1 | |
110 | #define CONFIG_CMDLINE_EDITING 1 | |
111 | #define CONFIG_AUTO_COMPLETE 1 | |
112 | ||
c3442c1e SY |
113 | /* |
114 | * DRAM Map | |
115 | */ | |
116 | #define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */ | |
117 | #define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */ | |
118 | #define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */ | |
119 | ||
120 | #define CONFIG_SYS_DRAM_BASE 0xa0000000 /* CS0 */ | |
121 | #define CONFIG_SYS_DRAM_SIZE 0x08000000 /* 128 MB DRAM */ | |
122 | ||
123 | #define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */ | |
124 | #define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */ | |
125 | ||
126 | #define CONFIG_SYS_LOAD_ADDR 0xa0008000 | |
127 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 | |
128 | /* Use first 64kb bank of the internal SRAM */ | |
129 | #define CONFIG_SYS_INIT_SP_ADDR 0x5c010000 | |
130 | ||
131 | /* | |
132 | * NOR FLASH | |
133 | */ | |
134 | #define CONFIG_SYS_MONITOR_BASE 0x0 | |
135 | #define CONFIG_SYS_MONITOR_LEN 0x40000 | |
136 | #define CONFIG_ENV_ADDR \ | |
137 | (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) | |
138 | #define CONFIG_ENV_SIZE 0x40000 | |
139 | #define CONFIG_ENV_SECT_SIZE 0x40000 | |
140 | ||
141 | #define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */ | |
bf92349b | 142 | #define PHYS_FLASH_2 0x04000000 /* Flash Bank #2 */ |
c3442c1e SY |
143 | |
144 | #define CONFIG_SYS_FLASH_CFI | |
145 | #define CONFIG_FLASH_CFI_DRIVER 1 | |
146 | ||
147 | #define CONFIG_SYS_MAX_FLASH_SECT (4 + 255) | |
148 | #define CONFIG_SYS_MAX_FLASH_BANKS 2 | |
149 | #define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1, PHYS_FLASH_2 } | |
150 | ||
151 | #define CONFIG_SYS_FLASH_ERASE_TOUT (25*CONFIG_SYS_HZ) | |
152 | #define CONFIG_SYS_FLASH_WRITE_TOUT (25*CONFIG_SYS_HZ) | |
153 | ||
154 | #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 | |
155 | #define CONFIG_SYS_FLASH_PROTECTION 1 | |
156 | ||
157 | #define CONFIG_ENV_IS_IN_FLASH 1 | |
158 | ||
159 | /* | |
160 | * GPIO settings | |
161 | */ | |
162 | #define CONFIG_SYS_GPSR0_VAL 0x0808c014 | |
163 | #define CONFIG_SYS_GPSR1_VAL 0x00cf0002 | |
164 | #define CONFIG_SYS_GPSR2_VAL 0x0221c000 | |
165 | #define CONFIG_SYS_GPSR3_VAL 0x00020000 | |
166 | ||
167 | #define CONFIG_SYS_GPCR0_VAL 0x00000000 | |
168 | #define CONFIG_SYS_GPCR1_VAL 0x0000ab80 | |
169 | #define CONFIG_SYS_GPCR2_VAL 0x00100000 | |
170 | #define CONFIG_SYS_GPCR3_VAL 0x0 | |
171 | ||
172 | #define CONFIG_SYS_GPDR0_VAL 0xc0e9ddf4 | |
173 | #define CONFIG_SYS_GPDR1_VAL 0xfcffab83 | |
174 | #define CONFIG_SYS_GPDR2_VAL 0x02f1ffff | |
175 | #define CONFIG_SYS_GPDR3_VAL 0x00021b81 | |
176 | ||
177 | #define CONFIG_SYS_GAFR0_L_VAL 0x80000000 | |
178 | #define CONFIG_SYS_GAFR0_U_VAL 0xa5e54018 | |
179 | #define CONFIG_SYS_GAFR1_L_VAL 0x999a955a | |
180 | #define CONFIG_SYS_GAFR1_U_VAL 0xaaa5a00a | |
181 | #define CONFIG_SYS_GAFR2_L_VAL 0xaaaaaaaa | |
a3d6ca43 | 182 | #define CONFIG_SYS_GAFR2_U_VAL 0x55f9a402 |
c3442c1e SY |
183 | #define CONFIG_SYS_GAFR3_L_VAL 0x540a950c |
184 | #define CONFIG_SYS_GAFR3_U_VAL 0x00001599 | |
185 | ||
186 | #define CONFIG_SYS_PSSR_VAL 0x32 | |
187 | ||
188 | /* | |
189 | * Clock settings | |
190 | */ | |
191 | #define CONFIG_SYS_CKEN 0x005002c0 | |
192 | #define CONFIG_SYS_CCCR 0x02000290 | |
193 | #define CONFIG_SYS_CLKCFG 0x0000000b | |
194 | ||
195 | /* | |
196 | * Memory settings | |
197 | */ | |
198 | #define CONFIG_SYS_MSC0_VAL 0x2bd8aad2 | |
199 | #define CONFIG_SYS_MSC1_VAL 0xb8c9b8dc | |
200 | #define CONFIG_SYS_MSC2_VAL 0xfff9b8c9 | |
201 | #define CONFIG_SYS_FLYCNFG_VAL 0x00010001 | |
202 | #define CONFIG_SYS_MDREFR_VAL 0x2093e018 | |
203 | #define CONFIG_SYS_MDCNFG_VAL 0x890009d1 | |
204 | #define CONFIG_SYS_MDMRS_VAL 0x00220022 | |
205 | #define CONFIG_SYS_SXCNFG_VAL 0x40044004 | |
206 | ||
207 | /* | |
208 | * PCMCIA and CF Interfaces | |
209 | */ | |
210 | #define CONFIG_SYS_MECR_VAL 0x00000001 | |
211 | #define CONFIG_SYS_MCMEM0_VAL 0x0000c497 | |
212 | #define CONFIG_SYS_MCMEM1_VAL 0x0000c497 | |
213 | #define CONFIG_SYS_MCATT0_VAL 0x0000c497 | |
214 | #define CONFIG_SYS_MCATT1_VAL 0x0000c497 | |
215 | #define CONFIG_SYS_MCIO0_VAL 0x00008407 | |
216 | #define CONFIG_SYS_MCIO1_VAL 0x00008407 | |
217 | ||
218 | /* | |
219 | * LCD | |
220 | */ | |
221 | #ifdef CONFIG_LCD | |
222 | #define CONFIG_VOIPAC_LCD | |
223 | #endif | |
224 | ||
225 | /* | |
226 | * USB | |
227 | */ | |
228 | #ifdef CONFIG_CMD_USB | |
229 | #define CONFIG_USB_OHCI_NEW | |
c3442c1e SY |
230 | #define CONFIG_SYS_USB_OHCI_BOARD_INIT |
231 | #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 | |
232 | #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x4C000000 | |
233 | #define CONFIG_SYS_USB_OHCI_SLOT_NAME "lp8x4x" | |
234 | #define CONFIG_USB_STORAGE | |
235 | #endif | |
236 | ||
237 | #endif /* __CONFIG_H */ |