[people/ms/u-boot.git] / include / configs / lpc2292sodimm.h

/*
 * (C) Copyright 2007
 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
 *
 * Configuation settings for the LPC2292SODIMM board from Embedded Artists.
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#ifndef __CONFIG_H
#define __CONFIG_H

/*
 * If we are developing, we might want to start u-boot from ram
 * so we MUST NOT initialize critical regs like mem-timing ...
 */
#undef CONFIG_INIT_CRITICAL		/* undef for developing */

#undef CONFIG_SKIP_LOWLEVEL_INIT
#undef CONFIG_SKIP_RELOCATE_UBOOT

/*
 * High Level Configuration Options
 * (easy to change)
 */
#define CONFIG_ARM7		1	/* This is a ARM7 CPU	*/
#define CONFIG_ARM_THUMB	1	/* this is an ARM720TDMI */
#define CONFIG_LPC2292
#undef	CONFIG_ARM7_REVD		/* disable ARM720 REV.D Workarounds */

#undef CONFIG_USE_IRQ			/* don't need them anymore */

/*
 * Size of malloc() pool
 */
#define CFG_MALLOC_LEN		(CONFIG_ENV_SIZE + 128*1024)
#define CFG_GBL_DATA_SIZE	128	/* size in bytes reserved for initial data */

/*
 * Hardware drivers
 */

/*
 * select serial console configuration
 */
#define CONFIG_SERIAL1		1	/* we use Serial line 1 */

/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE

#define CONFIG_BAUDRATE		115200

/*
 * BOOTP options
 */
#define CONFIG_BOOTP_SUBNETMASK
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_BOOTFILESIZE


/*
 * Command line configuration.
 */
#include <config_cmd_default.h>

#define CONFIG_CMD_DHCP
#define CONFIG_CMD_FAT
#define CONFIG_CMD_MMC
#define CONFIG_CMD_NET
#define CONFIG_CMD_PING


#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION

#define CONFIG_BOOTDELAY	5

/*
 * Miscellaneous configurable options
 */
#define	CFG_LONGHELP				/* undef to save memory		*/
#define	CFG_PROMPT		"LPC2292SODIMM # " /* Monitor Command Prompt	*/
#define	CFG_CBSIZE		256		/* Console I/O Buffer Size	*/
#define	CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
#define	CFG_MAXARGS		16		/* max number of command args	*/
#define CFG_BARGSIZE		CFG_CBSIZE	/* Boot Argument Buffer Size	*/

#define CFG_MEMTEST_START	0x40000000	/* memtest works on	*/
#define CFG_MEMTEST_END		0x40000000	/* 4 ... 8 MB in DRAM	*/

#undef	CFG_CLKS_IN_HZ		/* everything, incl board info, in Hz */

#define	CFG_LOAD_ADDR		0x00040000	/* default load address	for	*/
						/* armadillo: kernel img is here*/

#define CFG_SYS_CLK_FREQ	58982400	/* Hz */
#define	CFG_HZ			2048		/* decrementer freq in Hz */

						/* valid baudrates */
#define CFG_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }

/*-----------------------------------------------------------------------
 * Stack sizes
 *
 * The stack sizes are set up in start.S using the settings below
 */
#define CONFIG_STACKSIZE	(128*1024)	/* regular stack */
#ifdef CONFIG_USE_IRQ
#define CONFIG_STACKSIZE_IRQ	(4*1024)	/* IRQ stack */
#define CONFIG_STACKSIZE_FIQ	(4*1024)	/* FIQ stack */
#endif

/*-----------------------------------------------------------------------
 * Physical Memory Map
 */
#define CONFIG_NR_DRAM_BANKS	1	   /* we have 1 bank of DRAM */
#define PHYS_SDRAM_1		0x81000000 /* SDRAM Bank #1 */
#define PHYS_SDRAM_1_SIZE	0x00800000 /* 8 MB SDRAM */

#define PHYS_FLASH_1		0x80000000 /* Flash Bank #1 */
#define PHYS_FLASH_SIZE		0x00200000 /* 2 MB */

#define CFG_FLASH_BASE		PHYS_FLASH_1

/*-----------------------------------------------------------------------
 * FLASH and environment organization
 */
#define CFG_MAX_FLASH_BANKS	2	/* max number of memory banks		*/
#define CFG_MAX_FLASH_SECT	1024	/* max number of sectors on one chip	*/

/* timeout values are in ticks */
#define CFG_FLASH_ERASE_TOUT	(2*CFG_HZ) /* Timeout for Flash Erase */
#define CFG_FLASH_WRITE_TOUT	(2*CFG_HZ) /* Timeout for Flash Write */

#define	CONFIG_ENV_IS_IN_FLASH	1
#define CONFIG_ENV_ADDR		(0x0 + 0x3C000)	/* Addr of Environment Sector	*/
#define CONFIG_ENV_SIZE		0x2000 /* Total Size of Environment Sector	*/

#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_MMC 1
/* we use this ethernet chip */
#define CONFIG_ENC28J60

#endif	/* __CONFIG_H */
Commit	Line	Data
6bd2447e	1	/*
b0d8f5bf PP	2	* (C) Copyright 2007
b0d8f5bf PP	3	* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6bd2447e	4	*
b0d8f5bf	5	* Configuation settings for the LPC2292SODIMM board from Embedded Artists.
6bd2447e GJ	6	*
	7	* See file CREDITS for list of people who contributed to this
	8	* project.
	9	*
	10	* This program is free software; you can redistribute it and/or
	11	* modify it under the terms of the GNU General Public License as
	12	* published by the Free Software Foundation; either version 2 of
	13	* the License, or (at your option) any later version.
	14	*
	15	* This program is distributed in the hope that it will be useful,
	16	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	17	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	18	* GNU General Public License for more details.
	19	*
	20	* You should have received a copy of the GNU General Public License
	21	* along with this program; if not, write to the Free Software
	22	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	23	* MA 02111-1307 USA
	24	*/
	25
	26	#ifndef __CONFIG_H
	27	#define __CONFIG_H
	28
	29	/*
b0d8f5bf	30	* If we are developing, we might want to start u-boot from ram
6bd2447e GJ	31	* so we MUST NOT initialize critical regs like mem-timing ...
	32	*/
	33	#undef CONFIG_INIT_CRITICAL /* undef for developing */
	34
	35	#undef CONFIG_SKIP_LOWLEVEL_INIT
	36	#undef CONFIG_SKIP_RELOCATE_UBOOT
	37
	38	/*
	39	* High Level Configuration Options
	40	* (easy to change)
	41	*/
	42	#define CONFIG_ARM7 1 /* This is a ARM7 CPU */
	43	#define CONFIG_ARM_THUMB 1 /* this is an ARM720TDMI */
	44	#define CONFIG_LPC2292
725671cc	45	#undef CONFIG_ARM7_REVD /* disable ARM720 REV.D Workarounds */
6bd2447e GJ	46
	47	#undef CONFIG_USE_IRQ /* don't need them anymore */
	48
	49	/*
	50	* Size of malloc() pool
	51	*/
0e8d1586	52	#define CFG_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
6bd2447e GJ	53	#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
	54
	55	/*
	56	* Hardware drivers
	57	*/
	58
	59	/*
	60	* select serial console configuration
	61	*/
	62	#define CONFIG_SERIAL1 1 /* we use Serial line 1 */
	63
	64	/* allow to overwrite serial and ethaddr */
	65	#define CONFIG_ENV_OVERWRITE
	66
	67	#define CONFIG_BAUDRATE 115200
	68
2fd90ce5 JL	69	/*
	70	* BOOTP options
	71	*/
	72	#define CONFIG_BOOTP_SUBNETMASK
	73	#define CONFIG_BOOTP_GATEWAY
	74	#define CONFIG_BOOTP_HOSTNAME
	75	#define CONFIG_BOOTP_BOOTPATH
	76	#define CONFIG_BOOTP_BOOTFILESIZE
6bd2447e	77
9bbb1c08	78
6bd2447e	79	/*
9bbb1c08	80	* Command line configuration.
6bd2447e	81	*/
9bbb1c08 JL	82	#include <config_cmd_default.h>
	83
	84	#define CONFIG_CMD_DHCP
	85	#define CONFIG_CMD_FAT
	86	#define CONFIG_CMD_MMC
	87	#define CONFIG_CMD_NET
	88	#define CONFIG_CMD_PING
	89
6bd2447e GJ	90
	91	#define CONFIG_MAC_PARTITION
	92	#define CONFIG_DOS_PARTITION
	93
6bd2447e GJ	94	#define CONFIG_BOOTDELAY 5
	95
	96	/*
	97	* Miscellaneous configurable options
	98	*/
	99	#define CFG_LONGHELP /* undef to save memory */
	100	#define CFG_PROMPT "LPC2292SODIMM # " /* Monitor Command Prompt */
	101	#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
	102	#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
	103	#define CFG_MAXARGS 16 /* max number of command args */
	104	#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
	105
	106	#define CFG_MEMTEST_START 0x40000000 /* memtest works on */
	107	#define CFG_MEMTEST_END 0x40000000 /* 4 ... 8 MB in DRAM */
	108
725671cc	109	#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
6bd2447e	110
725671cc WD	111	#define CFG_LOAD_ADDR 0x00040000 /* default load address for */
725671cc WD	112	/* armadillo: kernel img is here*/
6bd2447e	113
725671cc	114	#define CFG_SYS_CLK_FREQ 58982400 /* Hz */
6bd2447e GJ	115	#define CFG_HZ 2048 /* decrementer freq in Hz */
	116
	117	/* valid baudrates */
	118	#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
	119
	120	/*-----------------------------------------------------------------------
	121	* Stack sizes
	122	*
	123	* The stack sizes are set up in start.S using the settings below
	124	*/
	125	#define CONFIG_STACKSIZE (1281024) / regular stack */
	126	#ifdef CONFIG_USE_IRQ
	127	#define CONFIG_STACKSIZE_IRQ (41024) / IRQ stack */
	128	#define CONFIG_STACKSIZE_FIQ (41024) / FIQ stack */
	129	#endif
	130
	131	/*-----------------------------------------------------------------------
	132	* Physical Memory Map
	133	*/
	134	#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
	135	#define PHYS_SDRAM_1 0x81000000 /* SDRAM Bank #1 */
	136	#define PHYS_SDRAM_1_SIZE 0x00800000 /* 8 MB SDRAM */
	137
	138	#define PHYS_FLASH_1 0x80000000 /* Flash Bank #1 */
	139	#define PHYS_FLASH_SIZE 0x00200000 /* 2 MB */
	140
	141	#define CFG_FLASH_BASE PHYS_FLASH_1
	142
	143	/*-----------------------------------------------------------------------
	144	* FLASH and environment organization
	145	*/
	146	#define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */
	147	#define CFG_MAX_FLASH_SECT 1024 /* max number of sectors on one chip */
	148
	149	/* timeout values are in ticks */
	150	#define CFG_FLASH_ERASE_TOUT (2CFG_HZ) / Timeout for Flash Erase */
	151	#define CFG_FLASH_WRITE_TOUT (2CFG_HZ) / Timeout for Flash Write */
	152
5a1aceb0	153	#define CONFIG_ENV_IS_IN_FLASH 1
0e8d1586 JCPV	154	#define CONFIG_ENV_ADDR (0x0 + 0x3C000) /* Addr of Environment Sector */
0e8d1586 JCPV	155	#define CONFIG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */
6bd2447e GJ	156
	157	#define CONFIG_CMDLINE_TAG
	158	#define CONFIG_SETUP_MEMORY_TAGS
	159	#define CONFIG_INITRD_TAG
	160	#define CONFIG_MMC 1
b0d8f5bf PP	161	/* we use this ethernet chip */
b0d8f5bf PP	162	#define CONFIG_ENC28J60
6bd2447e GJ	163
6bd2447e GJ	164	#endif /* __CONFIG_H */