[thirdparty/u-boot.git] / include / configs / ls1012ardb.h

/*
 * Copyright 2016 Freescale Semiconductor, Inc.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __LS1012ARDB_H__
#define __LS1012ARDB_H__

#include "ls1012a_common.h"

/* DDR */
#define CONFIG_DIMM_SLOTS_PER_CTLR	1
#define CONFIG_CHIP_SELECTS_PER_CTRL	1
#define CONFIG_NR_DRAM_BANKS		2
#define CONFIG_SYS_SDRAM_SIZE		0x40000000
#define CONFIG_CMD_MEMINFO
#define CONFIG_SYS_MEMTEST_START	0x80000000
#define CONFIG_SYS_MEMTEST_END		0x9fffffff


/*
 * I2C IO expander
 */

#define I2C_MUX_IO_ADDR		0x24
#define I2C_MUX_IO2_ADDR	0x25
#define I2C_MUX_IO_0		0
#define I2C_MUX_IO_1		1
#define SW_BOOT_MASK		0x03
#define SW_BOOT_EMU		0x02
#define SW_BOOT_BANK1		0x00
#define SW_BOOT_BANK2		0x01
#define SW_REV_MASK		0xF8
#define SW_REV_A		0xF8
#define SW_REV_B		0xF0
#define SW_REV_C		0xE8
#define SW_REV_C1		0xE0
#define SW_REV_C2		0xD8
#define SW_REV_D		0xD0
#define SW_REV_E		0xC8
#define __PHY_MASK		0xF9
#define __PHY_ETH2_MASK		0xFB
#define __PHY_ETH1_MASK		0xFD

/*  MMC  */
#ifdef CONFIG_MMC
#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
#endif


#define CONFIG_PCIE1		/* PCIE controller 1 */

#define CONFIG_PCI_SCAN_SHOW

#define CONFIG_CMD_MEMINFO
#define CONFIG_SYS_MEMTEST_START	0x80000000
#define CONFIG_SYS_MEMTEST_END		0x9fffffff

#undef CONFIG_EXTRA_ENV_SETTINGS
#define CONFIG_EXTRA_ENV_SETTINGS		\
	"verify=no\0"				\
	"fdt_high=0xffffffffffffffff\0"		\
	"initrd_high=0xffffffffffffffff\0"	\
	"fdt_addr=0x00f00000\0"			\
	"kernel_addr=0x01000000\0"		\
	"kernelheader_addr=0x800000\0"		\
	"scriptaddr=0x80000000\0"		\
	"scripthdraddr=0x80080000\0"		\
	"fdtheader_addr_r=0x80100000\0"		\
	"kernelheader_addr_r=0x80200000\0"	\
	"kernel_addr_r=0x81000000\0"		\
	"fdt_addr_r=0x90000000\0"		\
	"load_addr=0xa0000000\0"		\
	"kernel_size=0x2800000\0"		\
	"kernelheader_size=0x40000\0"		\
	"console=ttyS0,115200\0"		\
	BOOTENV					\
	"boot_scripts=ls1012ardb_boot.scr\0"	\
	"boot_script_hdr=hdr_ls1012ardb_bs.out\0"	\
	"scan_dev_for_boot_part="		\
	     "part list ${devtype} ${devnum} devplist; "	\
	     "env exists devplist || setenv devplist 1; "	\
	     "for distro_bootpart in ${devplist}; do "		\
		  "if fstype ${devtype} "			\
		      "${devnum}:${distro_bootpart} "		\
		      "bootfstype; then "			\
		      "run scan_dev_for_boot; "	\
		  "fi; "			\
	      "done\0"				\
	"scan_dev_for_boot="				  \
		"echo Scanning ${devtype} "		  \
				"${devnum}:${distro_bootpart}...; "  \
		"for prefix in ${boot_prefixes}; do "	  \
			"run scan_dev_for_scripts; "	  \
		"done;"					  \
		"\0"					  \
	"boot_a_script="				  \
		"load ${devtype} ${devnum}:${distro_bootpart} "  \
			"${scriptaddr} ${prefix}${script}; "    \
		"env exists secureboot && load ${devtype} "     \
			"${devnum}:${distro_bootpart} "		\
			"${scripthdraddr} ${prefix}${boot_script_hdr} " \
			"&& esbc_validate ${scripthdraddr};"    \
		"source ${scriptaddr}\0"	  \
	"installer=load mmc 0:2 $load_addr "	\
		   "/flex_installer_arm64.itb; "	\
		   "bootm $load_addr#$board\0"	\
	"qspi_bootcmd=echo Trying load from qspi..;"	\
		"sf probe && sf read $load_addr "	\
		"$kernel_addr $kernel_size; env exists secureboot "	\
		"&& sf read $kernelheader_addr_r $kernelheader_addr "	\
		"$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
		"bootm $load_addr#$board\0"

#undef CONFIG_BOOTCOMMAND
#define CONFIG_BOOTCOMMAND "pfe stop; run distro_bootcmd; run qspi_bootcmd; "\
			   "env exists secureboot && esbc_halt;"

#include <asm/fsl_secure_boot.h>

#endif /* __LS1012ARDB_H__ */
Commit	Line	Data
3b6e3898 PK	1	/*
	2	* Copyright 2016 Freescale Semiconductor, Inc.
	3	*
	4	* SPDX-License-Identifier: GPL-2.0+
	5	*/
	6
	7	#ifndef __LS1012ARDB_H__
	8	#define __LS1012ARDB_H__
	9
	10	#include "ls1012a_common.h"
	11
b9e745bb	12	/* DDR */
3b6e3898 PK	13	#define CONFIG_DIMM_SLOTS_PER_CTLR 1
	14	#define CONFIG_CHIP_SELECTS_PER_CTRL 1
	15	#define CONFIG_NR_DRAM_BANKS 2
	16	#define CONFIG_SYS_SDRAM_SIZE 0x40000000
3b6e3898	17	#define CONFIG_CMD_MEMINFO
3b6e3898 PK	18	#define CONFIG_SYS_MEMTEST_START 0x80000000
	19	#define CONFIG_SYS_MEMTEST_END 0x9fffffff
	20
3b6e3898 PK	21
	22	/*
	23	* I2C IO expander
	24	*/
	25
481fb01f	26	#define I2C_MUX_IO_ADDR 0x24
7ab16479	27	#define I2C_MUX_IO2_ADDR 0x25
481fb01f YL	28	#define I2C_MUX_IO_0 0
	29	#define I2C_MUX_IO_1 1
	30	#define SW_BOOT_MASK 0x03
	31	#define SW_BOOT_EMU 0x02
	32	#define SW_BOOT_BANK1 0x00
	33	#define SW_BOOT_BANK2 0x01
	34	#define SW_REV_MASK 0xF8
	35	#define SW_REV_A 0xF8
	36	#define SW_REV_B 0xF0
4a47bf8a YL	37	#define SW_REV_C 0xE8
	38	#define SW_REV_C1 0xE0
	39	#define SW_REV_C2 0xD8
	40	#define SW_REV_D 0xD0
	41	#define SW_REV_E 0xC8
7ab16479 CJ	42	#define __PHY_MASK 0xF9
	43	#define __PHY_ETH2_MASK 0xFB
	44	#define __PHY_ETH1_MASK 0xFD
3b6e3898 PK	45
3b6e3898 PK	46	/* MMC */
3b6e3898	47	#ifdef CONFIG_MMC
3b6e3898	48	#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
3b6e3898 PK	49	#endif
3b6e3898 PK	50
9e0bb4c1	51
3b6e3898	52	#define CONFIG_PCIE1 /* PCIE controller 1 */
3b6e3898	53
3b6e3898	54	#define CONFIG_PCI_SCAN_SHOW
3b6e3898 PK	55
3b6e3898 PK	56	#define CONFIG_CMD_MEMINFO
3b6e3898 PK	57	#define CONFIG_SYS_MEMTEST_START 0x80000000
	58	#define CONFIG_SYS_MEMTEST_END 0x9fffffff
	59
a81357a2 RB	60	#undef CONFIG_EXTRA_ENV_SETTINGS
	61	#define CONFIG_EXTRA_ENV_SETTINGS \
	62	"verify=no\0" \
	63	"fdt_high=0xffffffffffffffff\0" \
	64	"initrd_high=0xffffffffffffffff\0" \
	65	"fdt_addr=0x00f00000\0" \
	66	"kernel_addr=0x01000000\0" \
c883f351	67	"kernelheader_addr=0x800000\0" \
a81357a2	68	"scriptaddr=0x80000000\0" \
c883f351	69	"scripthdraddr=0x80080000\0" \
a81357a2 RB	70	"fdtheader_addr_r=0x80100000\0" \
	71	"kernelheader_addr_r=0x80200000\0" \
	72	"kernel_addr_r=0x81000000\0" \
	73	"fdt_addr_r=0x90000000\0" \
	74	"load_addr=0xa0000000\0" \
	75	"kernel_size=0x2800000\0" \
c883f351	76	"kernelheader_size=0x40000\0" \
a81357a2 RB	77	"console=ttyS0,115200\0" \
	78	BOOTENV \
	79	"boot_scripts=ls1012ardb_boot.scr\0" \
c883f351	80	"boot_script_hdr=hdr_ls1012ardb_bs.out\0" \
a81357a2 RB	81	"scan_dev_for_boot_part=" \
	82	"part list ${devtype} ${devnum} devplist; " \
	83	"env exists devplist \|\| setenv devplist 1; " \
	84	"for distro_bootpart in ${devplist}; do " \
	85	"if fstype ${devtype} " \
	86	"${devnum}:${distro_bootpart} " \
	87	"bootfstype; then " \
	88	"run scan_dev_for_boot; " \
	89	"fi; " \
	90	"done\0" \
	91	"scan_dev_for_boot=" \
	92	"echo Scanning ${devtype} " \
	93	"${devnum}:${distro_bootpart}...; " \
	94	"for prefix in ${boot_prefixes}; do " \
	95	"run scan_dev_for_scripts; " \
	96	"done;" \
	97	"\0" \
c883f351 VPB	98	"boot_a_script=" \
	99	"load ${devtype} ${devnum}:${distro_bootpart} " \
	100	"${scriptaddr} ${prefix}${script}; " \
	101	"env exists secureboot && load ${devtype} " \
	102	"${devnum}:${distro_bootpart} " \
	103	"${scripthdraddr} ${prefix}${boot_script_hdr} " \
	104	"&& esbc_validate ${scripthdraddr};" \
	105	"source ${scriptaddr}\0" \
a81357a2 RB	106	"installer=load mmc 0:2 $load_addr " \
	107	"/flex_installer_arm64.itb; " \
	108	"bootm $load_addr#$board\0" \
	109	"qspi_bootcmd=echo Trying load from qspi..;" \
	110	"sf probe && sf read $load_addr " \
c883f351 VPB	111	"$kernel_addr $kernel_size; env exists secureboot " \
	112	"&& sf read $kernelheader_addr_r $kernelheader_addr " \
	113	"$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
	114	"bootm $load_addr#$board\0"
a81357a2 RB	115
a81357a2 RB	116	#undef CONFIG_BOOTCOMMAND
a802d1e2	117	#define CONFIG_BOOTCOMMAND "pfe stop; run distro_bootcmd; run qspi_bootcmd; "\
c883f351	118	"env exists secureboot && esbc_halt;"
11d14bfb VPB	119
	120	#include <asm/fsl_secure_boot.h>
	121
3b6e3898	122	#endif /* __LS1012ARDB_H__ */