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3b6e3898 PK |
1 | /* |
2 | * Copyright 2016 Freescale Semiconductor, Inc. | |
3 | * | |
4 | * SPDX-License-Identifier: GPL-2.0+ | |
5 | */ | |
6 | ||
7 | #ifndef __LS1012ARDB_H__ | |
8 | #define __LS1012ARDB_H__ | |
9 | ||
10 | #include "ls1012a_common.h" | |
11 | ||
b9e745bb | 12 | /* DDR */ |
3b6e3898 PK |
13 | #define CONFIG_DIMM_SLOTS_PER_CTLR 1 |
14 | #define CONFIG_CHIP_SELECTS_PER_CTRL 1 | |
15 | #define CONFIG_NR_DRAM_BANKS 2 | |
16 | #define CONFIG_SYS_SDRAM_SIZE 0x40000000 | |
3b6e3898 PK |
17 | #define CONFIG_CMD_MEMINFO |
18 | #define CONFIG_CMD_MEMTEST | |
19 | #define CONFIG_SYS_MEMTEST_START 0x80000000 | |
20 | #define CONFIG_SYS_MEMTEST_END 0x9fffffff | |
21 | ||
3b6e3898 PK |
22 | |
23 | /* | |
24 | * I2C IO expander | |
25 | */ | |
26 | ||
481fb01f YL |
27 | #define I2C_MUX_IO_ADDR 0x24 |
28 | #define I2C_MUX_IO_0 0 | |
29 | #define I2C_MUX_IO_1 1 | |
30 | #define SW_BOOT_MASK 0x03 | |
31 | #define SW_BOOT_EMU 0x02 | |
32 | #define SW_BOOT_BANK1 0x00 | |
33 | #define SW_BOOT_BANK2 0x01 | |
34 | #define SW_REV_MASK 0xF8 | |
35 | #define SW_REV_A 0xF8 | |
36 | #define SW_REV_B 0xF0 | |
4a47bf8a YL |
37 | #define SW_REV_C 0xE8 |
38 | #define SW_REV_C1 0xE0 | |
39 | #define SW_REV_C2 0xD8 | |
40 | #define SW_REV_D 0xD0 | |
41 | #define SW_REV_E 0xC8 | |
3b6e3898 PK |
42 | |
43 | /* MMC */ | |
3b6e3898 PK |
44 | #ifdef CONFIG_MMC |
45 | #define CONFIG_FSL_ESDHC | |
46 | #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 | |
3b6e3898 PK |
47 | #endif |
48 | ||
49 | /* SATA */ | |
3b6e3898 | 50 | #define CONFIG_SCSI_AHCI_PLAT |
3b6e3898 PK |
51 | |
52 | #define CONFIG_SYS_SATA AHCI_BASE_ADDR | |
53 | ||
54 | #define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 | |
55 | #define CONFIG_SYS_SCSI_MAX_LUN 1 | |
56 | #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ | |
57 | CONFIG_SYS_SCSI_MAX_LUN) | |
9e0bb4c1 | 58 | |
3b6e3898 | 59 | #define CONFIG_PCIE1 /* PCIE controller 1 */ |
3b6e3898 | 60 | |
3b6e3898 | 61 | #define CONFIG_PCI_SCAN_SHOW |
3b6e3898 PK |
62 | |
63 | #define CONFIG_CMD_MEMINFO | |
64 | #define CONFIG_CMD_MEMTEST | |
65 | #define CONFIG_SYS_MEMTEST_START 0x80000000 | |
66 | #define CONFIG_SYS_MEMTEST_END 0x9fffffff | |
67 | ||
a81357a2 RB |
68 | #undef CONFIG_EXTRA_ENV_SETTINGS |
69 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
70 | "verify=no\0" \ | |
71 | "fdt_high=0xffffffffffffffff\0" \ | |
72 | "initrd_high=0xffffffffffffffff\0" \ | |
73 | "fdt_addr=0x00f00000\0" \ | |
74 | "kernel_addr=0x01000000\0" \ | |
75 | "scriptaddr=0x80000000\0" \ | |
76 | "fdtheader_addr_r=0x80100000\0" \ | |
77 | "kernelheader_addr_r=0x80200000\0" \ | |
78 | "kernel_addr_r=0x81000000\0" \ | |
79 | "fdt_addr_r=0x90000000\0" \ | |
80 | "load_addr=0xa0000000\0" \ | |
81 | "kernel_size=0x2800000\0" \ | |
82 | "console=ttyS0,115200\0" \ | |
83 | BOOTENV \ | |
84 | "boot_scripts=ls1012ardb_boot.scr\0" \ | |
85 | "scan_dev_for_boot_part=" \ | |
86 | "part list ${devtype} ${devnum} devplist; " \ | |
87 | "env exists devplist || setenv devplist 1; " \ | |
88 | "for distro_bootpart in ${devplist}; do " \ | |
89 | "if fstype ${devtype} " \ | |
90 | "${devnum}:${distro_bootpart} " \ | |
91 | "bootfstype; then " \ | |
92 | "run scan_dev_for_boot; " \ | |
93 | "fi; " \ | |
94 | "done\0" \ | |
95 | "scan_dev_for_boot=" \ | |
96 | "echo Scanning ${devtype} " \ | |
97 | "${devnum}:${distro_bootpart}...; " \ | |
98 | "for prefix in ${boot_prefixes}; do " \ | |
99 | "run scan_dev_for_scripts; " \ | |
100 | "done;" \ | |
101 | "\0" \ | |
102 | "installer=load mmc 0:2 $load_addr " \ | |
103 | "/flex_installer_arm64.itb; " \ | |
104 | "bootm $load_addr#$board\0" \ | |
105 | "qspi_bootcmd=echo Trying load from qspi..;" \ | |
106 | "sf probe && sf read $load_addr " \ | |
107 | "$kernel_addr $kernel_size && bootm $load_addr#$board\0" | |
108 | ||
109 | #undef CONFIG_BOOTCOMMAND | |
110 | #define CONFIG_BOOTCOMMAND "run distro_bootcmd;run qspi_bootcmd" | |
11d14bfb VPB |
111 | |
112 | #include <asm/fsl_secure_boot.h> | |
113 | ||
3b6e3898 | 114 | #endif /* __LS1012ARDB_H__ */ |