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353f36d9 YT |
1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
2 | /* | |
3 | * Copyright 2019 NXP | |
4 | */ | |
5 | ||
6 | #ifndef __LS1028A_RDB_H | |
7 | #define __LS1028A_RDB_H | |
8 | ||
9 | #include "ls1028a_common.h" | |
10 | ||
2f8a6db5 | 11 | #define COUNTER_FREQUENCY_REAL (get_board_sys_clk() / 4) |
353f36d9 YT |
12 | |
13 | #define CONFIG_SYS_RTC_BUS_NUM 0 | |
14 | ||
15 | /* Store environment at top of flash */ | |
353f36d9 YT |
16 | |
17 | #define CONFIG_DIMM_SLOTS_PER_CTLR 1 | |
18 | ||
19 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE | |
20 | ||
21 | #define CONFIG_QIXIS_I2C_ACCESS | |
353f36d9 YT |
22 | |
23 | /* | |
24 | * QIXIS Definitions | |
25 | */ | |
26 | #define CONFIG_FSL_QIXIS | |
27 | ||
28 | #ifdef CONFIG_FSL_QIXIS | |
29 | #define QIXIS_BASE 0x7fb00000 | |
30 | #define QIXIS_BASE_PHYS QIXIS_BASE | |
31 | #define CONFIG_SYS_I2C_FPGA_ADDR 0x66 | |
32 | #define QIXIS_LBMAP_SWITCH 2 | |
33 | #define QIXIS_LBMAP_MASK 0xe0 | |
34 | #define QIXIS_LBMAP_SHIFT 0x5 | |
35 | #define QIXIS_LBMAP_DFLTBANK 0x00 | |
36 | #define QIXIS_LBMAP_ALTBANK 0x00 | |
37 | #define QIXIS_LBMAP_SD 0x00 | |
38 | #define QIXIS_LBMAP_EMMC 0x00 | |
c8f8830e | 39 | #define QIXIS_LBMAP_XSPI 0x00 |
353f36d9 YT |
40 | #define QIXIS_RCW_SRC_SD 0xf8 |
41 | #define QIXIS_RCW_SRC_EMMC 0xf9 | |
c8f8830e | 42 | #define QIXIS_RCW_SRC_XSPI 0xff |
353f36d9 YT |
43 | #define QIXIS_RST_CTL_RESET 0x31 |
44 | #define QIXIS_RCFG_CTL_RECONFIG_IDLE 0x10 | |
45 | #define QIXIS_RCFG_CTL_RECONFIG_START 0x11 | |
46 | #define QIXIS_RCFG_CTL_WATCHDOG_ENBLE 0x08 | |
47 | #define QIXIS_RST_FORCE_MEM 0x01 | |
48 | ||
49 | #define CONFIG_SYS_FPGA_CSPR_EXT (0x0) | |
50 | #define CONFIG_SYS_FPGA_CSPR (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) | \ | |
51 | CSPR_PORT_SIZE_8 | \ | |
52 | CSPR_MSEL_GPCM | \ | |
53 | CSPR_V) | |
54 | #define CONFIG_SYS_FPGA_CSOR (CSOR_NOR_ADM_SHIFT(4) | \ | |
55 | CSOR_NOR_NOR_MODE_AVD_NOR | \ | |
56 | CSOR_NOR_TRHZ_80) | |
57 | #endif | |
58 | ||
59 | /* SATA */ | |
353f36d9 YT |
60 | #define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 |
61 | #define CONFIG_SYS_SCSI_MAX_LUN 1 | |
353f36d9 YT |
62 | #define SCSI_VEND_ID 0x1b4b |
63 | #define SCSI_DEV_ID 0x9170 | |
64 | #define CONFIG_SCSI_DEV_LIST {SCSI_VEND_ID, SCSI_DEV_ID} | |
65 | #define CONFIG_SCSI_AHCI_PLAT | |
66 | #define CONFIG_SYS_SATA1 AHCI_BASE_ADDR1 | |
67 | ||
a023c3c2 YT |
68 | /* Initial environment variables */ |
69 | #ifndef SPL_NO_ENV | |
70 | #undef CONFIG_EXTRA_ENV_SETTINGS | |
71 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
72 | "board=ls1028ardb\0" \ | |
73 | "hwconfig=fsl_ddr:bank_intlv=auto\0" \ | |
74 | "ramdisk_addr=0x800000\0" \ | |
75 | "ramdisk_size=0x2000000\0" \ | |
76 | "bootm_size=0x10000000\0" \ | |
77 | "fdt_addr=0x00f00000\0" \ | |
78 | "kernel_addr=0x01000000\0" \ | |
79 | "scriptaddr=0x80000000\0" \ | |
80 | "scripthdraddr=0x80080000\0" \ | |
81 | "fdtheader_addr_r=0x80100000\0" \ | |
82 | "kernelheader_addr_r=0x80200000\0" \ | |
83 | "load_addr=0xa0000000\0" \ | |
84 | "kernel_addr_r=0x81000000\0" \ | |
85 | "fdt_addr_r=0x90000000\0" \ | |
86 | "ramdisk_addr_r=0xa0000000\0" \ | |
87 | "kernel_start=0x1000000\0" \ | |
88 | "kernelheader_start=0x600000\0" \ | |
89 | "kernel_load=0xa0000000\0" \ | |
90 | "kernel_size=0x2800000\0" \ | |
91 | "kernelheader_size=0x40000\0" \ | |
92 | "kernel_addr_sd=0x8000\0" \ | |
93 | "kernel_size_sd=0x14000\0" \ | |
94 | "kernelhdr_addr_sd=0x3000\0" \ | |
95 | "kernelhdr_size_sd=0x20\0" \ | |
96 | "console=ttyS0,115200\0" \ | |
97 | "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ | |
98 | BOOTENV \ | |
99 | "boot_scripts=ls1028ardb_boot.scr\0" \ | |
100 | "boot_script_hdr=hdr_ls1028ardb_bs.out\0" \ | |
101 | "scan_dev_for_boot_part=" \ | |
102 | "part list ${devtype} ${devnum} devplist; " \ | |
103 | "env exists devplist || setenv devplist 1; " \ | |
104 | "for distro_bootpart in ${devplist}; do " \ | |
105 | "if fstype ${devtype} " \ | |
106 | "${devnum}:${distro_bootpart} " \ | |
107 | "bootfstype; then " \ | |
108 | "run scan_dev_for_boot; " \ | |
109 | "fi; " \ | |
110 | "done\0" \ | |
a023c3c2 YT |
111 | "boot_a_script=" \ |
112 | "load ${devtype} ${devnum}:${distro_bootpart} " \ | |
113 | "${scriptaddr} ${prefix}${script}; " \ | |
114 | "env exists secureboot && load ${devtype} " \ | |
115 | "${devnum}:${distro_bootpart} " \ | |
116 | "${scripthdraddr} ${prefix}${boot_script_hdr} " \ | |
117 | "&& esbc_validate ${scripthdraddr};" \ | |
118 | "source ${scriptaddr}\0" \ | |
119 | "xspi_bootcmd=echo Trying load from FlexSPI flash ...;" \ | |
120 | "sf probe 0:0 && sf read $load_addr " \ | |
121 | "$kernel_start $kernel_size ; env exists secureboot &&" \ | |
122 | "sf read $kernelheader_addr_r $kernelheader_start " \ | |
123 | "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; "\ | |
124 | " bootm $load_addr#$board\0" \ | |
125 | "xspi_hdploadcmd=echo Trying load HDP firmware from FlexSPI...;" \ | |
126 | "sf probe 0:0 && sf read $load_addr 0x940000 0x30000 " \ | |
127 | "&& hdp load $load_addr 0x2000\0" \ | |
128 | "sd_bootcmd=echo Trying load from SD ...;" \ | |
129 | "mmc dev 0;mmcinfo; mmc read $load_addr " \ | |
130 | "$kernel_addr_sd $kernel_size_sd && " \ | |
131 | "env exists secureboot && mmc read $kernelheader_addr_r " \ | |
132 | "$kernelhdr_addr_sd $kernelhdr_size_sd " \ | |
133 | " && esbc_validate ${kernelheader_addr_r};" \ | |
134 | "bootm $load_addr#$board\0" \ | |
135 | "sd_hdploadcmd=echo Trying load HDP firmware from SD..;" \ | |
136 | "mmc dev 0;mmcinfo;mmc read $load_addr 0x4a00 0x200 " \ | |
137 | "&& hdp load $load_addr 0x2000\0" \ | |
138 | "emmc_bootcmd=echo Trying load from EMMC ..;" \ | |
139 | "mmc dev 1;mmcinfo; mmc read $load_addr " \ | |
140 | "$kernel_addr_sd $kernel_size_sd && " \ | |
141 | "env exists secureboot && mmc read $kernelheader_addr_r " \ | |
142 | "$kernelhdr_addr_sd $kernelhdr_size_sd " \ | |
143 | " && esbc_validate ${kernelheader_addr_r};" \ | |
144 | "bootm $load_addr#$board\0" \ | |
145 | "emmc_hdploadcmd=echo Trying load HDP firmware from EMMC..;" \ | |
146 | "mmc dev 1;mmcinfo;mmc read $load_addr 0x4a00 0x200 " \ | |
147 | "&& hdp load $load_addr 0x2000\0" | |
148 | #endif | |
353f36d9 | 149 | #endif /* __LS1028A_RDB_H */ |