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0f83b365 MV |
1 | /* |
2 | * DENX M53 configuration | |
3 | * Copyright (C) 2012-2013 Marek Vasut <marex@denx.de> | |
4 | * | |
3765b3e7 | 5 | * SPDX-License-Identifier: GPL-2.0+ |
0f83b365 MV |
6 | */ |
7 | ||
8 | #ifndef __M53EVK_CONFIG_H__ | |
9 | #define __M53EVK_CONFIG_H__ | |
10 | ||
11 | #define CONFIG_MX53 | |
12 | #define CONFIG_MXC_GPIO | |
0f83b365 MV |
13 | |
14 | #include <asm/arch/imx-regs.h> | |
15 | ||
16 | #define CONFIG_DISPLAY_CPUINFO | |
17 | #define CONFIG_BOARD_EARLY_INIT_F | |
18 | #define CONFIG_REVISION_TAG | |
19 | #define CONFIG_SYS_NO_FLASH | |
18fb0e3c | 20 | #define CONFIG_SYS_FSL_CLK |
0f83b365 | 21 | |
62d3c2d6 MV |
22 | #define CONFIG_TIMESTAMP /* Print image info with timestamp */ |
23 | ||
0f83b365 MV |
24 | /* |
25 | * U-Boot Commands | |
26 | */ | |
0f83b365 MV |
27 | #define CONFIG_DISPLAY_BOARDINFO |
28 | #define CONFIG_DOS_PARTITION | |
62d3c2d6 | 29 | #define CONFIG_FAT_WRITE |
0f83b365 | 30 | |
62d3c2d6 MV |
31 | #define CONFIG_CMD_ASKENV |
32 | #define CONFIG_CMD_BMP | |
0f83b365 | 33 | #define CONFIG_CMD_DATE |
62d3c2d6 MV |
34 | #define CONFIG_CMD_EXT4 |
35 | #define CONFIG_CMD_EXT4_WRITE | |
0f83b365 | 36 | #define CONFIG_CMD_FAT |
febae49a | 37 | #define CONFIG_CMD_FS_GENERIC |
62d3c2d6 | 38 | #define CONFIG_CMD_GREPENV |
0f83b365 MV |
39 | #define CONFIG_CMD_MII |
40 | #define CONFIG_CMD_MMC | |
41 | #define CONFIG_CMD_NAND | |
08cb4483 | 42 | #define CONFIG_CMD_NAND_TRIMFFS |
0f83b365 | 43 | #define CONFIG_CMD_SATA |
502a710f | 44 | #define CONFIG_VIDEO |
0f83b365 | 45 | |
9a12fcd0 | 46 | |
0f83b365 MV |
47 | /* |
48 | * Memory configurations | |
49 | */ | |
50 | #define CONFIG_NR_DRAM_BANKS 2 | |
51 | #define PHYS_SDRAM_1 CSD0_BASE_ADDR | |
97334c66 | 52 | #define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size) |
0f83b365 | 53 | #define PHYS_SDRAM_2 CSD1_BASE_ADDR |
97334c66 MV |
54 | #define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size) |
55 | #define PHYS_SDRAM_SIZE (gd->ram_size) | |
0f83b365 MV |
56 | #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) |
57 | #define CONFIG_SYS_MEMTEST_START 0x70000000 | |
2f844e76 | 58 | #define CONFIG_SYS_MEMTEST_END 0x8ff00000 |
0f83b365 MV |
59 | |
60 | #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) | |
61 | #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) | |
62 | #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) | |
63 | ||
64 | #define CONFIG_SYS_INIT_SP_OFFSET \ | |
65 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) | |
66 | #define CONFIG_SYS_INIT_SP_ADDR \ | |
67 | (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) | |
68 | ||
69 | #define CONFIG_SYS_TEXT_BASE 0x71000000 | |
70 | ||
71 | /* | |
72 | * U-Boot general configurations | |
73 | */ | |
74 | #define CONFIG_SYS_LONGHELP | |
0f83b365 MV |
75 | #define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */ |
76 | #define CONFIG_SYS_PBSIZE \ | |
77 | (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) | |
78 | /* Print buffer size */ | |
79 | #define CONFIG_SYS_MAXARGS 32 /* Max number of command args */ | |
80 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE | |
81 | /* Boot argument buffer size */ | |
82 | #define CONFIG_VERSION_VARIABLE /* U-BOOT version */ | |
83 | #define CONFIG_AUTO_COMPLETE /* Command auto complete */ | |
84 | #define CONFIG_CMDLINE_EDITING /* Command history etc */ | |
0f83b365 MV |
85 | |
86 | /* | |
87 | * Serial Driver | |
88 | */ | |
89 | #define CONFIG_MXC_UART | |
90 | #define CONFIG_MXC_UART_BASE UART2_BASE | |
91 | #define CONFIG_CONS_INDEX 1 | |
92 | #define CONFIG_BAUDRATE 115200 | |
93 | ||
94 | /* | |
95 | * MMC Driver | |
96 | */ | |
97 | #ifdef CONFIG_CMD_MMC | |
98 | #define CONFIG_MMC | |
99 | #define CONFIG_GENERIC_MMC | |
100 | #define CONFIG_FSL_ESDHC | |
101 | #define CONFIG_SYS_FSL_ESDHC_ADDR 0 | |
102 | #define CONFIG_SYS_FSL_ESDHC_NUM 1 | |
103 | #endif | |
104 | ||
105 | /* | |
106 | * NAND | |
107 | */ | |
108 | #define CONFIG_ENV_SIZE (16 * 1024) | |
109 | #ifdef CONFIG_CMD_NAND | |
110 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 | |
111 | #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR_AXI | |
112 | #define CONFIG_NAND_MXC | |
113 | #define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR_AXI | |
114 | #define CONFIG_MXC_NAND_IP_REGS_BASE NFC_BASE_ADDR | |
115 | #define CONFIG_SYS_NAND_LARGEPAGE | |
116 | #define CONFIG_MXC_NAND_HWECC | |
117 | #define CONFIG_SYS_NAND_USE_FLASH_BBT | |
118 | ||
119 | /* Environment is in NAND */ | |
120 | #define CONFIG_ENV_IS_IN_NAND | |
121 | #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE | |
122 | #define CONFIG_ENV_SECT_SIZE (128 * 1024) | |
fc23b530 MV |
123 | #define CONFIG_ENV_RANGE (4 * CONFIG_ENV_SECT_SIZE) |
124 | #define CONFIG_ENV_OFFSET (8 * CONFIG_ENV_SECT_SIZE) /* 1 MiB */ | |
0f83b365 MV |
125 | #define CONFIG_ENV_OFFSET_REDUND \ |
126 | (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE) | |
127 | ||
128 | #define CONFIG_CMD_UBI | |
129 | #define CONFIG_CMD_UBIFS | |
130 | #define CONFIG_CMD_MTDPARTS | |
131 | #define CONFIG_RBTREE | |
132 | #define CONFIG_LZO | |
133 | #define CONFIG_MTD_DEVICE | |
134 | #define CONFIG_MTD_PARTITIONS | |
8331273c | 135 | #define MTDIDS_DEFAULT "nand0=mxc_nand" |
0f83b365 | 136 | #define MTDPARTS_DEFAULT \ |
8331273c | 137 | "mtdparts=mxc_nand:" \ |
fc23b530 MV |
138 | "1024k(u-boot)," \ |
139 | "512k(env1)," \ | |
140 | "512k(env2)," \ | |
141 | "14m(boot)," \ | |
142 | "240m(data)," \ | |
143 | "-@2048k(UBI)" | |
0f83b365 MV |
144 | #else |
145 | #define CONFIG_ENV_IS_NOWHERE | |
146 | #endif | |
147 | ||
148 | /* | |
149 | * Ethernet on SOC (FEC) | |
150 | */ | |
151 | #ifdef CONFIG_CMD_NET | |
152 | #define CONFIG_FEC_MXC | |
153 | #define IMX_FEC_BASE FEC_BASE_ADDR | |
154 | #define CONFIG_FEC_MXC_PHYADDR 0x0 | |
155 | #define CONFIG_MII | |
156 | #define CONFIG_DISCOVER_PHY | |
157 | #define CONFIG_FEC_XCV_TYPE RMII | |
158 | #define CONFIG_PHYLIB | |
159 | #define CONFIG_PHY_MICREL | |
85d8a5fc | 160 | #define CONFIG_ETHPRIME "FEC0" |
0f83b365 MV |
161 | #endif |
162 | ||
163 | /* | |
164 | * I2C | |
165 | */ | |
166 | #ifdef CONFIG_CMD_I2C | |
b089d039 | 167 | #define CONFIG_SYS_I2C |
168 | #define CONFIG_SYS_I2C_MXC | |
03544c66 AA |
169 | #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ |
170 | #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ | |
f8cb101e | 171 | #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ |
25fe0572 | 172 | #define CONFIG_SYS_RTC_BUS_NUM 1 /* I2C2 */ |
0f83b365 MV |
173 | #endif |
174 | ||
175 | /* | |
176 | * RTC | |
177 | */ | |
178 | #ifdef CONFIG_CMD_DATE | |
179 | #define CONFIG_RTC_M41T62 | |
180 | #define CONFIG_SYS_I2C_RTC_ADDR 0x68 | |
181 | #define CONFIG_SYS_M41T11_BASE_YEAR 2000 | |
182 | #endif | |
183 | ||
184 | /* | |
185 | * USB | |
186 | */ | |
187 | #ifdef CONFIG_CMD_USB | |
188 | #define CONFIG_USB_EHCI | |
189 | #define CONFIG_USB_EHCI_MX5 | |
190 | #define CONFIG_USB_STORAGE | |
191 | #define CONFIG_USB_HOST_ETHER | |
192 | #define CONFIG_USB_ETHER_ASIX | |
a743415f | 193 | #define CONFIG_USB_ETHER_MCS7830 |
0f83b365 MV |
194 | #define CONFIG_USB_ETHER_SMSC95XX |
195 | #define CONFIG_MXC_USB_PORT 1 | |
196 | #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) | |
197 | #define CONFIG_MXC_USB_FLAGS 0 | |
198 | #endif | |
199 | ||
200 | /* | |
201 | * SATA | |
202 | */ | |
203 | #ifdef CONFIG_CMD_SATA | |
204 | #define CONFIG_DWC_AHSATA | |
205 | #define CONFIG_SYS_SATA_MAX_DEVICE 1 | |
206 | #define CONFIG_DWC_AHSATA_PORT_ID 0 | |
207 | #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_BASE_ADDR | |
208 | #define CONFIG_LBA48 | |
209 | #define CONFIG_LIBATA | |
210 | #endif | |
211 | ||
502a710f MV |
212 | /* |
213 | * LCD | |
214 | */ | |
215 | #ifdef CONFIG_VIDEO | |
216 | #define CONFIG_VIDEO_IPUV3 | |
217 | #define CONFIG_CFB_CONSOLE | |
218 | #define CONFIG_VGA_AS_SINGLE_DEVICE | |
219 | #define CONFIG_SYS_CONSOLE_IS_IN_ENV | |
220 | #define CONFIG_VIDEO_BMP_RLE8 | |
62d3c2d6 | 221 | #define CONFIG_VIDEO_BMP_GZIP |
502a710f | 222 | #define CONFIG_SPLASH_SCREEN |
62d3c2d6 MV |
223 | #define CONFIG_SPLASHIMAGE_GUARD |
224 | #define CONFIG_SPLASH_SCREEN_ALIGN | |
502a710f MV |
225 | #define CONFIG_BMP_16BPP |
226 | #define CONFIG_VIDEO_LOGO | |
62d3c2d6 MV |
227 | #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (2 << 20) |
228 | #define CONFIG_IPUV3_CLK 200000000 | |
502a710f MV |
229 | #endif |
230 | ||
0f83b365 MV |
231 | /* |
232 | * Boot Linux | |
233 | */ | |
234 | #define CONFIG_CMDLINE_TAG | |
235 | #define CONFIG_INITRD_TAG | |
236 | #define CONFIG_REVISION_TAG | |
237 | #define CONFIG_SETUP_MEMORY_TAGS | |
238 | #define CONFIG_BOOTDELAY 3 | |
85d8a5fc | 239 | #define CONFIG_BOOTFILE "fitImage" |
0f83b365 MV |
240 | #define CONFIG_BOOTARGS "console=ttymxc1,115200" |
241 | #define CONFIG_LOADADDR 0x70800000 | |
85d8a5fc | 242 | #define CONFIG_BOOTCOMMAND "run mmc_mmc" |
0f83b365 | 243 | #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR |
0f83b365 MV |
244 | |
245 | /* | |
246 | * NAND SPL | |
247 | */ | |
0f83b365 MV |
248 | #define CONFIG_SPL_FRAMEWORK |
249 | #define CONFIG_SPL_TARGET "u-boot-with-nand-spl.imx" | |
250 | #define CONFIG_SPL_BOARD_INIT | |
251 | #define CONFIG_SPL_TEXT_BASE 0x70008000 | |
252 | #define CONFIG_SPL_PAD_TO 0x8000 | |
253 | #define CONFIG_SPL_STACK 0x70004000 | |
254 | #define CONFIG_SPL_GPIO_SUPPORT | |
255 | #define CONFIG_SPL_LIBCOMMON_SUPPORT | |
256 | #define CONFIG_SPL_LIBGENERIC_SUPPORT | |
257 | #define CONFIG_SPL_NAND_SUPPORT | |
258 | #define CONFIG_SPL_SERIAL_SUPPORT | |
259 | ||
260 | #define CONFIG_SYS_NAND_U_BOOT_OFFS CONFIG_SPL_PAD_TO | |
261 | #define CONFIG_SYS_NAND_PAGE_SIZE 2048 | |
262 | #define CONFIG_SYS_NAND_OOBSIZE 64 | |
263 | #define CONFIG_SYS_NAND_PAGE_COUNT 64 | |
264 | #define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024) | |
265 | #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 | |
266 | ||
85d8a5fc LR |
267 | /* |
268 | * Extra Environments | |
269 | */ | |
270 | #define CONFIG_PREBOOT "run try_bootscript" | |
271 | #define CONFIG_HOSTNAME m53evk | |
272 | ||
273 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
274 | "consdev=ttymxc1\0" \ | |
275 | "baudrate=115200\0" \ | |
276 | "bootscript=boot.scr\0" \ | |
277 | "bootdev=/dev/mmcblk0p1\0" \ | |
278 | "rootdev=/dev/mmcblk0p2\0" \ | |
279 | "netdev=eth0\0" \ | |
280 | "rootpath=/opt/eldk-5.5/armv7a-hf/rootfs-qte-sdk\0" \ | |
281 | "kernel_addr_r=0x72000000\0" \ | |
282 | "addcons=" \ | |
283 | "setenv bootargs ${bootargs} " \ | |
284 | "console=${consdev},${baudrate}\0" \ | |
285 | "addip=" \ | |
286 | "setenv bootargs ${bootargs} " \ | |
287 | "ip=${ipaddr}:${serverip}:${gatewayip}:" \ | |
288 | "${netmask}:${hostname}:${netdev}:off\0" \ | |
289 | "addmisc=" \ | |
290 | "setenv bootargs ${bootargs} ${miscargs}\0" \ | |
291 | "adddfltmtd=" \ | |
292 | "if test \"x${mtdparts}\" == \"x\" ; then " \ | |
293 | "mtdparts default ; " \ | |
294 | "fi\0" \ | |
295 | "addmtd=" \ | |
296 | "run adddfltmtd ; " \ | |
297 | "setenv bootargs ${bootargs} ${mtdparts}\0" \ | |
298 | "addargs=run addcons addmtd addmisc\0" \ | |
299 | "mmcload=" \ | |
300 | "mmc rescan ; " \ | |
febae49a | 301 | "load mmc 0:1 ${kernel_addr_r} ${bootfile}\0" \ |
85d8a5fc LR |
302 | "ubiload=" \ |
303 | "ubi part UBI ; ubifsmount ubi0:rootfs ; " \ | |
304 | "ubifsload ${kernel_addr_r} /boot/${bootfile}\0" \ | |
305 | "netload=" \ | |
306 | "tftp ${kernel_addr_r} ${hostname}/${bootfile}\0" \ | |
307 | "miscargs=nohlt panic=1\0" \ | |
308 | "mmcargs=setenv bootargs root=${rootdev} rw rootwait\0" \ | |
309 | "ubiargs=" \ | |
310 | "setenv bootargs ubi.mtd=5 " \ | |
311 | "root=ubi0:rootfs rootfstype=ubifs\0" \ | |
312 | "nfsargs=" \ | |
313 | "setenv bootargs root=/dev/nfs rw " \ | |
314 | "nfsroot=${serverip}:${rootpath},v3,tcp\0" \ | |
315 | "mmc_mmc=" \ | |
316 | "run mmcload mmcargs addargs ; " \ | |
317 | "bootm ${kernel_addr_r}\0" \ | |
318 | "mmc_ubi=" \ | |
319 | "run mmcload ubiargs addargs ; " \ | |
320 | "bootm ${kernel_addr_r}\0" \ | |
321 | "mmc_nfs=" \ | |
322 | "run mmcload nfsargs addip addargs ; " \ | |
323 | "bootm ${kernel_addr_r}\0" \ | |
324 | "ubi_mmc=" \ | |
325 | "run ubiload mmcargs addargs ; " \ | |
326 | "bootm ${kernel_addr_r}\0" \ | |
327 | "ubi_ubi=" \ | |
328 | "run ubiload ubiargs addargs ; " \ | |
329 | "bootm ${kernel_addr_r}\0" \ | |
330 | "ubi_nfs=" \ | |
331 | "run ubiload nfsargs addip addargs ; " \ | |
332 | "bootm ${kernel_addr_r}\0" \ | |
333 | "net_mmc=" \ | |
334 | "run netload mmcargs addargs ; " \ | |
335 | "bootm ${kernel_addr_r}\0" \ | |
336 | "net_ubi=" \ | |
337 | "run netload ubiargs addargs ; " \ | |
338 | "bootm ${kernel_addr_r}\0" \ | |
339 | "net_nfs=" \ | |
340 | "run netload nfsargs addip addargs ; " \ | |
341 | "bootm ${kernel_addr_r}\0" \ | |
342 | "try_bootscript=" \ | |
343 | "mmc rescan;" \ | |
14b256e5 | 344 | "if test -e mmc 0:1 ${bootscript} ; then " \ |
febae49a | 345 | "if load mmc 0:1 ${kernel_addr_r} ${bootscript};" \ |
252499e6 MV |
346 | "then ; " \ |
347 | "echo Running bootscript... ; " \ | |
348 | "source ${kernel_addr_r} ; " \ | |
14b256e5 | 349 | "fi ; " \ |
85d8a5fc LR |
350 | "fi\0" |
351 | ||
0f83b365 | 352 | #endif /* __M53EVK_CONFIG_H__ */ |