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4b3ab59d CC |
1 | /* |
2 | * Configuration for Amlogic Meson GXBB SoCs | |
3 | * (C) Copyright 2016 Beniamino Galvani <b.galvani@gmail.com> | |
4 | * | |
5 | * SPDX-License-Identifier: GPL-2.0+ | |
6 | */ | |
7 | ||
8 | #ifndef __MESON_GXBB_COMMON_CONFIG_H | |
9 | #define __MESON_GXBB_COMMON_CONFIG_H | |
10 | ||
11 | #define CONFIG_CPU_ARMV8 | |
12 | #define CONFIG_REMAKE_ELF | |
e42f096f | 13 | #define CONFIG_NR_DRAM_BANKS 2 |
4b3ab59d CC |
14 | #define CONFIG_ENV_SIZE 0x2000 |
15 | #define CONFIG_SYS_MAXARGS 32 | |
16 | #define CONFIG_SYS_MALLOC_LEN (32 << 20) | |
17 | #define CONFIG_SYS_CBSIZE 1024 | |
4b3ab59d CC |
18 | |
19 | #define CONFIG_SYS_SDRAM_BASE 0 | |
20 | #define CONFIG_SYS_TEXT_BASE 0x01000000 | |
21 | #define CONFIG_SYS_INIT_SP_ADDR 0x20000000 | |
22 | #define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_TEXT_BASE | |
23 | ||
24 | /* Generic Interrupt Controller Definitions */ | |
25 | #define GICD_BASE 0xc4301000 | |
26 | #define GICC_BASE 0xc4302000 | |
27 | ||
4b3ab59d CC |
28 | #define CONFIG_SYS_LONGHELP |
29 | #define CONFIG_CMDLINE_EDITING | |
30 | ||
31 | #include <config_distro_defaults.h> | |
32 | ||
70b8bd7d | 33 | #define BOOT_TARGET_DEVICES(func) \ |
1f677e42 | 34 | func(MMC, mmc, 0) \ |
35 | func(MMC, mmc, 1) \ | |
36 | func(MMC, mmc, 2) \ | |
e320d377 | 37 | func(PXE, pxe, na) \ |
70b8bd7d AF |
38 | func(DHCP, dhcp, na) |
39 | ||
40 | #include <config_distro_bootcmd.h> | |
41 | ||
42 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
43 | "fdt_addr_r=0x01000000\0" \ | |
44 | "scriptaddr=0x1f000000\0" \ | |
45 | "kernel_addr_r=0x01080000\0" \ | |
46 | "pxefile_addr_r=0x01080000\0" \ | |
d0385748 | 47 | "ramdisk_addr_r=0x13000000\0" \ |
70b8bd7d AF |
48 | MESON_FDTFILE_SETTING \ |
49 | BOOTENV | |
50 | ||
cc93834d | 51 | #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64 MiB */ |
52 | ||
4b3ab59d | 53 | #endif /* __MESON_GXBB_COMMON_CONFIG_H */ |