[thirdparty/u-boot.git] / include / configs / microblaze-generic.h

/* SPDX-License-Identifier: GPL-2.0+ */
/*
 * (C) Copyright 2007-2010 Michal Simek
 *
 * Michal SIMEK <monstr@monstr.eu>
 */

#ifndef __CONFIG_H
#define __CONFIG_H

#include "../board/xilinx/microblaze-generic/xparameters.h"

/* MicroBlaze CPU */
#define	MICROBLAZE_V5		1

/* linear and spi flash memory */
#ifdef XILINX_FLASH_START
#define	FLASH
#undef	SPIFLASH
#undef	RAMENV	/* hold environment in flash */
#else
#ifdef XILINX_SPI_FLASH_BASEADDR
#undef	FLASH
#define	SPIFLASH
#undef	RAMENV	/* hold environment in flash */
#else
#undef	FLASH
#undef	SPIFLASH
#define	RAMENV	/* hold environment in RAM */
#endif
#endif

/* uart */
/* The following table includes the supported baudrates */
# define CONFIG_SYS_BAUDRATE_TABLE \
	{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}

/* setting reset address */
/*#define	CONFIG_SYS_RESET_ADDRESS	CONFIG_SYS_TEXT_BASE*/

/* gpio */
#ifdef XILINX_GPIO_BASEADDR
# define CONFIG_SYS_GPIO_0_ADDR		XILINX_GPIO_BASEADDR
#endif

/* watchdog */
#if defined(XILINX_WATCHDOG_BASEADDR) && defined(XILINX_WATCHDOG_IRQ)
# define CONFIG_WATCHDOG_BASEADDR	XILINX_WATCHDOG_BASEADDR
# define CONFIG_WATCHDOG_IRQ		XILINX_WATCHDOG_IRQ
# ifndef CONFIG_SPL_BUILD
#  define CONFIG_HW_WATCHDOG
#  define CONFIG_XILINX_TB_WATCHDOG
# endif
#endif

#define CONFIG_SYS_MALLOC_LEN	0xC0000

/* Stack location before relocation */
#define CONFIG_SYS_INIT_SP_OFFSET	(CONFIG_SYS_TEXT_BASE - \
					 CONFIG_SYS_MALLOC_F_LEN)

/*
 * CFI flash memory layout - Example
 * CONFIG_SYS_FLASH_BASE = 0x2200_0000;
 * CONFIG_SYS_FLASH_SIZE = 0x0080_0000;	  8MB
 *
 * SECT_SIZE = 0x20000;			128kB is one sector
 * CONFIG_ENV_SIZE = SECT_SIZE;		128kB environment store
 *
 * 0x2200_0000	CONFIG_SYS_FLASH_BASE
 *					FREE		256kB
 * 0x2204_0000	CONFIG_ENV_ADDR
 *					ENV_AREA	128kB
 * 0x2206_0000
 *					FREE
 * 0x2280_0000	CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE
 *
 */

#ifdef FLASH
# define CONFIG_SYS_FLASH_BASE		XILINX_FLASH_START
# define CONFIG_SYS_FLASH_SIZE		XILINX_FLASH_SIZE
# define CONFIG_SYS_FLASH_CFI		1
# define CONFIG_FLASH_CFI_DRIVER	1
/* ?empty sector */
# define CONFIG_SYS_FLASH_EMPTY_INFO	1
/* max number of memory banks */
# define CONFIG_SYS_MAX_FLASH_BANKS	1
/* max number of sectors on one chip */
# define CONFIG_SYS_MAX_FLASH_SECT	512
/* hardware flash protection */
# define CONFIG_SYS_FLASH_PROTECTION
/* use buffered writes (20x faster) */
# define	CONFIG_SYS_FLASH_USE_BUFFER_WRITE	1
# ifdef	RAMENV
#  define CONFIG_ENV_SIZE	0x1000
#  define CONFIG_ENV_ADDR	(CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE)

# else	/* FLASH && !RAMENV */
/* 128K(one sector) for env */
#  define CONFIG_ENV_SECT_SIZE	0x20000
#  define CONFIG_ENV_ADDR \
			(CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE))
#  define CONFIG_ENV_SIZE	0x20000
# endif /* FLASH && !RAMBOOT */
#else /* !FLASH */

#ifdef SPIFLASH
# define CONFIG_SYS_SPI_BASE		XILINX_SPI_FLASH_BASEADDR
# define CONFIG_SF_DEFAULT_MODE		SPI_MODE_3
# define CONFIG_SF_DEFAULT_SPEED	XILINX_SPI_FLASH_MAX_FREQ
# define CONFIG_SF_DEFAULT_CS		XILINX_SPI_FLASH_CS

# ifdef	RAMENV
#  define CONFIG_ENV_SIZE	0x1000
#  define CONFIG_ENV_ADDR	(CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE)

# else	/* SPIFLASH && !RAMENV */
#  define CONFIG_ENV_SPI_MODE		SPI_MODE_3
#  define CONFIG_ENV_SPI_MAX_HZ		CONFIG_SF_DEFAULT_SPEED
#  define CONFIG_ENV_SPI_CS		CONFIG_SF_DEFAULT_CS
/* 128K(two sectors) for env */
#  define CONFIG_ENV_SECT_SIZE	0x10000
#  define CONFIG_ENV_SIZE	(2 * CONFIG_ENV_SECT_SIZE)
/* Warning: adjust the offset in respect of other flash content and size */
#  define CONFIG_ENV_OFFSET	(128 * CONFIG_ENV_SECT_SIZE) /* at 8MB */
# endif /* SPIFLASH && !RAMBOOT */
#else /* !SPIFLASH */

/* ENV in RAM */
# define CONFIG_ENV_SIZE	0x1000
# define CONFIG_ENV_ADDR	(CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE)
#endif /* !SPIFLASH */
#endif /* !FLASH */

#if defined(XILINX_USE_ICACHE)
# define CONFIG_ICACHE
#else
# undef CONFIG_ICACHE
#endif

#if defined(XILINX_USE_DCACHE)
# define CONFIG_DCACHE
#else
# undef CONFIG_DCACHE
#endif

#ifndef XILINX_DCACHE_BYTE_SIZE
#define XILINX_DCACHE_BYTE_SIZE	32768
#endif

/*
 * BOOTP options
 */
#define CONFIG_BOOTP_BOOTFILESIZE

#if defined(CONFIG_CMD_JFFS2)
# define CONFIG_MTD_PARTITIONS
#endif

#if defined(CONFIG_CMD_UBI)
# define CONFIG_MTD_PARTITIONS
#endif

#if defined(CONFIG_MTD_PARTITIONS)
/* MTD partitions */
#define CONFIG_MTD_DEVICE	/* needed for mtdparts commands */
#define CONFIG_FLASH_CFI_MTD

/* default mtd partition table */
#endif

/* size of console buffer */
#define	CONFIG_SYS_CBSIZE	512
/* max number of command args */
#define	CONFIG_SYS_MAXARGS	15
/* default load address */
#define	CONFIG_SYS_LOAD_ADDR	0

#define	CONFIG_HOSTNAME		"microblaze-generic"
#define	CONFIG_BOOTCOMMAND	"base 0;tftp 11000000 image.img;bootm"

/* architecture dependent code */
#define	CONFIG_SYS_USR_EXCEP	/* user exception */

#define	CONFIG_PREBOOT	"echo U-BOOT for ${hostname};setenv preboot;echo"

#ifndef CONFIG_EXTRA_ENV_SETTINGS
#define	CONFIG_EXTRA_ENV_SETTINGS	"unlock=yes\0" \
					"nor0=flash-0\0"\
					"mtdparts=mtdparts=flash-0:"\
					"256k(u-boot),256k(env),3m(kernel),"\
					"1m(romfs),1m(cramfs),-(jffs2)\0"\
					"nc=setenv stdout nc;"\
					"setenv stdin nc\0" \
					"serial=setenv stdout serial;"\
					"setenv stdin serial\0"
#endif

/* Enable flat device tree support */
#define CONFIG_LMB		1

#if defined(CONFIG_XILINX_AXIEMAC)
# define CONFIG_MII		1
# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN	1
#else
# undef CONFIG_MII
#endif

/* SPL part */

#ifdef CONFIG_SYS_FLASH_BASE
# define CONFIG_SYS_UBOOT_BASE		CONFIG_SYS_FLASH_BASE
#endif

/* for booting directly linux */

#define CONFIG_SYS_FDT_BASE		(CONFIG_SYS_FLASH_BASE + \
					 0x40000)
#define CONFIG_SYS_FDT_SIZE		(16<<10)
#define CONFIG_SYS_SPL_ARGS_ADDR	(CONFIG_SYS_TEXT_BASE + \
					 0x1000000)

/* SP location before relocation, must use scratch RAM */
/* BRAM start */
#define CONFIG_SYS_INIT_RAM_ADDR	0x0
/* BRAM size - will be generated */
#define CONFIG_SYS_INIT_RAM_SIZE	0x100000

# define CONFIG_SPL_STACK_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
					 CONFIG_SYS_INIT_RAM_SIZE - \
					 CONFIG_SYS_MALLOC_F_LEN)

/* Just for sure that there is a space for stack */
#define CONFIG_SPL_STACK_SIZE		0x100

#define CONFIG_SYS_UBOOT_START		CONFIG_SYS_TEXT_BASE

#define CONFIG_SPL_MAX_FOOTPRINT	(CONFIG_SYS_INIT_RAM_SIZE - \
					 CONFIG_SYS_INIT_RAM_ADDR - \
					 CONFIG_SYS_MALLOC_F_LEN - \
					 CONFIG_SPL_STACK_SIZE)

#endif	/* __CONFIG_H */
Commit	Line	Data
83d290c5	1	/* SPDX-License-Identifier: GPL-2.0+ */
76316a31	2	/*
4aecfb16	3	* (C) Copyright 2007-2010 Michal Simek
76316a31	4	*
cb1bc63b	5	* Michal SIMEK <monstr@monstr.eu>
76316a31 MS	6	*/
	7
	8	#ifndef __CONFIG_H
	9	#define __CONFIG_H
	10
52a822ed	11	#include "../board/xilinx/microblaze-generic/xparameters.h"
76316a31	12
4aecfb16	13	/* MicroBlaze CPU */
1a50f164	14	#define MICROBLAZE_V5 1
76316a31	15
bcec8f49	16	/* linear and spi flash memory */
1fe7e8fa SL	17	#ifdef XILINX_FLASH_START
1fe7e8fa SL	18	#define FLASH
bcec8f49	19	#undef SPIFLASH
1fe7e8fa SL	20	#undef RAMENV /* hold environment in flash */
1fe7e8fa SL	21	#else
bcec8f49	22	#ifdef XILINX_SPI_FLASH_BASEADDR
1fe7e8fa	23	#undef FLASH
bcec8f49 SL	24	#define SPIFLASH
	25	#undef RAMENV /* hold environment in flash */
	26	#else
	27	#undef FLASH
	28	#undef SPIFLASH
1fe7e8fa SL	29	#define RAMENV /* hold environment in RAM */
1fe7e8fa SL	30	#endif
bcec8f49	31	#endif
1fe7e8fa	32
76316a31	33	/* uart */
67659e2e MS	34	/* The following table includes the supported baudrates */
	35	# define CONFIG_SYS_BAUDRATE_TABLE \
	36	{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
	37
76316a31	38	/* setting reset address */
14d0a02a	39	/#define CONFIG_SYS_RESET_ADDRESS CONFIG_SYS_TEXT_BASE/
76316a31 MS	40
76316a31 MS	41	/* gpio */
4c6a6f02	42	#ifdef XILINX_GPIO_BASEADDR
4aecfb16	43	# define CONFIG_SYS_GPIO_0_ADDR XILINX_GPIO_BASEADDR
4c6a6f02	44	#endif
76316a31	45
0f21f98d MS	46	/* watchdog */
	47	#if defined(XILINX_WATCHDOG_BASEADDR) && defined(XILINX_WATCHDOG_IRQ)
	48	# define CONFIG_WATCHDOG_BASEADDR XILINX_WATCHDOG_BASEADDR
	49	# define CONFIG_WATCHDOG_IRQ XILINX_WATCHDOG_IRQ
b5e9b9a9 MS	50	# ifndef CONFIG_SPL_BUILD
	51	# define CONFIG_HW_WATCHDOG
	52	# define CONFIG_XILINX_TB_WATCHDOG
	53	# endif
0f21f98d MS	54	#endif
0f21f98d MS	55
e945f6dc MS	56	#define CONFIG_SYS_MALLOC_LEN 0xC0000
	57
	58	/* Stack location before relocation */
4fcd0b33 MS	59	#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_TEXT_BASE - \
4fcd0b33 MS	60	CONFIG_SYS_MALLOC_F_LEN)
76316a31	61
8f371b18 SL	62	/*
	63	* CFI flash memory layout - Example
	64	* CONFIG_SYS_FLASH_BASE = 0x2200_0000;
	65	* CONFIG_SYS_FLASH_SIZE = 0x0080_0000; 8MB
	66	*
	67	* SECT_SIZE = 0x20000; 128kB is one sector
	68	* CONFIG_ENV_SIZE = SECT_SIZE; 128kB environment store
	69	*
	70	* 0x2200_0000 CONFIG_SYS_FLASH_BASE
	71	* FREE 256kB
	72	* 0x2204_0000 CONFIG_ENV_ADDR
	73	* ENV_AREA 128kB
	74	* 0x2206_0000
	75	* FREE
	76	* 0x2280_0000 CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE
	77	*
	78	*/
	79
76316a31	80	#ifdef FLASH
4aecfb16 MS	81	# define CONFIG_SYS_FLASH_BASE XILINX_FLASH_START
	82	# define CONFIG_SYS_FLASH_SIZE XILINX_FLASH_SIZE
	83	# define CONFIG_SYS_FLASH_CFI 1
	84	# define CONFIG_FLASH_CFI_DRIVER 1
	85	/* ?empty sector */
	86	# define CONFIG_SYS_FLASH_EMPTY_INFO 1
	87	/* max number of memory banks */
	88	# define CONFIG_SYS_MAX_FLASH_BANKS 1
	89	/* max number of sectors on one chip */
	90	# define CONFIG_SYS_MAX_FLASH_SECT 512
	91	/* hardware flash protection */
	92	# define CONFIG_SYS_FLASH_PROTECTION
22ff7f4d MS	93	/* use buffered writes (20x faster) */
22ff7f4d MS	94	# define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
4aecfb16	95	# ifdef RAMENV
4aecfb16 MS	96	# define CONFIG_ENV_SIZE 0x1000
	97	# define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE)
	98
bcec8f49	99	# else /* FLASH && !RAMENV */
4aecfb16 MS	100	/* 128K(one sector) for env */
	101	# define CONFIG_ENV_SECT_SIZE 0x20000
	102	# define CONFIG_ENV_ADDR \
	103	(CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE))
	104	# define CONFIG_ENV_SIZE 0x20000
bcec8f49	105	# endif /* FLASH && !RAMBOOT */
76316a31	106	#else /* !FLASH */
bcec8f49 SL	107
bcec8f49 SL	108	#ifdef SPIFLASH
bcec8f49	109	# define CONFIG_SYS_SPI_BASE XILINX_SPI_FLASH_BASEADDR
bcec8f49 SL	110	# define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
	111	# define CONFIG_SF_DEFAULT_SPEED XILINX_SPI_FLASH_MAX_FREQ
	112	# define CONFIG_SF_DEFAULT_CS XILINX_SPI_FLASH_CS
	113
	114	# ifdef RAMENV
bcec8f49 SL	115	# define CONFIG_ENV_SIZE 0x1000
	116	# define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE)
	117
	118	# else /* SPIFLASH && !RAMENV */
bcec8f49 SL	119	# define CONFIG_ENV_SPI_MODE SPI_MODE_3
	120	# define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
	121	# define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
	122	/* 128K(two sectors) for env */
	123	# define CONFIG_ENV_SECT_SIZE 0x10000
	124	# define CONFIG_ENV_SIZE (2 * CONFIG_ENV_SECT_SIZE)
	125	/* Warning: adjust the offset in respect of other flash content and size */
	126	# define CONFIG_ENV_OFFSET (128 * CONFIG_ENV_SECT_SIZE) /* at 8MB */
	127	# endif /* SPIFLASH && !RAMBOOT */
	128	#else /* !SPIFLASH */
	129
4aecfb16	130	/* ENV in RAM */
4aecfb16 MS	131	# define CONFIG_ENV_SIZE 0x1000
4aecfb16 MS	132	# define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE)
bcec8f49	133	#endif /* !SPIFLASH */
76316a31 MS	134	#endif /* !FLASH */
76316a31 MS	135
e9b737de	136	#if defined(XILINX_USE_ICACHE)
4aecfb16	137	# define CONFIG_ICACHE
e9b737de	138	#else
4aecfb16	139	# undef CONFIG_ICACHE
e9b737de MS	140	#endif
	141
	142	#if defined(XILINX_USE_DCACHE)
4aecfb16	143	# define CONFIG_DCACHE
e9b737de	144	#else
4aecfb16	145	# undef CONFIG_DCACHE
e9b737de MS	146	#endif
e9b737de MS	147
5811830f MS	148	#ifndef XILINX_DCACHE_BYTE_SIZE
	149	#define XILINX_DCACHE_BYTE_SIZE 32768
	150	#endif
	151
079a136c JL	152	/*
	153	* BOOTP options
	154	*/
	155	#define CONFIG_BOOTP_BOOTFILESIZE
76316a31	156
5dc11a51	157	#if defined(CONFIG_CMD_JFFS2)
7cfb13a7 SL	158	# define CONFIG_MTD_PARTITIONS
	159	#endif
	160
7cfb13a7 SL	161	#if defined(CONFIG_CMD_UBI)
7cfb13a7 SL	162	# define CONFIG_MTD_PARTITIONS
7cfb13a7 SL	163	#endif
	164
	165	#if defined(CONFIG_MTD_PARTITIONS)
	166	/* MTD partitions */
942556a9 SR	167	#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
942556a9 SR	168	#define CONFIG_FLASH_CFI_MTD
144876a3 MS	169
144876a3 MS	170	/* default mtd partition table */
144876a3 MS	171	#endif
144876a3 MS	172
4aecfb16 MS	173	/* size of console buffer */
4aecfb16 MS	174	#define CONFIG_SYS_CBSIZE 512
4aecfb16 MS	175	/* max number of command args */
4aecfb16 MS	176	#define CONFIG_SYS_MAXARGS 15
4aecfb16	177	/* default load address */
44a3a91c	178	#define CONFIG_SYS_LOAD_ADDR 0
76316a31	179
5bc0543d	180	#define CONFIG_HOSTNAME "microblaze-generic"
853643d8	181	#define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm"
76316a31 MS	182
76316a31 MS	183	/* architecture dependent code */
6d0f6bcf	184	#define CONFIG_SYS_USR_EXCEP /* user exception */
76316a31	185
0900bee9	186	#define CONFIG_PREBOOT "echo U-BOOT for ${hostname};setenv preboot;echo"
144876a3	187
2902a9b7	188	#ifndef CONFIG_EXTRA_ENV_SETTINGS
4aecfb16	189	#define CONFIG_EXTRA_ENV_SETTINGS "unlock=yes\0" \
c82a541d SL	190	"nor0=flash-0\0"\
c82a541d SL	191	"mtdparts=mtdparts=flash-0:"\
144876a3	192	"256k(u-boot),256k(env),3m(kernel),"\
78376452 MS	193	"1m(romfs),1m(cramfs),-(jffs2)\0"\
	194	"nc=setenv stdout nc;"\
	195	"setenv stdin nc\0" \
	196	"serial=setenv stdout serial;"\
	197	"setenv stdin serial\0"
2902a9b7	198	#endif
144876a3	199
37e892d9 MS	200	/* Enable flat device tree support */
37e892d9 MS	201	#define CONFIG_LMB 1
37e892d9	202
4632b1ea	203	#if defined(CONFIG_XILINX_AXIEMAC)
f5e5e1ff	204	# define CONFIG_MII 1
f5e5e1ff	205	# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 1
f5e5e1ff SL	206	#else
f5e5e1ff SL	207	# undef CONFIG_MII
f5e5e1ff SL	208	#endif
f5e5e1ff SL	209
9d242745	210	/* SPL part */
9d242745	211
4dd09742	212	#ifdef CONFIG_SYS_FLASH_BASE
4dd09742 MS	213	# define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_FLASH_BASE
4dd09742 MS	214	#endif
9d242745 MS	215
9d242745 MS	216	/* for booting directly linux */
9d242745	217
9d242745 MS	218	#define CONFIG_SYS_FDT_BASE (CONFIG_SYS_FLASH_BASE + \
9d242745 MS	219	0x40000)
5aa79f26	220	#define CONFIG_SYS_FDT_SIZE (16<<10)
9d242745 MS	221	#define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_TEXT_BASE + \
	222	0x1000000)
	223
	224	/* SP location before relocation, must use scratch RAM */
	225	/* BRAM start */
	226	#define CONFIG_SYS_INIT_RAM_ADDR 0x0
	227	/* BRAM size - will be generated */
ca7d2266	228	#define CONFIG_SYS_INIT_RAM_SIZE 0x100000
9d242745	229
ca7d2266 MS	230	# define CONFIG_SPL_STACK_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
	231	CONFIG_SYS_INIT_RAM_SIZE - \
	232	CONFIG_SYS_MALLOC_F_LEN)
9d242745 MS	233
	234	/* Just for sure that there is a space for stack */
	235	#define CONFIG_SPL_STACK_SIZE 0x100
	236
9d242745 MS	237	#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
	238
	239	#define CONFIG_SPL_MAX_FOOTPRINT (CONFIG_SYS_INIT_RAM_SIZE - \
	240	CONFIG_SYS_INIT_RAM_ADDR - \
ca7d2266	241	CONFIG_SYS_MALLOC_F_LEN - \
9d242745 MS	242	CONFIG_SPL_STACK_SIZE)
9d242745 MS	243
76316a31	244	#endif /* __CONFIG_H */