projects / people / ms / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 76316a31 | 1 | /* |
| 4aecfb16 | 2 | * (C) Copyright 2007-2010 Michal Simek |
| 76316a31 | 3 | * |
| cb1bc63b | 4 | * Michal SIMEK <monstr@monstr.eu> |
| 76316a31 MS |
5 | * |
| 6 | * See file CREDITS for list of people who contributed to this | |
| 7 | * project. | |
| 8 | * | |
| 9 | * This program is free software; you can redistribute it and/or | |
| 10 | * modify it under the terms of the GNU General Public License as | |
| 11 | * published by the Free Software Foundation; either version 2 of | |
| 12 | * the License, or (at your option) any later version. | |
| 13 | * | |
| 14 | * This program is distributed in the hope that it will be useful, | |
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 17 | * GNU General Public License for more details. | |
| 18 | * | |
| 19 | * You should have received a copy of the GNU General Public License | |
| 20 | * along with this program; if not, write to the Free Software | |
| 21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
| 22 | * MA 02111-1307 USA | |
| 23 | */ | |
| 24 | ||
| 25 | #ifndef __CONFIG_H | |
| 26 | #define __CONFIG_H | |
| 27 | ||
| 52a822ed | 28 | #include "../board/xilinx/microblaze-generic/xparameters.h" |
| 76316a31 | 29 | |
| 4aecfb16 MS |
30 | /* MicroBlaze CPU */ |
| 31 | #define CONFIG_MICROBLAZE 1 | |
| 1a50f164 | 32 | #define MICROBLAZE_V5 1 |
| 76316a31 | 33 | |
| 920c3587 SL |
34 | /* Open Firmware DTS */ |
| 35 | #define CONFIG_OF_CONTROL 1 | |
| 36 | #define CONFIG_OF_EMBED 1 | |
| 37 | #define CONFIG_DEFAULT_DEVICE_TREE microblaze | |
| 38 | ||
| bcec8f49 | 39 | /* linear and spi flash memory */ |
| 1fe7e8fa SL |
40 | #ifdef XILINX_FLASH_START |
| 41 | #define FLASH | |
| bcec8f49 | 42 | #undef SPIFLASH |
| 1fe7e8fa SL |
43 | #undef RAMENV /* hold environment in flash */ |
| 44 | #else | |
| bcec8f49 | 45 | #ifdef XILINX_SPI_FLASH_BASEADDR |
| 1fe7e8fa | 46 | #undef FLASH |
| bcec8f49 SL |
47 | #define SPIFLASH |
| 48 | #undef RAMENV /* hold environment in flash */ | |
| 49 | #else | |
| 50 | #undef FLASH | |
| 51 | #undef SPIFLASH | |
| 1fe7e8fa SL |
52 | #define RAMENV /* hold environment in RAM */ |
| 53 | #endif | |
| bcec8f49 | 54 | #endif |
| 1fe7e8fa | 55 | |
| 76316a31 | 56 | /* uart */ |
| af7ae1a4 | 57 | #ifdef XILINX_UARTLITE_BASEADDR |
| 4aecfb16 MS |
58 | # define CONFIG_XILINX_UARTLITE |
| 59 | # define CONFIG_SERIAL_BASE XILINX_UARTLITE_BASEADDR | |
| 60 | # define CONFIG_BAUDRATE XILINX_UARTLITE_BAUDRATE | |
| 61 | # define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE } | |
| 62 | # define CONSOLE_ARG "console=console=ttyUL0,115200\0" | |
| e7d591e8 | 63 | #elif XILINX_UART16550_BASEADDR |
| 4aecfb16 MS |
64 | # define CONFIG_SYS_NS16550 1 |
| 65 | # define CONFIG_SYS_NS16550_SERIAL | |
| 1de55ef1 SL |
66 | # if defined(__MICROBLAZEEL__) |
| 67 | # define CONFIG_SYS_NS16550_REG_SIZE -4 | |
| 68 | # else | |
| 69 | # define CONFIG_SYS_NS16550_REG_SIZE 4 | |
| 70 | # endif | |
| 4aecfb16 MS |
71 | # define CONFIG_CONS_INDEX 1 |
| 72 | # define CONFIG_SYS_NS16550_COM1 \ | |
| 1de55ef1 | 73 | ((XILINX_UART16550_BASEADDR & ~0xF) + 0x1000) |
| 4aecfb16 MS |
74 | # define CONFIG_SYS_NS16550_CLK XILINX_UART16550_CLOCK_HZ |
| 75 | # define CONFIG_BAUDRATE 115200 | |
| 76 | ||
| 77 | /* The following table includes the supported baudrates */ | |
| 78 | # define CONFIG_SYS_BAUDRATE_TABLE \ | |
| 79 | {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} | |
| 80 | # define CONSOLE_ARG "console=console=ttyS0,115200\0" | |
| e7d591e8 | 81 | #else |
| 4aecfb16 | 82 | # error Undefined uart |
| af7ae1a4 | 83 | #endif |
| 76316a31 MS |
84 | |
| 85 | /* setting reset address */ | |
| 14d0a02a | 86 | /*#define CONFIG_SYS_RESET_ADDRESS CONFIG_SYS_TEXT_BASE*/ |
| 76316a31 | 87 | |
| 17980495 | 88 | /* ethernet */ |
| 1252df06 | 89 | #undef CONFIG_SYS_ENET |
| 8422a35e SL |
90 | #if defined(XILINX_EMACLITE_BASEADDR) |
| 91 | # define CONFIG_XILINX_EMACLITE 1 | |
| 4aecfb16 | 92 | # define CONFIG_SYS_ENET |
| 8422a35e SL |
93 | #endif |
| 94 | #if defined(XILINX_LLTEMAC_BASEADDR) | |
| 95 | # define CONFIG_XILINX_LL_TEMAC 1 | |
| 4aecfb16 | 96 | # define CONFIG_SYS_ENET |
| e5845e21 | 97 | #endif |
| e634138e MS |
98 | #if defined(XILINX_AXIEMAC_BASEADDR) |
| 99 | # define CONFIG_XILINX_AXIEMAC 1 | |
| 100 | # define CONFIG_SYS_ENET | |
| 101 | #endif | |
| 330e5545 | 102 | |
| e5845e21 | 103 | #undef ET_DEBUG |
| 17980495 | 104 | |
| 76316a31 | 105 | /* gpio */ |
| 4c6a6f02 | 106 | #ifdef XILINX_GPIO_BASEADDR |
| 4aecfb16 MS |
107 | # define CONFIG_SYS_GPIO_0 1 |
| 108 | # define CONFIG_SYS_GPIO_0_ADDR XILINX_GPIO_BASEADDR | |
| 4c6a6f02 | 109 | #endif |
| 76316a31 MS |
110 | |
| 111 | /* interrupt controller */ | |
| 4d49b280 | 112 | #ifdef XILINX_INTC_BASEADDR |
| 4aecfb16 MS |
113 | # define CONFIG_SYS_INTC_0_ADDR XILINX_INTC_BASEADDR |
| 114 | # define CONFIG_SYS_INTC_0_NUM XILINX_INTC_NUM_INTR_INPUTS | |
| 4d49b280 | 115 | #endif |
| 76316a31 MS |
116 | |
| 117 | /* timer */ | |
| bcbb046b | 118 | #if defined(XILINX_TIMER_BASEADDR) && defined(XILINX_TIMER_IRQ) |
| 4aecfb16 MS |
119 | # define CONFIG_SYS_TIMER_0_ADDR XILINX_TIMER_BASEADDR |
| 120 | # define CONFIG_SYS_TIMER_0_IRQ XILINX_TIMER_IRQ | |
| 4d49b280 | 121 | #endif |
| bcbb046b | 122 | |
| 76316a31 MS |
123 | /* |
| 124 | * memory layout - Example | |
| 8f371b18 | 125 | * CONFIG_SYS_TEXT_BASE = 0x1200_0000; defined in config.mk |
| 6d0f6bcf | 126 | * CONFIG_SYS_SRAM_BASE = 0x1000_0000; |
| 8f371b18 SL |
127 | * CONFIG_SYS_SRAM_SIZE = 0x0400_0000; 64MB |
| 128 | * | |
| 129 | * CONFIG_SYS_MONITOR_LEN = 0x40000 | |
| 130 | * CONFIG_SYS_MALLOC_LEN = 3 * CONFIG_SYS_MONITOR_LEN = 0xC0000 | |
| 76316a31 | 131 | * |
| 6d0f6bcf | 132 | * CONFIG_SYS_GBL_DATA_OFFSET = 0x1000_0000 + 0x0400_0000 - 0x1000 = 0x13FF_F000 |
| 8f371b18 SL |
133 | * CONFIG_SYS_MONITOR_BASE = 0x13FF_F000 - CONFIG_SYS_MONITOR_LEN = 0x13FB_F000 |
| 134 | * CONFIG_SYS_MALLOC_BASE = 0x13FB_F000 - CONFIG_SYS_MALLOC_LEN = 0x13EF_F000 | |
| 76316a31 | 135 | * |
| 6d0f6bcf | 136 | * 0x1000_0000 CONFIG_SYS_SDRAM_BASE |
| 8f371b18 | 137 | * MEMTEST_AREA 64kB |
| 76316a31 | 138 | * FREE |
| 14d0a02a | 139 | * 0x1200_0000 CONFIG_SYS_TEXT_BASE |
| 76316a31 MS |
140 | * U-BOOT code |
| 141 | * 0x1202_0000 | |
| 142 | * FREE | |
| 143 | * | |
| 144 | * STACK | |
| 8f371b18 SL |
145 | * 0x13EF_F000 CONFIG_SYS_MALLOC_BASE |
| 146 | * MALLOC_AREA 768kB Alloc | |
| 147 | * 0x13FB_F000 CONFIG_SYS_MONITOR_BASE | |
| 17980495 | 148 | * MONITOR_CODE 256kB Env |
| 6d0f6bcf | 149 | * 0x13FF_F000 CONFIG_SYS_GBL_DATA_OFFSET |
| 853643d8 | 150 | * GLOBAL_DATA 4kB bd, gd |
| 6d0f6bcf | 151 | * 0x1400_0000 CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE |
| 76316a31 MS |
152 | */ |
| 153 | ||
| 154 | /* ddr sdram - main memory */ | |
| 6d0f6bcf JCPV |
155 | #define CONFIG_SYS_SDRAM_BASE XILINX_RAM_START |
| 156 | #define CONFIG_SYS_SDRAM_SIZE XILINX_RAM_SIZE | |
| 157 | #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE | |
| 158 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x1000) | |
| 76316a31 MS |
159 | |
| 160 | /* global pointer */ | |
| 32556443 | 161 | /* start of global data */ |
| 4aecfb16 | 162 | #define CONFIG_SYS_GBL_DATA_OFFSET \ |
| 1020286e | 163 | (CONFIG_SYS_SDRAM_SIZE - GENERATED_GBL_DATA_SIZE) |
| 76316a31 MS |
164 | |
| 165 | /* monitor code */ | |
| 4aecfb16 | 166 | #define SIZE 0x40000 |
| 1020286e | 167 | #define CONFIG_SYS_MONITOR_LEN SIZE |
| 4aecfb16 | 168 | #define CONFIG_SYS_MONITOR_BASE \ |
| 1020286e MS |
169 | (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_GBL_DATA_OFFSET \ |
| 170 | - CONFIG_SYS_MONITOR_LEN - GENERATED_BD_INFO_SIZE) | |
| 4aecfb16 MS |
171 | #define CONFIG_SYS_MONITOR_END \ |
| 172 | (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) | |
| 7cfb13a7 | 173 | #define CONFIG_SYS_MALLOC_LEN (SIZE * 3) |
| 4aecfb16 MS |
174 | #define CONFIG_SYS_MALLOC_BASE \ |
| 175 | (CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN) | |
| 76316a31 MS |
176 | |
| 177 | /* stack */ | |
| 8fe7b29f | 178 | #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_MALLOC_BASE |
| 76316a31 | 179 | |
| 8f371b18 SL |
180 | /* |
| 181 | * CFI flash memory layout - Example | |
| 182 | * CONFIG_SYS_FLASH_BASE = 0x2200_0000; | |
| 183 | * CONFIG_SYS_FLASH_SIZE = 0x0080_0000; 8MB | |
| 184 | * | |
| 185 | * SECT_SIZE = 0x20000; 128kB is one sector | |
| 186 | * CONFIG_ENV_SIZE = SECT_SIZE; 128kB environment store | |
| 187 | * | |
| 188 | * 0x2200_0000 CONFIG_SYS_FLASH_BASE | |
| 189 | * FREE 256kB | |
| 190 | * 0x2204_0000 CONFIG_ENV_ADDR | |
| 191 | * ENV_AREA 128kB | |
| 192 | * 0x2206_0000 | |
| 193 | * FREE | |
| 194 | * 0x2280_0000 CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE | |
| 195 | * | |
| 196 | */ | |
| 197 | ||
| 76316a31 | 198 | #ifdef FLASH |
| 4aecfb16 MS |
199 | # define CONFIG_SYS_FLASH_BASE XILINX_FLASH_START |
| 200 | # define CONFIG_SYS_FLASH_SIZE XILINX_FLASH_SIZE | |
| 201 | # define CONFIG_SYS_FLASH_CFI 1 | |
| 202 | # define CONFIG_FLASH_CFI_DRIVER 1 | |
| 203 | /* ?empty sector */ | |
| 204 | # define CONFIG_SYS_FLASH_EMPTY_INFO 1 | |
| 205 | /* max number of memory banks */ | |
| 206 | # define CONFIG_SYS_MAX_FLASH_BANKS 1 | |
| 207 | /* max number of sectors on one chip */ | |
| 208 | # define CONFIG_SYS_MAX_FLASH_SECT 512 | |
| 209 | /* hardware flash protection */ | |
| 210 | # define CONFIG_SYS_FLASH_PROTECTION | |
| 211 | ||
| 212 | # ifdef RAMENV | |
| 213 | # define CONFIG_ENV_IS_NOWHERE 1 | |
| 214 | # define CONFIG_ENV_SIZE 0x1000 | |
| 215 | # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) | |
| 216 | ||
| bcec8f49 | 217 | # else /* FLASH && !RAMENV */ |
| 4aecfb16 MS |
218 | # define CONFIG_ENV_IS_IN_FLASH 1 |
| 219 | /* 128K(one sector) for env */ | |
| 220 | # define CONFIG_ENV_SECT_SIZE 0x20000 | |
| 221 | # define CONFIG_ENV_ADDR \ | |
| 222 | (CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE)) | |
| 223 | # define CONFIG_ENV_SIZE 0x20000 | |
| bcec8f49 | 224 | # endif /* FLASH && !RAMBOOT */ |
| 76316a31 | 225 | #else /* !FLASH */ |
| bcec8f49 SL |
226 | |
| 227 | #ifdef SPIFLASH | |
| 228 | # define CONFIG_SYS_NO_FLASH 1 | |
| 229 | # define CONFIG_SYS_SPI_BASE XILINX_SPI_FLASH_BASEADDR | |
| 230 | # define CONFIG_XILINX_SPI 1 | |
| 231 | # define CONFIG_SPI 1 | |
| 232 | # define CONFIG_SPI_FLASH 1 | |
| 233 | # define CONFIG_SPI_FLASH_STMICRO 1 | |
| 234 | # define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 | |
| 235 | # define CONFIG_SF_DEFAULT_SPEED XILINX_SPI_FLASH_MAX_FREQ | |
| 236 | # define CONFIG_SF_DEFAULT_CS XILINX_SPI_FLASH_CS | |
| 237 | ||
| 238 | # ifdef RAMENV | |
| 239 | # define CONFIG_ENV_IS_NOWHERE 1 | |
| 240 | # define CONFIG_ENV_SIZE 0x1000 | |
| 241 | # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) | |
| 242 | ||
| 243 | # else /* SPIFLASH && !RAMENV */ | |
| 244 | # define CONFIG_ENV_IS_IN_SPI_FLASH 1 | |
| 245 | # define CONFIG_ENV_SPI_MODE SPI_MODE_3 | |
| 246 | # define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED | |
| 247 | # define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS | |
| 248 | /* 128K(two sectors) for env */ | |
| 249 | # define CONFIG_ENV_SECT_SIZE 0x10000 | |
| 250 | # define CONFIG_ENV_SIZE (2 * CONFIG_ENV_SECT_SIZE) | |
| 251 | /* Warning: adjust the offset in respect of other flash content and size */ | |
| 252 | # define CONFIG_ENV_OFFSET (128 * CONFIG_ENV_SECT_SIZE) /* at 8MB */ | |
| 253 | # endif /* SPIFLASH && !RAMBOOT */ | |
| 254 | #else /* !SPIFLASH */ | |
| 255 | ||
| 4aecfb16 MS |
256 | /* ENV in RAM */ |
| 257 | # define CONFIG_SYS_NO_FLASH 1 | |
| 258 | # define CONFIG_ENV_IS_NOWHERE 1 | |
| 259 | # define CONFIG_ENV_SIZE 0x1000 | |
| 260 | # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) | |
| bcec8f49 | 261 | #endif /* !SPIFLASH */ |
| 76316a31 MS |
262 | #endif /* !FLASH */ |
| 263 | ||
| 853643d8 MS |
264 | /* system ace */ |
| 265 | #ifdef XILINX_SYSACE_BASEADDR | |
| 4aecfb16 MS |
266 | # define CONFIG_SYSTEMACE |
| 267 | /* #define DEBUG_SYSTEMACE */ | |
| 268 | # define SYSTEMACE_CONFIG_FPGA | |
| 269 | # define CONFIG_SYS_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR | |
| 270 | # define CONFIG_SYS_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH | |
| 271 | # define CONFIG_DOS_PARTITION | |
| 853643d8 MS |
272 | #endif |
| 273 | ||
| e9b737de | 274 | #if defined(XILINX_USE_ICACHE) |
| 4aecfb16 | 275 | # define CONFIG_ICACHE |
| e9b737de | 276 | #else |
| 4aecfb16 | 277 | # undef CONFIG_ICACHE |
| e9b737de MS |
278 | #endif |
| 279 | ||
| 280 | #if defined(XILINX_USE_DCACHE) | |
| 4aecfb16 | 281 | # define CONFIG_DCACHE |
| e9b737de | 282 | #else |
| 4aecfb16 | 283 | # undef CONFIG_DCACHE |
| e9b737de MS |
284 | #endif |
| 285 | ||
| 5811830f MS |
286 | #ifndef XILINX_DCACHE_BYTE_SIZE |
| 287 | #define XILINX_DCACHE_BYTE_SIZE 32768 | |
| 288 | #endif | |
| 289 | ||
| 079a136c JL |
290 | /* |
| 291 | * BOOTP options | |
| 292 | */ | |
| 293 | #define CONFIG_BOOTP_BOOTFILESIZE | |
| 294 | #define CONFIG_BOOTP_BOOTPATH | |
| 295 | #define CONFIG_BOOTP_GATEWAY | |
| 296 | #define CONFIG_BOOTP_HOSTNAME | |
| 76316a31 | 297 | |
| 5dc11a51 JL |
298 | /* |
| 299 | * Command line configuration. | |
| 300 | */ | |
| 301 | #include <config_cmd_default.h> | |
| 302 | ||
| 303 | #define CONFIG_CMD_ASKENV | |
| 5dc11a51 | 304 | #define CONFIG_CMD_IRQ |
| 5dc11a51 | 305 | #define CONFIG_CMD_MFSL |
| 330e5545 | 306 | #define CONFIG_CMD_ECHO |
| 4d49b280 | 307 | |
| e9b737de | 308 | #if defined(CONFIG_DCACHE) || defined(CONFIG_ICACHE) |
| 4aecfb16 | 309 | # define CONFIG_CMD_CACHE |
| e9b737de | 310 | #else |
| 4aecfb16 | 311 | # undef CONFIG_CMD_CACHE |
| e9b737de MS |
312 | #endif |
| 313 | ||
| 6d0f6bcf | 314 | #ifndef CONFIG_SYS_ENET |
| 4aecfb16 | 315 | # undef CONFIG_CMD_NET |
| 1252df06 | 316 | # undef CONFIG_CMD_NFS |
| 4d49b280 | 317 | #else |
| 4aecfb16 MS |
318 | # define CONFIG_CMD_PING |
| 319 | # define CONFIG_CMD_DHCP | |
| 4eb29cf0 | 320 | # define CONFIG_CMD_TFTPPUT |
| 4d49b280 | 321 | #endif |
| 853643d8 MS |
322 | |
| 323 | #if defined(CONFIG_SYSTEMACE) | |
| 4aecfb16 MS |
324 | # define CONFIG_CMD_EXT2 |
| 325 | # define CONFIG_CMD_FAT | |
| 853643d8 | 326 | #endif |
| 5dc11a51 JL |
327 | |
| 328 | #if defined(FLASH) | |
| 4aecfb16 MS |
329 | # define CONFIG_CMD_ECHO |
| 330 | # define CONFIG_CMD_FLASH | |
| 331 | # define CONFIG_CMD_IMLS | |
| 332 | # define CONFIG_CMD_JFFS2 | |
| 7cfb13a7 SL |
333 | # define CONFIG_CMD_UBI |
| 334 | # undef CONFIG_CMD_UBIFS | |
| 4aecfb16 | 335 | |
| bcec8f49 SL |
336 | # if !defined(RAMENV) |
| 337 | # define CONFIG_CMD_SAVEENV | |
| 338 | # define CONFIG_CMD_SAVES | |
| 339 | # endif | |
| 340 | ||
| 341 | #else | |
| 342 | #if defined(SPIFLASH) | |
| 343 | # define CONFIG_CMD_SF | |
| 344 | ||
| 4aecfb16 MS |
345 | # if !defined(RAMENV) |
| 346 | # define CONFIG_CMD_SAVEENV | |
| 347 | # define CONFIG_CMD_SAVES | |
| 348 | # endif | |
| 853643d8 | 349 | #else |
| 4aecfb16 MS |
350 | # undef CONFIG_CMD_IMLS |
| 351 | # undef CONFIG_CMD_FLASH | |
| 352 | # undef CONFIG_CMD_JFFS2 | |
| 2cce2d32 SL |
353 | # undef CONFIG_CMD_UBI |
| 354 | # undef CONFIG_CMD_UBIFS | |
| 5dc11a51 | 355 | #endif |
| bcec8f49 | 356 | #endif |
| 76316a31 | 357 | |
| 5dc11a51 | 358 | #if defined(CONFIG_CMD_JFFS2) |
| 7cfb13a7 SL |
359 | # define CONFIG_MTD_PARTITIONS |
| 360 | #endif | |
| 361 | ||
| 362 | #if defined(CONFIG_CMD_UBIFS) | |
| 363 | # define CONFIG_CMD_UBI | |
| 364 | # define CONFIG_LZO | |
| 365 | #endif | |
| 366 | ||
| 367 | #if defined(CONFIG_CMD_UBI) | |
| 368 | # define CONFIG_MTD_PARTITIONS | |
| 369 | # define CONFIG_RBTREE | |
| 370 | #endif | |
| 371 | ||
| 372 | #if defined(CONFIG_MTD_PARTITIONS) | |
| 373 | /* MTD partitions */ | |
| 68d7d651 | 374 | #define CONFIG_CMD_MTDPARTS /* mtdparts command line support */ |
| 942556a9 SR |
375 | #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ |
| 376 | #define CONFIG_FLASH_CFI_MTD | |
| c82a541d | 377 | #define MTDIDS_DEFAULT "nor0=flash-0" |
| 144876a3 MS |
378 | |
| 379 | /* default mtd partition table */ | |
| c82a541d | 380 | #define MTDPARTS_DEFAULT "mtdparts=flash-0:256k(u-boot),"\ |
| 144876a3 MS |
381 | "256k(env),3m(kernel),1m(romfs),"\ |
| 382 | "1m(cramfs),-(jffs2)" | |
| 383 | #endif | |
| 384 | ||
| 76316a31 | 385 | /* Miscellaneous configurable options */ |
| 6d0f6bcf | 386 | #define CONFIG_SYS_PROMPT "U-Boot-mONStR> " |
| 4aecfb16 MS |
387 | /* size of console buffer */ |
| 388 | #define CONFIG_SYS_CBSIZE 512 | |
| 389 | /* print buffer size */ | |
| 390 | #define CONFIG_SYS_PBSIZE \ | |
| 391 | (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) | |
| 392 | /* max number of command args */ | |
| 393 | #define CONFIG_SYS_MAXARGS 15 | |
| 6d0f6bcf | 394 | #define CONFIG_SYS_LONGHELP |
| 4aecfb16 MS |
395 | /* default load address */ |
| 396 | #define CONFIG_SYS_LOAD_ADDR XILINX_RAM_START | |
| 76316a31 | 397 | |
| 330e5545 | 398 | #define CONFIG_BOOTDELAY -1 /* -1 disables auto-boot */ |
| 76316a31 | 399 | #define CONFIG_BOOTARGS "root=romfs" |
| 330e5545 | 400 | #define CONFIG_HOSTNAME XILINX_BOARD_NAME |
| 853643d8 | 401 | #define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm" |
| 76316a31 | 402 | #define CONFIG_IPADDR 192.168.0.3 |
| 853643d8 MS |
403 | #define CONFIG_SERVERIP 192.168.0.5 |
| 404 | #define CONFIG_GATEWAYIP 192.168.0.1 | |
| 76316a31 MS |
405 | #define CONFIG_ETHADDR 00:E0:0C:00:00:FD |
| 406 | ||
| 407 | /* architecture dependent code */ | |
| 6d0f6bcf JCPV |
408 | #define CONFIG_SYS_USR_EXCEP /* user exception */ |
| 409 | #define CONFIG_SYS_HZ 1000 | |
| 76316a31 | 410 | |
| 0900bee9 | 411 | #define CONFIG_PREBOOT "echo U-BOOT for ${hostname};setenv preboot;echo" |
| 144876a3 | 412 | |
| 4aecfb16 | 413 | #define CONFIG_EXTRA_ENV_SETTINGS "unlock=yes\0" \ |
| c82a541d SL |
414 | "nor0=flash-0\0"\ |
| 415 | "mtdparts=mtdparts=flash-0:"\ | |
| 144876a3 | 416 | "256k(u-boot),256k(env),3m(kernel),"\ |
| 78376452 MS |
417 | "1m(romfs),1m(cramfs),-(jffs2)\0"\ |
| 418 | "nc=setenv stdout nc;"\ | |
| 419 | "setenv stdin nc\0" \ | |
| 420 | "serial=setenv stdout serial;"\ | |
| 421 | "setenv stdin serial\0" | |
| 144876a3 | 422 | |
| 188dc16b | 423 | #define CONFIG_CMDLINE_EDITING |
| 188dc16b | 424 | |
| 78376452 MS |
425 | #define CONFIG_NETCONSOLE |
| 426 | #define CONFIG_SYS_CONSOLE_IS_IN_ENV | |
| 427 | ||
| 0900bee9 MS |
428 | /* Use the HUSH parser */ |
| 429 | #define CONFIG_SYS_HUSH_PARSER | |
| 0900bee9 | 430 | |
| 37e892d9 MS |
431 | /* Enable flat device tree support */ |
| 432 | #define CONFIG_LMB 1 | |
| 433 | #define CONFIG_FIT 1 | |
| 434 | #define CONFIG_OF_LIBFDT 1 | |
| 435 | ||
| 8422a35e | 436 | #if defined(CONFIG_XILINX_LL_TEMAC) || defined(CONFIG_XILINX_AXIEMAC) |
| f5e5e1ff SL |
437 | # define CONFIG_MII 1 |
| 438 | # define CONFIG_CMD_MII 1 | |
| 439 | # define CONFIG_PHY_GIGE 1 | |
| 440 | # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 1 | |
| 441 | # define CONFIG_PHYLIB 1 | |
| 442 | # define CONFIG_PHY_ATHEROS 1 | |
| 443 | # define CONFIG_PHY_BROADCOM 1 | |
| 444 | # define CONFIG_PHY_DAVICOM 1 | |
| 445 | # define CONFIG_PHY_LXT 1 | |
| 446 | # define CONFIG_PHY_MARVELL 1 | |
| 447 | # define CONFIG_PHY_MICREL 1 | |
| 448 | # define CONFIG_PHY_NATSEMI 1 | |
| 449 | # define CONFIG_PHY_REALTEK 1 | |
| 450 | # define CONFIG_PHY_VITESSE 1 | |
| 451 | #else | |
| 452 | # undef CONFIG_MII | |
| 453 | # undef CONFIG_CMD_MII | |
| 454 | # undef CONFIG_PHYLIB | |
| 455 | #endif | |
| 456 | ||
| 76316a31 | 457 | #endif /* __CONFIG_H */ |