[people/ms/u-boot.git] / include / configs / minnowmax.h

/*
 * Copyright (C) 2015 Google, Inc
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

/*
 * board/config.h - configuration options, board specific
 */

#ifndef __CONFIG_H
#define __CONFIG_H

#include <configs/x86-common.h>

#define CONFIG_SYS_MONITOR_LEN		(1 << 20)
#define CONFIG_ARCH_EARLY_INIT_R
#define CONFIG_ARCH_MISC_INIT

#define CONFIG_SMSC_LPC47M

#define CONFIG_SYS_EARLY_PCI_INIT
#define CONFIG_PCI_PNP
#define CONFIG_RTL8169
#define CONFIG_STD_DEVICES_SETTINGS     "stdin=usbkbd,vga,serial\0" \
					"stdout=vga,serial\0" \
					"stderr=vga,serial\0"

#define CONFIG_SCSI_DEV_LIST		\
	{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA}, \
	{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA_ALT}

#define CONFIG_SPI_FLASH_STMICRO

#define CONFIG_MMC
#define CONFIG_SDHCI
#define CONFIG_GENERIC_MMC
#define CONFIG_MMC_SDMA
#define CONFIG_CMD_MMC

#undef CONFIG_USB_MAX_CONTROLLER_COUNT
#define CONFIG_USB_MAX_CONTROLLER_COUNT		1

#define VIDEO_IO_OFFSET				0
#define CONFIG_X86EMU_RAW_IO
#define CONFIG_VGA_AS_SINGLE_DEVICE

#define CONFIG_FIT_SIGNATURE
#define CONFIG_RSA

#define CONFIG_ENV_SECT_SIZE		0x1000
#define CONFIG_ENV_OFFSET		0x007fe000

#endif	/* __CONFIG_H */
Commit	Line	Data
3a1a18ff SG	1	/*
	2	* Copyright (C) 2015 Google, Inc
	3	*
	4	* SPDX-License-Identifier: GPL-2.0+
	5	*/
	6
	7	/*
	8	* board/config.h - configuration options, board specific
	9	*/
	10
	11	#ifndef __CONFIG_H
	12	#define __CONFIG_H
	13
	14	#include <configs/x86-common.h>
	15
	16	#define CONFIG_SYS_MONITOR_LEN (1 << 20)
5d3c2c54	17	#define CONFIG_ARCH_EARLY_INIT_R
ef910819	18	#define CONFIG_ARCH_MISC_INIT
3a1a18ff	19
dcfe4a54	20	#define CONFIG_SMSC_LPC47M
3a1a18ff	21
3a1a18ff SG	22	#define CONFIG_SYS_EARLY_PCI_INIT
	23	#define CONFIG_PCI_PNP
	24	#define CONFIG_RTL8169
	25	#define CONFIG_STD_DEVICES_SETTINGS "stdin=usbkbd,vga,serial\0" \
	26	"stdout=vga,serial\0" \
	27	"stderr=vga,serial\0"
	28
44a8b96f BM	29	#define CONFIG_SCSI_DEV_LIST \
	30	{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA}, \
	31	{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA_ALT}
	32
8ddb8cfb	33	#define CONFIG_SPI_FLASH_STMICRO
3a1a18ff SG	34
	35	#define CONFIG_MMC
	36	#define CONFIG_SDHCI
	37	#define CONFIG_GENERIC_MMC
	38	#define CONFIG_MMC_SDMA
	39	#define CONFIG_CMD_MMC
	40
	41	#undef CONFIG_USB_MAX_CONTROLLER_COUNT
	42	#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
	43
3a1a18ff SG	44	#define VIDEO_IO_OFFSET 0
	45	#define CONFIG_X86EMU_RAW_IO
	46	#define CONFIG_VGA_AS_SINGLE_DEVICE
	47
	48	#define CONFIG_FIT_SIGNATURE
	49	#define CONFIG_RSA
	50
d5359f2e SG	51	#define CONFIG_ENV_SECT_SIZE 0x1000
d5359f2e SG	52	#define CONFIG_ENV_OFFSET 0x007fe000
d21d05f1	53
3a1a18ff	54	#endif /* __CONFIG_H */