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stm32f4: add serial print port
[people/ms/u-boot.git] / include / configs / ms7720se.h
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1/*
2 * Configuation settings for the Hitachi Solution Engine 7720
3 *
4 * Copyright (C) 2007 Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
5 *
1a459660 6 * SPDX-License-Identifier: GPL-2.0+
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7 */
8
9#ifndef __MS7720SE_H
10#define __MS7720SE_H
11
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12#define CONFIG_CPU_SH7720 1
13#define CONFIG_MS7720SE 1
14
15#define CONFIG_CMD_FLASH
bdab39d3 16#define CONFIG_CMD_SAVEENV
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17#define CONFIG_CMD_SDRAM
18#define CONFIG_CMD_MEMORY
19#define CONFIG_CMD_CACHE
20#define CONFIG_CMD_PCMCIA
21#define CONFIG_CMD_IDE
22#define CONFIG_CMD_EXT2
23
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24#define CONFIG_BAUDRATE 115200
25#define CONFIG_BOOTARGS "console=ttySC0,115200"
b3f44c21 26#define CONFIG_BOOTFILE "/boot/zImage"
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27#define CONFIG_LOADADDR 0x8E000000
28
29#define CONFIG_VERSION_VARIABLE
30#undef CONFIG_SHOW_BOOT_PROGRESS
31
32/* MEMORY */
33#define MS7720SE_SDRAM_BASE 0x8C000000
34#define MS7720SE_FLASH_BASE_1 0xA0000000
35#define MS7720SE_FLASH_BANK_SIZE (8 * 1024 * 1024)
36
46198754 37#define CONFIG_SYS_TEXT_BASE 0x8FFC0000
6d0f6bcf 38#define CONFIG_SYS_LONGHELP /* undef to save memory */
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39#define CONFIG_SYS_CBSIZE 256 /* Buffer size for input from the Console */
40#define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */
41#define CONFIG_SYS_MAXARGS 16 /* max args accepted for monitor commands */
b2b5e2bb 42/* Buffer size for Boot Arguments passed to kernel */
6d0f6bcf 43#define CONFIG_SYS_BARGSIZE 512
b2b5e2bb 44/* List of legal baudrate settings for this board */
6d0f6bcf 45#define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
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46
47/* SCIF */
6c58a030 48#define CONFIG_SCIF_CONSOLE 1
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49#define CONFIG_CONS_SCIF0 1
50
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51#define CONFIG_SYS_MEMTEST_START MS7720SE_SDRAM_BASE
52#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024))
b2b5e2bb 53
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54#define CONFIG_SYS_SDRAM_BASE MS7720SE_SDRAM_BASE
55#define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024)
b2b5e2bb 56
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57#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 32 * 1024 * 1024)
58#define CONFIG_SYS_MONITOR_BASE MS7720SE_FLASH_BASE_1
59#define CONFIG_SYS_MONITOR_LEN (128 * 1024)
60#define CONFIG_SYS_MALLOC_LEN (256 * 1024)
6d0f6bcf 61#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
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62
63
64/* FLASH */
6d0f6bcf 65#define CONFIG_SYS_FLASH_CFI
00b1883a 66#define CONFIG_FLASH_CFI_DRIVER
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67#undef CONFIG_SYS_FLASH_QUIET_TEST
68#define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
b2b5e2bb 69
6d0f6bcf 70#define CONFIG_SYS_FLASH_BASE MS7720SE_FLASH_BASE_1
b2b5e2bb 71
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72#define CONFIG_SYS_MAX_FLASH_SECT 150
73#define CONFIG_SYS_MAX_FLASH_BANKS 1
74#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
b2b5e2bb 75
5a1aceb0 76#define CONFIG_ENV_IS_IN_FLASH
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77#define CONFIG_ENV_SECT_SIZE (64 * 1024)
78#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
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79#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
80#define CONFIG_SYS_FLASH_ERASE_TOUT 120000
81#define CONFIG_SYS_FLASH_WRITE_TOUT 500
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82
83/* Board Clock */
84#define CONFIG_SYS_CLK_FREQ 33333333
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85#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
86#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
be45c632 87#define CONFIG_SYS_TMU_CLK_DIV 4 /* 4 (default), 16, 64, 256 or 1024 */
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88
89/* PCMCIA */
90#define CONFIG_IDE_PCMCIA 1
91#define CONFIG_MARUBUN_PCCARD 1
92#define CONFIG_PCMCIA_SLOT_A 1
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93#define CONFIG_SYS_IDE_MAXDEVICE 1
94#define CONFIG_SYS_MARUBUN_MRSHPC 0xb83fffe0
95#define CONFIG_SYS_MARUBUN_MW1 0xb8400000
96#define CONFIG_SYS_MARUBUN_MW2 0xb8500000
97#define CONFIG_SYS_MARUBUN_IO 0xb8600000
98
99#define CONFIG_SYS_PIO_MODE 1
100#define CONFIG_SYS_IDE_MAXBUS 1
b2b5e2bb 101#define CONFIG_DOS_PARTITION 1
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102#define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_MARUBUN_IO /* base address */
103#define CONFIG_SYS_ATA_IDE0_OFFSET 0x01F0 /* ide0 offste */
104#define CONFIG_SYS_ATA_DATA_OFFSET 0 /* data reg offset */
105#define CONFIG_SYS_ATA_REG_OFFSET 0 /* reg offset */
106#define CONFIG_SYS_ATA_ALT_OFFSET 0x200 /* alternate register offset */
f2a37fcd 107#define CONFIG_IDE_SWAP_IO
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108
109#endif /* __MS7720SE_H */