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54e999a3 PW |
1 | /* |
2 | * (C) Copyright 2010 | |
3 | * Marvell Semiconductor <www.marvell.com> | |
4 | * Written-by: Prafulla Wadaskar <prafulla@marvell.com> | |
5 | * | |
1a459660 | 6 | * SPDX-License-Identifier: GPL-2.0+ |
54e999a3 PW |
7 | */ |
8 | ||
9 | /* | |
10 | * This file contains Marvell Board Specific common defincations. | |
11 | * This file should be included in board config header file. | |
12 | * | |
13 | * It supports common definations for Kirkwood platform | |
14 | * TBD: support for Orion5X platforms | |
15 | */ | |
16 | ||
17 | #ifndef _MV_COMMON_H | |
18 | #define _MV_COMMON_H | |
19 | ||
20 | /* | |
21 | * High Level Configuration Options (easy to change) | |
22 | */ | |
23 | #define CONFIG_MARVELL 1 | |
54e999a3 | 24 | |
8e14ed85 PW |
25 | /* |
26 | * Custom CONFIG_SYS_TEXT_BASE can be done in <board>.h | |
27 | */ | |
28 | #ifndef CONFIG_SYS_TEXT_BASE | |
29 | #define CONFIG_SYS_TEXT_BASE 0x00600000 | |
30 | #endif /* CONFIG_SYS_TEXT_BASE */ | |
31 | ||
0b20ed76 | 32 | /* additions for new ARM relocation support */ |
8e14ed85 | 33 | #define CONFIG_SYS_SDRAM_BASE 0x00000000 |
0b20ed76 | 34 | |
54e999a3 PW |
35 | /* |
36 | * CLKs configurations | |
37 | */ | |
54e999a3 PW |
38 | |
39 | /* | |
40 | * NS16550 Configuration | |
41 | */ | |
54e999a3 | 42 | #define CONFIG_SYS_NS16550_SERIAL |
54e999a3 | 43 | #define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK |
1d51ea19 SR |
44 | #if !defined(CONFIG_DM_SERIAL) |
45 | #define CONFIG_SYS_NS16550_REG_SIZE (-4) | |
8e14ed85 | 46 | #define CONFIG_SYS_NS16550_COM1 MV_UART_CONSOLE_BASE |
1d51ea19 | 47 | #endif |
54e999a3 PW |
48 | |
49 | /* | |
50 | * Serial Port configuration | |
51 | * The following definitions let you select what serial you want to use | |
52 | * for your console driver. | |
53 | */ | |
54 | ||
55 | #define CONFIG_CONS_INDEX 1 /*Console on UART0 */ | |
54e999a3 PW |
56 | #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \ |
57 | 115200,230400, 460800, 921600 } | |
58 | /* auto boot */ | |
b81d0ea7 | 59 | #define CONFIG_PREBOOT |
54e999a3 PW |
60 | |
61 | /* | |
62 | * For booting Linux, the board info and command line data | |
63 | * have to be in the first 8 MB of memory, since this is | |
64 | * the maximum mapped by the Linux kernel during initialization. | |
65 | */ | |
66 | #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ | |
67 | #define CONFIG_INITRD_TAG 1 /* enable INITRD tag */ | |
68 | #define CONFIG_SETUP_MEMORY_TAGS 1 /* enable memory tag */ | |
69 | ||
54e999a3 | 70 | #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buff Size */ |
54e999a3 | 71 | |
54e999a3 PW |
72 | /* |
73 | * Size of malloc() pool | |
74 | */ | |
bfbfab94 | 75 | #define CONFIG_SYS_MALLOC_LEN (1024 * 1024 * 4) /* 4MiB for malloc() */ |
54e999a3 PW |
76 | |
77 | /* | |
78 | * Other required minimal configurations | |
79 | */ | |
80 | #define CONFIG_SYS_LONGHELP | |
81 | #define CONFIG_AUTO_COMPLETE | |
82 | #define CONFIG_CMDLINE_EDITING | |
54e999a3 | 83 | #define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */ |
54e999a3 | 84 | #define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */ |
8e14ed85 PW |
85 | #define CONFIG_SYS_MEMTEST_START 0x00800000 /* 8M */ |
86 | #define CONFIG_SYS_MEMTEST_END 0x00ffffff /*(_16M -1) */ | |
54e999a3 | 87 | #define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */ |
5a9749ee | 88 | #define CONFIG_SYS_MAXARGS 32 /* max number of command args */ |
54e999a3 | 89 | |
2f795ac7 SG |
90 | /* ====> Include platform Common Definitions */ |
91 | #include <asm/arch/config.h> | |
92 | ||
8e14ed85 PW |
93 | /* |
94 | * DRAM Banks configuration, Custom config can be done in <board>.h | |
95 | */ | |
96 | #ifndef CONFIG_NR_DRAM_BANKS | |
97 | #define CONFIG_NR_DRAM_BANKS CONFIG_NR_DRAM_BANKS_MAX | |
98 | #else | |
99 | #if (CONFIG_NR_DRAM_BANKS > CONFIG_NR_DRAM_BANKS_MAX) | |
100 | #error CONFIG_NR_DRAM_BANKS Configurated more than available | |
101 | #endif | |
102 | #endif /* CONFIG_NR_DRAM_BANKS */ | |
103 | ||
2f795ac7 | 104 | /* ====> Include driver Common Definitions */ |
54e999a3 | 105 | /* |
cf946c6d | 106 | * Common NAND configuration |
54e999a3 | 107 | */ |
cf946c6d LW |
108 | #ifdef CONFIG_CMD_NAND |
109 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 | |
cf946c6d LW |
110 | #endif |
111 | ||
112 | /* | |
113 | * Common SPI Flash configuration | |
114 | */ | |
115 | #ifdef CONFIG_CMD_SF | |
cf946c6d | 116 | #endif |
54e999a3 PW |
117 | |
118 | /* | |
cf946c6d | 119 | * Common USB/EHCI configuration |
54e999a3 | 120 | */ |
a79c8408 | 121 | #if defined(CONFIG_CMD_USB) && !defined(CONFIG_DM) |
54e999a3 PW |
122 | #define CONFIG_SUPPORT_VFAT |
123 | #endif /* CONFIG_CMD_USB */ | |
124 | ||
54e999a3 PW |
125 | /* |
126 | * File system | |
127 | */ | |
cf946c6d | 128 | #ifdef CONFIG_SYS_MVFS |
54e999a3 PW |
129 | #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ |
130 | #define CONFIG_MTD_PARTITIONS | |
cf946c6d | 131 | #endif |
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132 | |
133 | #endif /* _MV_COMMON_H */ |