projects / thirdparty / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 83d290c5 | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| 54e999a3 PW |
2 | /* |
| 3 | * (C) Copyright 2010 | |
| 4 | * Marvell Semiconductor <www.marvell.com> | |
| 5 | * Written-by: Prafulla Wadaskar <prafulla@marvell.com> | |
| 54e999a3 PW |
6 | */ |
| 7 | ||
| 8 | /* | |
| 9 | * This file contains Marvell Board Specific common defincations. | |
| 10 | * This file should be included in board config header file. | |
| 11 | * | |
| 12 | * It supports common definations for Kirkwood platform | |
| 13 | * TBD: support for Orion5X platforms | |
| 14 | */ | |
| 15 | ||
| 16 | #ifndef _MV_COMMON_H | |
| 17 | #define _MV_COMMON_H | |
| 18 | ||
| 1af3c7f4 SG |
19 | #include <linux/stringify.h> |
| 20 | ||
| 54e999a3 PW |
21 | /* |
| 22 | * High Level Configuration Options (easy to change) | |
| 23 | */ | |
| 54e999a3 | 24 | |
| 8e14ed85 PW |
25 | /* |
| 26 | * Custom CONFIG_SYS_TEXT_BASE can be done in <board>.h | |
| 27 | */ | |
| 8e14ed85 | 28 | |
| 0b20ed76 | 29 | /* additions for new ARM relocation support */ |
| 8e14ed85 | 30 | #define CONFIG_SYS_SDRAM_BASE 0x00000000 |
| 0b20ed76 | 31 | |
| 54e999a3 PW |
32 | /* |
| 33 | * NS16550 Configuration | |
| 34 | */ | |
| 54e999a3 | 35 | #define CONFIG_SYS_NS16550_SERIAL |
| 54e999a3 | 36 | #define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK |
| 1d51ea19 SR |
37 | #if !defined(CONFIG_DM_SERIAL) |
| 38 | #define CONFIG_SYS_NS16550_REG_SIZE (-4) | |
| 8e14ed85 | 39 | #define CONFIG_SYS_NS16550_COM1 MV_UART_CONSOLE_BASE |
| 1d51ea19 | 40 | #endif |
| 54e999a3 | 41 | |
| 54e999a3 | 42 | /* auto boot */ |
| 54e999a3 PW |
43 | |
| 44 | /* | |
| 45 | * For booting Linux, the board info and command line data | |
| 46 | * have to be in the first 8 MB of memory, since this is | |
| 47 | * the maximum mapped by the Linux kernel during initialization. | |
| 48 | */ | |
| 49 | #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ | |
| 50 | #define CONFIG_INITRD_TAG 1 /* enable INITRD tag */ | |
| 51 | #define CONFIG_SETUP_MEMORY_TAGS 1 /* enable memory tag */ | |
| 52 | ||
| 54e999a3 | 53 | #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buff Size */ |
| 54e999a3 | 54 | |
| 54e999a3 PW |
55 | /* |
| 56 | * Size of malloc() pool | |
| 57 | */ | |
| bfbfab94 | 58 | #define CONFIG_SYS_MALLOC_LEN (1024 * 1024 * 4) /* 4MiB for malloc() */ |
| 54e999a3 PW |
59 | |
| 60 | /* | |
| 61 | * Other required minimal configurations | |
| 62 | */ | |
| 54e999a3 | 63 | #define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */ |
| 54e999a3 | 64 | #define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */ |
| 5a9749ee | 65 | #define CONFIG_SYS_MAXARGS 32 /* max number of command args */ |
| 54e999a3 | 66 | |
| 2f795ac7 SG |
67 | /* ====> Include platform Common Definitions */ |
| 68 | #include <asm/arch/config.h> | |
| 69 | ||
| 2f795ac7 | 70 | /* ====> Include driver Common Definitions */ |
| 54e999a3 | 71 | /* |
| cf946c6d | 72 | * Common NAND configuration |
| 54e999a3 | 73 | */ |
| cf946c6d LW |
74 | #ifdef CONFIG_CMD_NAND |
| 75 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 | |
| cf946c6d LW |
76 | #endif |
| 77 | ||
| 54e999a3 | 78 | #endif /* _MV_COMMON_H */ |