[thirdparty/u-boot.git] / include / configs / mv-common.h

/*
 * (C) Copyright 2010
 * Marvell Semiconductor <www.marvell.com>
 * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
 * MA 02110-1301 USA
 */

/*
 * This file contains Marvell Board Specific common defincations.
 * This file should be included in board config header file.
 *
 * It supports common definations for Kirkwood platform
 * TBD: support for Orion5X platforms
 */

#ifndef _MV_COMMON_H
#define _MV_COMMON_H

/*
 * High Level Configuration Options (easy to change)
 */
#define CONFIG_MARVELL		1
#define CONFIG_ARM926EJS	1	/* Basic Architecture */

#if defined(CONFIG_KIRKWOOD)
#define CONFIG_MD5	/* get_random_hex on krikwood needs MD5 support */
#define CONFIG_KIRKWOOD_EGIGA_INIT	/* Enable GbePort0/1 for kernel */
#define CONFIG_KIRKWOOD_RGMII_PAD_1V8	/* Set RGMII Pad voltage to 1.8V */
#define CONFIG_KIRKWOOD_PCIE_INIT       /* Enable PCIE Port0 for kernel */

/* 
 * By default kwbimage.cfg from board specific folder is used
 * If for some board, different configuration file need to be used,
 * CONFIG_SYS_KWD_CONFIG should be defined in board specific header file
 */
#ifndef CONFIG_SYS_KWD_CONFIG
#define	CONFIG_SYS_KWD_CONFIG	$(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage.cfg 
#endif /* CONFIG_SYS_KWD_CONFIG */

/* 
 * CONFIG_SYS_TEXT_BASE can be defined in board specific header file, if needed
 */
#ifndef CONFIG_SYS_TEXT_BASE
#define	CONFIG_SYS_TEXT_BASE	0x00600000
#endif /* CONFIG_SYS_TEXT_BASE */

#define CONFIG_I2C_MVTWSI_BASE	KW_TWSI_BASE
#define MV_UART0_BASE		KW_UART0_BASE
#define MV_SATA_BASE		KW_SATA_BASE
#define MV_SATA_PORT0_OFFSET	KW_SATA_PORT0_OFFSET
#define MV_SATA_PORT1_OFFSET	KW_SATA_PORT1_OFFSET

#else
#error "Unsupported SoC"
#endif

/* additions for new ARM relocation support */
#define CONFIG_SYS_SDRAM_BASE		0x00000000
/* Kirkwood has 2k of Security SRAM, use it for SP */
#define CONFIG_SYS_INIT_SP_ADDR		0xC8012000

/*
 * CLKs configurations
 */
#define CONFIG_SYS_HZ		1000

/*
 * NS16550 Configuration
 */
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE	(-4)
#define CONFIG_SYS_NS16550_CLK		CONFIG_SYS_TCLK
#define CONFIG_SYS_NS16550_COM1		MV_UART0_BASE

/*
 * Serial Port configuration
 * The following definitions let you select what serial you want to use
 * for your console driver.
 */

#define CONFIG_CONS_INDEX	1	/*Console on UART0 */
#define CONFIG_BAUDRATE			115200
#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, \
					  115200,230400, 460800, 921600 }
/* auto boot */
#define CONFIG_BOOTDELAY	3	/* default enable autoboot */

/*
 * For booting Linux, the board info and command line data
 * have to be in the first 8 MB of memory, since this is
 * the maximum mapped by the Linux kernel during initialization.
 */
#define CONFIG_CMDLINE_TAG	1	/* enable passing of ATAGs  */
#define CONFIG_INITRD_TAG	1	/* enable INITRD tag */
#define CONFIG_SETUP_MEMORY_TAGS 1	/* enable memory tag */

#define	CONFIG_SYS_PROMPT	"Marvell>> "	/* Command Prompt */
#define	CONFIG_SYS_CBSIZE	1024	/* Console I/O Buff Size */
#define	CONFIG_SYS_PBSIZE	(CONFIG_SYS_CBSIZE \
		+sizeof(CONFIG_SYS_PROMPT) + 16)	/* Print Buff */

/*
 * NAND configuration
 */
#ifdef CONFIG_CMD_NAND
#define CONFIG_NAND_KIRKWOOD
#define CONFIG_SYS_MAX_NAND_DEVICE	1
#define NAND_MAX_CHIPS			1
#define CONFIG_SYS_NAND_BASE		0xD8000000	/* MV_DEFADR_NANDF */
#define NAND_ALLOW_ERASE_ALL		1
#define CONFIG_SYS_64BIT_VSPRINTF	/* needed for nand_util.c */
#endif

/*
 * SPI Flash configuration
 */
#ifdef CONFIG_CMD_SF
#define CONFIG_SPI_FLASH		1
#define CONFIG_HARD_SPI			1
#define CONFIG_KIRKWOOD_SPI		1
#define CONFIG_SPI_FLASH_MACRONIX	1
#define CONFIG_ENV_SPI_BUS		0
#define CONFIG_ENV_SPI_CS		0
#define CONFIG_ENV_SPI_MAX_HZ		50000000	/*50Mhz */
#endif

/*
 * Size of malloc() pool
 */
#define CONFIG_SYS_MALLOC_LEN	(1024 * 1024) /* 1MiB for malloc() */
/* size in bytes reserved for initial data */
#define CONFIG_SYS_GBL_DATA_SIZE	128

/*
 * Other required minimal configurations
 */
#define CONFIG_SYS_LONGHELP
#define CONFIG_AUTO_COMPLETE
#define CONFIG_CMDLINE_EDITING
#define CONFIG_CONSOLE_INFO_QUIET	/* some code reduction */
#define CONFIG_ARCH_CPU_INIT	/* call arch_cpu_init() */
#define CONFIG_ARCH_MISC_INIT	/* call arch_misc_init() */
#define CONFIG_BOARD_EARLY_INIT_F /* call board_init_f for early inits */ 
#define CONFIG_DISPLAY_CPUINFO	/* Display cpu info */
#define CONFIG_NR_DRAM_BANKS	4
#define CONFIG_STACKSIZE	0x00100000	/* regular stack- 1M */
#define CONFIG_SYS_LOAD_ADDR	0x00800000	/* default load adr- 8M */
#define CONFIG_SYS_MEMTEST_START 0x00400000	/* 4M */
#define CONFIG_SYS_MEMTEST_END	0x007fffff	/*(_8M -1) */
#define CONFIG_SYS_RESET_ADDRESS 0xffff0000	/* Rst Vector Adr */
#define CONFIG_SYS_MAXARGS	16	/* max number of command args */

/*
 * Ethernet Driver configuration
 */
#ifdef CONFIG_CMD_NET
#define CONFIG_CMD_MII
#define CONFIG_NETCONSOLE	/* include NetConsole support   */
#define CONFIG_NET_MULTI	/* specify more that one ports available */
#define	CONFIG_MII		/* expose smi ove miiphy interface */
#define CONFIG_MVGBE		/* Enable Marvell Gbe Controller Driver */
#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN	/* detect link using phy */
#define CONFIG_ENV_OVERWRITE	/* ethaddr can be reprogrammed */
#define CONFIG_RESET_PHY_R	/* use reset_phy() to init mv8831116 PHY */
#endif /* CONFIG_CMD_NET */

/*
 * USB/EHCI
 */
#ifdef CONFIG_CMD_USB
#define CONFIG_USB_EHCI		/* Enable EHCI USB support */
#define CONFIG_USB_EHCI_KIRKWOOD
#define CONFIG_EHCI_IS_TDI
#define CONFIG_USB_STORAGE
#define CONFIG_DOS_PARTITION
#define CONFIG_ISO_PARTITION
#define CONFIG_SUPPORT_VFAT
#endif /* CONFIG_CMD_USB */

/*
 * IDE Support on SATA ports
 */
#ifdef CONFIG_CMD_IDE
#define __io
#define CONFIG_CMD_EXT2
#define CONFIG_MVSATA_IDE
#define CONFIG_IDE_PREINIT
#define CONFIG_MVSATA_IDE_USE_PORT1
/* Needs byte-swapping for ATA data register */
#define CONFIG_IDE_SWAP_IO
/* Data, registers and alternate blocks are at the same offset */
#define CONFIG_SYS_ATA_DATA_OFFSET	(0x0100)
#define CONFIG_SYS_ATA_REG_OFFSET	(0x0100)
#define CONFIG_SYS_ATA_ALT_OFFSET	(0x0100)
/* Each 8-bit ATA register is aligned to a 4-bytes address */
#define CONFIG_SYS_ATA_STRIDE		4
/* Controller supports 48-bits LBA addressing */
#define CONFIG_LBA48
/* CONFIG_CMD_IDE requires some #defines for ATA registers */
#define CONFIG_SYS_IDE_MAXBUS		2
#define CONFIG_SYS_IDE_MAXDEVICE	2
/* ATA registers base is at SATA controller base */
#define CONFIG_SYS_ATA_BASE_ADDR	MV_SATA_BASE
#endif /* CONFIG_CMD_IDE */

/*
 * I2C related stuff
 */
#ifdef CONFIG_CMD_I2C
#define CONFIG_I2C_MVTWSI
#define CONFIG_SYS_I2C_SLAVE		0x0
#define CONFIG_SYS_I2C_SPEED		100000
#endif

/*
 * File system
 */
#define CONFIG_CMD_EXT2
#define CONFIG_CMD_JFFS2
#define CONFIG_CMD_FAT
#define CONFIG_CMD_UBI
#define CONFIG_CMD_UBIFS
#define CONFIG_RBTREE
#define CONFIG_MTD_DEVICE               /* needed for mtdparts commands */
#define CONFIG_MTD_PARTITIONS
#define CONFIG_CMD_MTDPARTS
#define CONFIG_LZO

#endif /* _MV_COMMON_H */
Commit	Line	Data
54e999a3 PW	1	/*
	2	* (C) Copyright 2010
	3	* Marvell Semiconductor <www.marvell.com>
	4	* Written-by: Prafulla Wadaskar <prafulla@marvell.com>
	5	*
	6	* See file CREDITS for list of people who contributed to this
	7	* project.
	8	*
	9	* This program is free software; you can redistribute it and/or
	10	* modify it under the terms of the GNU General Public License as
	11	* published by the Free Software Foundation; either version 2 of
	12	* the License, or (at your option) any later version.
	13	*
	14	* This program is distributed in the hope that it will be useful,
	15	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	16	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	17	* GNU General Public License for more details.
	18	*
	19	* You should have received a copy of the GNU General Public License
	20	* along with this program; if not, write to the Free Software
	21	* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
	22	* MA 02110-1301 USA
	23	*/
	24
	25	/*
	26	* This file contains Marvell Board Specific common defincations.
	27	* This file should be included in board config header file.
	28	*
	29	* It supports common definations for Kirkwood platform
	30	* TBD: support for Orion5X platforms
	31	*/
	32
	33	#ifndef _MV_COMMON_H
	34	#define _MV_COMMON_H
	35
	36	/*
	37	* High Level Configuration Options (easy to change)
	38	*/
	39	#define CONFIG_MARVELL 1
	40	#define CONFIG_ARM926EJS 1 /* Basic Architecture */
	41
	42	#if defined(CONFIG_KIRKWOOD)
	43	#define CONFIG_MD5 /* get_random_hex on krikwood needs MD5 support */
	44	#define CONFIG_KIRKWOOD_EGIGA_INIT /* Enable GbePort0/1 for kernel */
	45	#define CONFIG_KIRKWOOD_RGMII_PAD_1V8 /* Set RGMII Pad voltage to 1.8V */
	46	#define CONFIG_KIRKWOOD_PCIE_INIT /* Enable PCIE Port0 for kernel */
	47
31d80c77 PW	48	/*
	49	* By default kwbimage.cfg from board specific folder is used
	50	* If for some board, different configuration file need to be used,
	51	* CONFIG_SYS_KWD_CONFIG should be defined in board specific header file
	52	*/
	53	#ifndef CONFIG_SYS_KWD_CONFIG
	54	#define CONFIG_SYS_KWD_CONFIG $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage.cfg
	55	#endif /* CONFIG_SYS_KWD_CONFIG */
	56
	57	/*
	58	* CONFIG_SYS_TEXT_BASE can be defined in board specific header file, if needed
	59	*/
	60	#ifndef CONFIG_SYS_TEXT_BASE
	61	#define CONFIG_SYS_TEXT_BASE 0x00600000
	62	#endif /* CONFIG_SYS_TEXT_BASE */
	63
54e999a3 PW	64	#define CONFIG_I2C_MVTWSI_BASE KW_TWSI_BASE
	65	#define MV_UART0_BASE KW_UART0_BASE
	66	#define MV_SATA_BASE KW_SATA_BASE
	67	#define MV_SATA_PORT0_OFFSET KW_SATA_PORT0_OFFSET
	68	#define MV_SATA_PORT1_OFFSET KW_SATA_PORT1_OFFSET
	69
	70	#else
	71	#error "Unsupported SoC"
	72	#endif
	73
0b20ed76 PW	74	/* additions for new ARM relocation support */
	75	#define CONFIG_SYS_SDRAM_BASE 0x00000000
	76	/* Kirkwood has 2k of Security SRAM, use it for SP */
	77	#define CONFIG_SYS_INIT_SP_ADDR 0xC8012000
	78
54e999a3 PW	79	/*
	80	* CLKs configurations
	81	*/
	82	#define CONFIG_SYS_HZ 1000
	83
	84	/*
	85	* NS16550 Configuration
	86	*/
	87	#define CONFIG_SYS_NS16550
	88	#define CONFIG_SYS_NS16550_SERIAL
	89	#define CONFIG_SYS_NS16550_REG_SIZE (-4)
	90	#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK
	91	#define CONFIG_SYS_NS16550_COM1 MV_UART0_BASE
	92
	93	/*
	94	* Serial Port configuration
	95	* The following definitions let you select what serial you want to use
	96	* for your console driver.
	97	*/
	98
	99	#define CONFIG_CONS_INDEX 1 /Console on UART0 /
	100	#define CONFIG_BAUDRATE 115200
	101	#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \
	102	115200,230400, 460800, 921600 }
	103	/* auto boot */
	104	#define CONFIG_BOOTDELAY 3 /* default enable autoboot */
	105
	106	/*
	107	* For booting Linux, the board info and command line data
	108	* have to be in the first 8 MB of memory, since this is
	109	* the maximum mapped by the Linux kernel during initialization.
	110	*/
	111	#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
	112	#define CONFIG_INITRD_TAG 1 /* enable INITRD tag */
	113	#define CONFIG_SETUP_MEMORY_TAGS 1 /* enable memory tag */
	114
	115	#define CONFIG_SYS_PROMPT "Marvell>> " /* Command Prompt */
	116	#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buff Size */
	117	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \
	118	+sizeof(CONFIG_SYS_PROMPT) + 16) /* Print Buff */
	119
	120	/*
	121	* NAND configuration
	122	*/
	123	#ifdef CONFIG_CMD_NAND
	124	#define CONFIG_NAND_KIRKWOOD
	125	#define CONFIG_SYS_MAX_NAND_DEVICE 1
	126	#define NAND_MAX_CHIPS 1
	127	#define CONFIG_SYS_NAND_BASE 0xD8000000 /* MV_DEFADR_NANDF */
	128	#define NAND_ALLOW_ERASE_ALL 1
	129	#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */
	130	#endif
	131
	132	/*
	133	* SPI Flash configuration
	134	*/
	135	#ifdef CONFIG_CMD_SF
	136	#define CONFIG_SPI_FLASH 1
	137	#define CONFIG_HARD_SPI 1
	138	#define CONFIG_KIRKWOOD_SPI 1
	139	#define CONFIG_SPI_FLASH_MACRONIX 1
	140	#define CONFIG_ENV_SPI_BUS 0
	141	#define CONFIG_ENV_SPI_CS 0
	142	#define CONFIG_ENV_SPI_MAX_HZ 50000000 /50Mhz /
143	#endif
144
145	/*
146	* Size of malloc() pool
147	*/
148	#define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* 1MiB for malloc() */
149	/* size in bytes reserved for initial data */
150	#define CONFIG_SYS_GBL_DATA_SIZE 128
151
152	/*
153	* Other required minimal configurations
154	*/
155	#define CONFIG_SYS_LONGHELP
156	#define CONFIG_AUTO_COMPLETE
157	#define CONFIG_CMDLINE_EDITING
158	#define CONFIG_CONSOLE_INFO_QUIET /* some code reduction */
159	#define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */
160	#define CONFIG_ARCH_MISC_INIT /* call arch_misc_init() */
754ae3fb	161	#define CONFIG_BOARD_EARLY_INIT_F /* call board_init_f for early inits */
54e999a3 PW	162	#define CONFIG_DISPLAY_CPUINFO /* Display cpu info */
	163	#define CONFIG_NR_DRAM_BANKS 4
	164	#define CONFIG_STACKSIZE 0x00100000 /* regular stack- 1M */
	165	#define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */
	166	#define CONFIG_SYS_MEMTEST_START 0x00400000 /* 4M */
	167	#define CONFIG_SYS_MEMTEST_END 0x007fffff /(_8M -1) /
	168	#define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */
	169	#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
	170
	171	/*
	172	* Ethernet Driver configuration
	173	*/
	174	#ifdef CONFIG_CMD_NET
	175	#define CONFIG_CMD_MII
	176	#define CONFIG_NETCONSOLE /* include NetConsole support */
	177	#define CONFIG_NET_MULTI /* specify more that one ports available */
	178	#define CONFIG_MII /* expose smi ove miiphy interface */
	179	#define CONFIG_MVGBE /* Enable Marvell Gbe Controller Driver */
	180	#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* detect link using phy */
	181	#define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */
	182	#define CONFIG_RESET_PHY_R /* use reset_phy() to init mv8831116 PHY */
	183	#endif /* CONFIG_CMD_NET */
	184
	185	/*
	186	* USB/EHCI
	187	*/
	188	#ifdef CONFIG_CMD_USB
	189	#define CONFIG_USB_EHCI /* Enable EHCI USB support */
	190	#define CONFIG_USB_EHCI_KIRKWOOD
	191	#define CONFIG_EHCI_IS_TDI
	192	#define CONFIG_USB_STORAGE
	193	#define CONFIG_DOS_PARTITION
	194	#define CONFIG_ISO_PARTITION
	195	#define CONFIG_SUPPORT_VFAT
	196	#endif /* CONFIG_CMD_USB */
	197
	198	/*
	199	* IDE Support on SATA ports
	200	*/
	201	#ifdef CONFIG_CMD_IDE
	202	#define __io
	203	#define CONFIG_CMD_EXT2
	204	#define CONFIG_MVSATA_IDE
	205	#define CONFIG_IDE_PREINIT
	206	#define CONFIG_MVSATA_IDE_USE_PORT1
	207	/* Needs byte-swapping for ATA data register */
	208	#define CONFIG_IDE_SWAP_IO
	209	/* Data, registers and alternate blocks are at the same offset */
	210	#define CONFIG_SYS_ATA_DATA_OFFSET (0x0100)
	211	#define CONFIG_SYS_ATA_REG_OFFSET (0x0100)
	212	#define CONFIG_SYS_ATA_ALT_OFFSET (0x0100)
	213	/* Each 8-bit ATA register is aligned to a 4-bytes address */
	214	#define CONFIG_SYS_ATA_STRIDE 4
	215	/* Controller supports 48-bits LBA addressing */
	216	#define CONFIG_LBA48
	217	/* CONFIG_CMD_IDE requires some #defines for ATA registers */
	218	#define CONFIG_SYS_IDE_MAXBUS 2
	219	#define CONFIG_SYS_IDE_MAXDEVICE 2
	220	/* ATA registers base is at SATA controller base */
	221	#define CONFIG_SYS_ATA_BASE_ADDR MV_SATA_BASE
	222	#endif /* CONFIG_CMD_IDE */
	223
	224	/*
	225	* I2C related stuff
226	*/
227	#ifdef CONFIG_CMD_I2C
228	#define CONFIG_I2C_MVTWSI
229	#define CONFIG_SYS_I2C_SLAVE 0x0
230	#define CONFIG_SYS_I2C_SPEED 100000
231	#endif
232
233	/*
234	* File system
235	*/
236	#define CONFIG_CMD_EXT2
237	#define CONFIG_CMD_JFFS2
238	#define CONFIG_CMD_FAT
239	#define CONFIG_CMD_UBI
240	#define CONFIG_CMD_UBIFS
241	#define CONFIG_RBTREE
242	#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
243	#define CONFIG_MTD_PARTITIONS
244	#define CONFIG_CMD_MTDPARTS
245	#define CONFIG_LZO
246
247	#endif /* _MV_COMMON_H */