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83d290c5 | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
47c3e074 FE |
2 | /* |
3 | * Copyright (C) 2011 Freescale Semiconductor, Inc. | |
4 | * | |
5 | * Configuration settings for the MX53ARD Freescale board. | |
47c3e074 FE |
6 | */ |
7 | ||
8 | #ifndef __CONFIG_H | |
9 | #define __CONFIG_H | |
10 | ||
7c2eabab FE |
11 | #define CONFIG_MACH_TYPE MACH_TYPE_MX53_ARD |
12 | ||
47c3e074 FE |
13 | #include <asm/arch/imx-regs.h> |
14 | ||
15 | #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ | |
47c3e074 FE |
16 | #define CONFIG_SETUP_MEMORY_TAGS |
17 | #define CONFIG_INITRD_TAG | |
fd622f23 | 18 | #define CONFIG_REVISION_TAG |
47c3e074 | 19 | |
18fb0e3c | 20 | #define CONFIG_SYS_FSL_CLK |
4677b1b6 | 21 | |
47c3e074 FE |
22 | /* Size of malloc() pool */ |
23 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024) | |
24 | ||
68fbc0e6 BT |
25 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
26 | #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR_AXI | |
68fbc0e6 BT |
27 | #define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR_AXI |
28 | #define CONFIG_MXC_NAND_IP_REGS_BASE NFC_BASE_ADDR | |
29 | #define CONFIG_SYS_NAND_LARGEPAGE | |
30 | #define CONFIG_MXC_NAND_HWECC | |
68fbc0e6 | 31 | |
47c3e074 | 32 | #define CONFIG_MXC_UART |
40f6fffe | 33 | #define CONFIG_MXC_UART_BASE UART1_BASE |
47c3e074 FE |
34 | |
35 | /* I2C Configs */ | |
b089d039 | 36 | #define CONFIG_SYS_I2C |
37 | #define CONFIG_SYS_I2C_MXC | |
03544c66 AA |
38 | #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ |
39 | #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ | |
f8cb101e | 40 | #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ |
47c3e074 FE |
41 | |
42 | /* MMC Configs */ | |
47c3e074 FE |
43 | #define CONFIG_SYS_FSL_ESDHC_ADDR 0 |
44 | #define CONFIG_SYS_FSL_ESDHC_NUM 2 | |
45 | ||
47c3e074 FE |
46 | /* Eth Configs */ |
47 | #define CONFIG_HAS_ETH1 | |
47c3e074 | 48 | |
47c3e074 FE |
49 | /* allow to overwrite serial and ethaddr */ |
50 | #define CONFIG_ENV_OVERWRITE | |
47c3e074 FE |
51 | |
52 | /* Command definition */ | |
47c3e074 | 53 | |
28b119e9 | 54 | #define CONFIG_ETHPRIME "smc911x" |
47c3e074 | 55 | |
547e31d2 | 56 | #define CONFIG_LOADADDR 0x72000000 /* loadaddr env var */ |
47c3e074 FE |
57 | |
58 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
59 | "script=boot.scr\0" \ | |
3c525ecf | 60 | "uimage=zImage\0" \ |
547e31d2 OS |
61 | "console=ttymxc0\0" \ |
62 | "fdt_high=0xffffffff\0" \ | |
63 | "initrd_high=0xffffffff\0" \ | |
64 | "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \ | |
3c525ecf | 65 | "fdt_addr=0x78000000\0" \ |
547e31d2 OS |
66 | "boot_fdt=try\0" \ |
67 | "ip_dyn=yes\0" \ | |
68 | "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ | |
a3f170cd OS |
69 | "mmcpart=1\0" \ |
70 | "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \ | |
547e31d2 OS |
71 | "update_sd_firmware_filename=u-boot.imx\0" \ |
72 | "update_sd_firmware=" \ | |
73 | "if test ${ip_dyn} = yes; then " \ | |
74 | "setenv get_cmd dhcp; " \ | |
75 | "else " \ | |
76 | "setenv get_cmd tftp; " \ | |
77 | "fi; " \ | |
78 | "if mmc dev ${mmcdev}; then " \ | |
79 | "if ${get_cmd} ${update_sd_firmware_filename}; then " \ | |
80 | "setexpr fw_sz ${filesize} / 0x200; " \ | |
81 | "setexpr fw_sz ${fw_sz} + 1; " \ | |
82 | "mmc write ${loadaddr} 0x2 ${fw_sz}; " \ | |
83 | "fi; " \ | |
84 | "fi\0" \ | |
85 | "mmcargs=setenv bootargs console=${console},${baudrate} " \ | |
86 | "root=${mmcroot}\0" \ | |
47c3e074 FE |
87 | "loadbootscript=" \ |
88 | "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ | |
89 | "bootscript=echo Running bootscript from mmc ...; " \ | |
90 | "source\0" \ | |
91 | "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \ | |
547e31d2 | 92 | "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ |
47c3e074 FE |
93 | "mmcboot=echo Booting from mmc ...; " \ |
94 | "run mmcargs; " \ | |
547e31d2 OS |
95 | "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ |
96 | "if run loadfdt; then " \ | |
3c525ecf | 97 | "bootz ${loadaddr} - ${fdt_addr}; " \ |
547e31d2 OS |
98 | "else " \ |
99 | "if test ${boot_fdt} = try; then " \ | |
3c525ecf | 100 | "bootz; " \ |
547e31d2 OS |
101 | "else " \ |
102 | "echo WARN: Cannot load the DT; " \ | |
103 | "fi; " \ | |
104 | "fi; " \ | |
105 | "else " \ | |
3c525ecf | 106 | "bootz; " \ |
547e31d2 OS |
107 | "fi;\0" \ |
108 | "netargs=setenv bootargs console=${console},${baudrate} " \ | |
47c3e074 | 109 | "root=/dev/nfs " \ |
547e31d2 OS |
110 | "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ |
111 | "netboot=echo Booting from net ...; " \ | |
47c3e074 | 112 | "run netargs; " \ |
547e31d2 OS |
113 | "if test ${ip_dyn} = yes; then " \ |
114 | "setenv get_cmd dhcp; " \ | |
47c3e074 | 115 | "else " \ |
547e31d2 | 116 | "setenv get_cmd tftp; " \ |
47c3e074 | 117 | "fi; " \ |
547e31d2 OS |
118 | "${get_cmd} ${uimage}; " \ |
119 | "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ | |
120 | "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ | |
3c525ecf | 121 | "bootz ${loadaddr} - ${fdt_addr}; " \ |
547e31d2 OS |
122 | "else " \ |
123 | "if test ${boot_fdt} = try; then " \ | |
3c525ecf | 124 | "bootz; " \ |
547e31d2 OS |
125 | "else " \ |
126 | "echo WARN: Cannot load the DT; " \ | |
127 | "fi; " \ | |
128 | "fi; " \ | |
129 | "else " \ | |
3c525ecf | 130 | "bootz; " \ |
547e31d2 OS |
131 | "fi;\0" |
132 | ||
133 | #define CONFIG_BOOTCOMMAND \ | |
134 | "mmc dev ${mmcdev}; if mmc rescan; then " \ | |
135 | "if run loadbootscript; then " \ | |
136 | "run bootscript; " \ | |
137 | "else " \ | |
138 | "if run loaduimage; then " \ | |
139 | "run mmcboot; " \ | |
140 | "else run netboot; " \ | |
141 | "fi; " \ | |
142 | "fi; " \ | |
143 | "else run netboot; fi" | |
144 | ||
47c3e074 FE |
145 | #define CONFIG_ARP_TIMEOUT 200UL |
146 | ||
147 | /* Miscellaneous configurable options */ | |
47c3e074 | 148 | |
47c3e074 FE |
149 | #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR |
150 | ||
47c3e074 | 151 | /* Physical Memory Map */ |
47c3e074 FE |
152 | #define PHYS_SDRAM_1 CSD0_BASE_ADDR |
153 | #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024) | |
154 | #define PHYS_SDRAM_2 CSD1_BASE_ADDR | |
155 | #define PHYS_SDRAM_2_SIZE (512 * 1024 * 1024) | |
156 | #define PHYS_SDRAM_SIZE (PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE) | |
157 | ||
158 | #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) | |
159 | #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) | |
160 | #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) | |
161 | ||
162 | #define CONFIG_SYS_INIT_SP_OFFSET \ | |
163 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) | |
164 | #define CONFIG_SYS_INIT_SP_ADDR \ | |
165 | (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) | |
166 | ||
e856bdcf | 167 | /* environment organization */ |
47c3e074 FE |
168 | #define CONFIG_SYS_MMC_ENV_DEV 0 |
169 | ||
47c3e074 FE |
170 | #define MX53ARD_CS1GCR1 (CSEN | DSZ(2)) |
171 | #define MX53ARD_CS1RCR1 (RCSN(2) | OEN (1) | RWSC(22)) | |
172 | #define MX53ARD_CS1RCR2 RBEN(2) | |
173 | #define MX53ARD_CS1WCR1 (WCSN(2) | WEN(2) | WBEN(2) | WWSC(22)) | |
174 | ||
175 | #endif /* __CONFIG_H */ |