]> git.ipfire.org Git - people/ms/u-boot.git/blame - include/configs/mx6qsabreauto.h
Merge branch 'master' of git://git.denx.de/u-boot-sh
[people/ms/u-boot.git] / include / configs / mx6qsabreauto.h
CommitLineData
7dd6545d
FE
1/*
2 * Copyright (C) 2012 Freescale Semiconductor, Inc.
3 *
903e779c 4 * Configuration settings for the Freescale i.MX6Q SabreAuto board.
7dd6545d 5 *
1a459660 6 * SPDX-License-Identifier: GPL-2.0+
7dd6545d
FE
7 */
8
9#ifndef __MX6QSABREAUTO_CONFIG_H
10#define __MX6QSABREAUTO_CONFIG_H
7dd6545d
FE
11
12#define CONFIG_MACH_TYPE 3529
13#define CONFIG_MXC_UART_BASE UART4_BASE
51535d9f 14#define CONFIG_CONSOLE_DEV "ttymxc3"
186feb0b 15#if defined CONFIG_MX6Q
bf0c2245 16#define CONFIG_DEFAULT_FDT_FILE "imx6q-sabreauto.dtb"
186feb0b
FE
17#elif defined CONFIG_MX6DL
18#define CONFIG_DEFAULT_FDT_FILE "imx6dl-sabreauto.dtb"
19#endif
903e779c 20#define CONFIG_MMCROOT "/dev/mmcblk0p2"
7dd6545d
FE
21#define PHYS_SDRAM_SIZE (2u * 1024 * 1024 * 1024)
22
73448b1f
KW
23/* USB Configs */
24#define CONFIG_CMD_USB
25#define CONFIG_USB_EHCI
26#define CONFIG_USB_EHCI_MX6
27#define CONFIG_USB_STORAGE
28#define CONFIG_USB_HOST_ETHER
29#define CONFIG_USB_ETHER_ASIX
d1a52860
TK
30#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
31#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
73448b1f
KW
32#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
33#define CONFIG_MXC_USB_FLAGS 0
34
8fe280f3
YL
35#define CONFIG_PCA953X
36#define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x30, 8}, {0x32, 8}, {0x34, 8} }
37
c1747970 38#include "mx6sabre_common.h"
51535d9f 39
de7d02ae
SG
40#define CONFIG_SYS_FSL_USDHC_NUM 2
41#if defined(CONFIG_ENV_IS_IN_MMC)
42#define CONFIG_SYS_MMC_ENV_DEV 0
43#endif
44
19578165
RF
45/* I2C Configs */
46#define CONFIG_CMD_I2C
b089d039 47#define CONFIG_SYS_I2C
48#define CONFIG_SYS_I2C_MXC
19578165
RF
49#define CONFIG_SYS_I2C_SPEED 100000
50
83bb3215
YL
51/* NAND flash command */
52#define CONFIG_CMD_NAND
53#define CONFIG_CMD_NAND_TRIMFFS
54
55/* NAND stuff */
56#define CONFIG_NAND_MXS
57#define CONFIG_SYS_MAX_NAND_DEVICE 1
58#define CONFIG_SYS_NAND_BASE 0x40000000
59#define CONFIG_SYS_NAND_5_ADDR_CYCLE
60#define CONFIG_SYS_NAND_ONFI_DETECTION
61
62/* DMA stuff, needed for GPMI/MXS NAND support */
63#define CONFIG_APBH_DMA
64#define CONFIG_APBH_DMA_BURST
65#define CONFIG_APBH_DMA_BURST8
66
7dd6545d 67#endif /* __MX6QSABREAUTO_CONFIG_H */