[people/ms/u-boot.git] / include / configs / mx6qsabrelite.h

/*
 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
 *
 * Configuration settings for the Freescale i.MX6Q Sabre Lite board.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.		See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#ifndef __CONFIG_H
#define __CONFIG_H

#define CONFIG_MX6
#define CONFIG_MX6Q
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO

#define CONFIG_MACH_TYPE	3769

#include <asm/arch/imx-regs.h>
#include <asm/imx-common/gpio.h>

#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_REVISION_TAG

/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN		(10 * 1024 * 1024)

#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_MISC_INIT_R
#define CONFIG_MXC_GPIO

#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE	       UART2_BASE

#define CONFIG_CMD_SF
#ifdef CONFIG_CMD_SF
#define CONFIG_SPI_FLASH
#define CONFIG_SPI_FLASH_SST
#define CONFIG_MXC_SPI
#define CONFIG_SF_DEFAULT_BUS  0
#define CONFIG_SF_DEFAULT_CS   (0|(IMX_GPIO_NR(3, 19)<<8))
#define CONFIG_SF_DEFAULT_SPEED 25000000
#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
#endif

/* I2C Configs */
#define CONFIG_CMD_I2C
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_I2C_MXC
#define CONFIG_SYS_I2C_SPEED		100000

/* MMC Configs */
#define CONFIG_FSL_ESDHC
#define CONFIG_FSL_USDHC
#define CONFIG_SYS_FSL_ESDHC_ADDR      0
#define CONFIG_SYS_FSL_USDHC_NUM       2

#define CONFIG_MMC
#define CONFIG_CMD_MMC
#define CONFIG_GENERIC_MMC
#define CONFIG_BOUNCE_BUFFER
#define CONFIG_CMD_EXT2
#define CONFIG_CMD_FAT
#define CONFIG_DOS_PARTITION

#define CONFIG_CMD_SATA
/*
 * SATA Configs
 */
#ifdef CONFIG_CMD_SATA
#define CONFIG_DWC_AHSATA
#define CONFIG_SYS_SATA_MAX_DEVICE	1
#define CONFIG_DWC_AHSATA_PORT_ID	0
#define CONFIG_DWC_AHSATA_BASE_ADDR	SATA_ARB_BASE_ADDR
#define CONFIG_LBA48
#define CONFIG_LIBATA
#endif

#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_MII
#define CONFIG_CMD_NET
#define CONFIG_FEC_MXC
#define CONFIG_MII
#define IMX_FEC_BASE			ENET_BASE_ADDR
#define CONFIG_FEC_XCV_TYPE		RGMII
#define CONFIG_ETHPRIME			"FEC"
#define CONFIG_FEC_MXC_PHYADDR		6
#define CONFIG_PHYLIB
#define CONFIG_PHY_MICREL
#define CONFIG_PHY_MICREL_KSZ9021

/* USB Configs */
#define CONFIG_CMD_USB
#define CONFIG_CMD_FAT
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_MX6
#define CONFIG_USB_STORAGE
#define CONFIG_USB_HOST_ETHER
#define CONFIG_USB_ETHER_ASIX
#define CONFIG_USB_ETHER_SMSC95XX
#define CONFIG_MXC_USB_PORT	1
#define CONFIG_MXC_USB_PORTSC	(PORT_PTS_UTMI | PORT_PTS_PTW)
#define CONFIG_MXC_USB_FLAGS	0

/* Miscellaneous commands */
#define CONFIG_CMD_BMODE

/* Framebuffer and LCD */
#define CONFIG_VIDEO
#define CONFIG_VIDEO_IPUV3
#define CONFIG_CFB_CONSOLE
#define CONFIG_VGA_AS_SINGLE_DEVICE
#define CONFIG_SYS_CONSOLE_IS_IN_ENV
#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
#define CONFIG_VIDEO_BMP_RLE8
#define CONFIG_SPLASH_SCREEN
#define CONFIG_BMP_16BPP
#define CONFIG_VIDEO_LOGO
#define CONFIG_IPUV3_CLK 260000000

/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_CONS_INDEX	       1
#define CONFIG_BAUDRATE			       115200

/* Command definition */
#include <config_cmd_default.h>

#undef CONFIG_CMD_IMLS

#define CONFIG_BOOTDELAY	       1

#define CONFIG_PREBOOT                 ""

#define CONFIG_LOADADDR			       0x12000000
#define CONFIG_SYS_TEXT_BASE	       0x17800000

#define CONFIG_EXTRA_ENV_SETTINGS \
	"script=boot.scr\0" \
	"uimage=uImage\0" \
	"console=ttymxc1\0" \
	"fdt_high=0xffffffff\0" \
	"initrd_high=0xffffffff\0" \
	"fdt_file=imx6q-sabrelite.dtb\0" \
	"fdt_addr=0x11000000\0" \
	"boot_fdt=try\0" \
	"ip_dyn=yes\0" \
	"mmcdev=0\0" \
	"mmcpart=2\0" \
	"mmcroot=/dev/mmcblk0p3 rootwait rw\0" \
	"mmcargs=setenv bootargs console=${console},${baudrate} " \
		"root=${mmcroot}\0" \
	"loadbootscript=" \
		"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
	"bootscript=echo Running bootscript from mmc ...; " \
		"source\0" \
	"loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
	"mmcboot=echo Booting from mmc ...; " \
		"run mmcargs; " \
		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
			"if run loadfdt; then " \
				"bootm ${loadaddr} - ${fdt_addr}; " \
			"else " \
				"if test ${boot_fdt} = try; then " \
					"bootm; " \
				"else " \
					"echo WARN: Cannot load the DT; " \
				"fi; " \
			"fi; " \
		"else " \
			"bootm; " \
		"fi;\0" \
	"netargs=setenv bootargs console=${console},${baudrate} " \
		"root=/dev/nfs " \
	"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
		"netboot=echo Booting from net ...; " \
		"run netargs; " \
		"if test ${ip_dyn} = yes; then " \
			"setenv get_cmd dhcp; " \
		"else " \
			"setenv get_cmd tftp; " \
		"fi; " \
		"${get_cmd} ${uimage}; " \
		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
			"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
				"bootm ${loadaddr} - ${fdt_addr}; " \
			"else " \
				"if test ${boot_fdt} = try; then " \
					"bootm; " \
				"else " \
					"echo WARN: Cannot load the DT; " \
				"fi; " \
			"fi; " \
		"else " \
			"bootm; " \
		"fi;\0"

#define CONFIG_BOOTCOMMAND \
	   "mmc dev ${mmcdev};" \
	   "mmc dev ${mmcdev}; if mmc rescan; then " \
		   "if run loadbootscript; then " \
			   "run bootscript; " \
		   "else " \
			   "if run loaduimage; then " \
				   "run mmcboot; " \
			   "else run netboot; " \
			   "fi; " \
		   "fi; " \
	   "else run netboot; fi"

#define CONFIG_ARP_TIMEOUT     200UL

/* Miscellaneous configurable options */
#define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_HUSH_PARSER
#define CONFIG_SYS_PROMPT	       "MX6QSABRELITE U-Boot > "
#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_CBSIZE	       256

/* Print Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_MAXARGS	       16
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE

#define CONFIG_SYS_MEMTEST_START       0x10000000
#define CONFIG_SYS_MEMTEST_END	       0x10010000

#define CONFIG_SYS_LOAD_ADDR	       CONFIG_LOADADDR
#define CONFIG_SYS_HZ		       1000

#define CONFIG_CMDLINE_EDITING

/* Physical Memory Map */
#define CONFIG_NR_DRAM_BANKS	       1
#define PHYS_SDRAM		       MMDC0_ARB_BASE_ADDR
#define PHYS_SDRAM_SIZE			       (1u * 1024 * 1024 * 1024)

#define CONFIG_SYS_SDRAM_BASE	       PHYS_SDRAM
#define CONFIG_SYS_INIT_RAM_ADDR       IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE       IRAM_SIZE

#define CONFIG_SYS_INIT_SP_OFFSET \
       (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR \
       (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)

/* FLASH and environment organization */
#define CONFIG_SYS_NO_FLASH

#define CONFIG_ENV_SIZE			(8 * 1024)

#define CONFIG_ENV_IS_IN_MMC
/* #define CONFIG_ENV_IS_IN_SPI_FLASH */

#if defined(CONFIG_ENV_IS_IN_MMC)
#define CONFIG_ENV_OFFSET		(6 * 64 * 1024)
#define CONFIG_SYS_MMC_ENV_DEV		0
#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
#define CONFIG_ENV_OFFSET		(768 * 1024)
#define CONFIG_ENV_SECT_SIZE		(8 * 1024)
#define CONFIG_ENV_SPI_BUS		CONFIG_SF_DEFAULT_BUS
#define CONFIG_ENV_SPI_CS		CONFIG_SF_DEFAULT_CS
#define CONFIG_ENV_SPI_MODE		CONFIG_SF_DEFAULT_MODE
#define CONFIG_ENV_SPI_MAX_HZ		CONFIG_SF_DEFAULT_SPEED
#endif

#define CONFIG_OF_LIBFDT
#define CONFIG_CMD_BOOTZ

#ifndef CONFIG_SYS_DCACHE_OFF
#define CONFIG_CMD_CACHE
#endif

#endif			       /* __CONFIG_H */
Commit	Line	Data
bc5833c4 JL	1	/*
	2	* Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
	3	*
	4	* Configuration settings for the Freescale i.MX6Q Sabre Lite board.
	5	*
	6	* This program is free software; you can redistribute it and/or
	7	* modify it under the terms of the GNU General Public License as
	8	* published by the Free Software Foundation; either version 2 of
	9	* the License, or (at your option) any later version.
	10	*
	11	* This program is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
f5cdc117	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
bc5833c4 JL	14	* GNU General Public License for more details.
	15	*
	16	* You should have received a copy of the GNU General Public License
	17	* along with this program; if not, write to the Free Software
	18	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	19	* MA 02111-1307 USA
	20	*/
	21
	22	#ifndef __CONFIG_H
	23	#define __CONFIG_H
	24
5ea6d7c8	25	#define CONFIG_MX6
bc5833c4	26	#define CONFIG_MX6Q
bc5833c4 JL	27	#define CONFIG_DISPLAY_CPUINFO
	28	#define CONFIG_DISPLAY_BOARDINFO
	29
c338f0b5 EN	30	#define CONFIG_MACH_TYPE 3769
c338f0b5 EN	31
bc5833c4	32	#include <asm/arch/imx-regs.h>
5fecb36c	33	#include <asm/imx-common/gpio.h>
bc5833c4 JL	34
	35	#define CONFIG_CMDLINE_TAG
	36	#define CONFIG_SETUP_MEMORY_TAGS
	37	#define CONFIG_INITRD_TAG
1c9ceff8	38	#define CONFIG_REVISION_TAG
bc5833c4 JL	39
bc5833c4 JL	40	/* Size of malloc() pool */
e58010b5	41	#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
bc5833c4	42
bc5833c4	43	#define CONFIG_BOARD_EARLY_INIT_F
28fdbddc	44	#define CONFIG_MISC_INIT_R
bc5833c4 JL	45	#define CONFIG_MXC_GPIO
	46
	47	#define CONFIG_MXC_UART
f5cdc117	48	#define CONFIG_MXC_UART_BASE UART2_BASE
bc5833c4	49
373a1d8c EN	50	#define CONFIG_CMD_SF
	51	#ifdef CONFIG_CMD_SF
	52	#define CONFIG_SPI_FLASH
	53	#define CONFIG_SPI_FLASH_SST
	54	#define CONFIG_MXC_SPI
ba54b927	55	#define CONFIG_SF_DEFAULT_BUS 0
5fecb36c	56	#define CONFIG_SF_DEFAULT_CS (0\|(IMX_GPIO_NR(3, 19)<<8))
373a1d8c EN	57	#define CONFIG_SF_DEFAULT_SPEED 25000000
	58	#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
	59	#endif
	60
3174689b TK	61	/* I2C Configs */
3174689b TK	62	#define CONFIG_CMD_I2C
9c067828	63	#define CONFIG_I2C_MULTI_BUS
3174689b	64	#define CONFIG_I2C_MXC
9c067828	65	#define CONFIG_SYS_I2C_SPEED 100000
3174689b	66
bc5833c4 JL	67	/* MMC Configs */
	68	#define CONFIG_FSL_ESDHC
	69	#define CONFIG_FSL_USDHC
	70	#define CONFIG_SYS_FSL_ESDHC_ADDR 0
	71	#define CONFIG_SYS_FSL_USDHC_NUM 2
	72
	73	#define CONFIG_MMC
	74	#define CONFIG_CMD_MMC
	75	#define CONFIG_GENERIC_MMC
640fb607	76	#define CONFIG_BOUNCE_BUFFER
9ff323df	77	#define CONFIG_CMD_EXT2
bc5833c4 JL	78	#define CONFIG_CMD_FAT
	79	#define CONFIG_DOS_PARTITION
	80
3996a96c EN	81	#define CONFIG_CMD_SATA
	82	/*
	83	* SATA Configs
	84	*/
	85	#ifdef CONFIG_CMD_SATA
	86	#define CONFIG_DWC_AHSATA
	87	#define CONFIG_SYS_SATA_MAX_DEVICE 1
	88	#define CONFIG_DWC_AHSATA_PORT_ID 0
	89	#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
	90	#define CONFIG_LBA48
	91	#define CONFIG_LIBATA
	92	#endif
	93
2af81e27 JL	94	#define CONFIG_CMD_PING
	95	#define CONFIG_CMD_DHCP
	96	#define CONFIG_CMD_MII
	97	#define CONFIG_CMD_NET
f5cdc117 WD	98	#define CONFIG_FEC_MXC
f5cdc117 WD	99	#define CONFIG_MII
2af81e27	100	#define IMX_FEC_BASE ENET_BASE_ADDR
f5cdc117	101	#define CONFIG_FEC_XCV_TYPE RGMII
2af81e27 JL	102	#define CONFIG_ETHPRIME "FEC"
2af81e27 JL	103	#define CONFIG_FEC_MXC_PHYADDR 6
2bf3359e TK	104	#define CONFIG_PHYLIB
2bf3359e TK	105	#define CONFIG_PHY_MICREL
cc5f5522	106	#define CONFIG_PHY_MICREL_KSZ9021
2af81e27	107
2ea73e9e WG	108	/* USB Configs */
	109	#define CONFIG_CMD_USB
	110	#define CONFIG_CMD_FAT
	111	#define CONFIG_USB_EHCI
	112	#define CONFIG_USB_EHCI_MX6
	113	#define CONFIG_USB_STORAGE
	114	#define CONFIG_USB_HOST_ETHER
	115	#define CONFIG_USB_ETHER_ASIX
	116	#define CONFIG_USB_ETHER_SMSC95XX
	117	#define CONFIG_MXC_USB_PORT 1
	118	#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI \| PORT_PTS_PTW)
	119	#define CONFIG_MXC_USB_FLAGS 0
	120
bb05b40b TK	121	/* Miscellaneous commands */
	122	#define CONFIG_CMD_BMODE
	123
e58010b5 EN	124	/* Framebuffer and LCD */
	125	#define CONFIG_VIDEO
	126	#define CONFIG_VIDEO_IPUV3
	127	#define CONFIG_CFB_CONSOLE
	128	#define CONFIG_VGA_AS_SINGLE_DEVICE
	129	#define CONFIG_SYS_CONSOLE_IS_IN_ENV
	130	#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
	131	#define CONFIG_VIDEO_BMP_RLE8
	132	#define CONFIG_SPLASH_SCREEN
	133	#define CONFIG_BMP_16BPP
	134	#define CONFIG_VIDEO_LOGO
	135	#define CONFIG_IPUV3_CLK 260000000
	136
bc5833c4 JL	137	/* allow to overwrite serial and ethaddr */
bc5833c4 JL	138	#define CONFIG_ENV_OVERWRITE
f5cdc117 WD	139	#define CONFIG_CONS_INDEX 1
f5cdc117 WD	140	#define CONFIG_BAUDRATE 115200
bc5833c4 JL	141
	142	/* Command definition */
	143	#include <config_cmd_default.h>
	144
	145	#undef CONFIG_CMD_IMLS
bc5833c4	146
eb141bd3	147	#define CONFIG_BOOTDELAY 1
bc5833c4	148
28fdbddc EN	149	#define CONFIG_PREBOOT ""
28fdbddc EN	150
589b1afd	151	#define CONFIG_LOADADDR 0x12000000
f5cdc117	152	#define CONFIG_SYS_TEXT_BASE 0x17800000
bc5833c4 JL	153
bc5833c4 JL	154	#define CONFIG_EXTRA_ENV_SETTINGS \
d17087cd OS	155	"script=boot.scr\0" \
d17087cd OS	156	"uimage=uImage\0" \
f4ac6cb6	157	"console=ttymxc1\0" \
d17087cd	158	"fdt_high=0xffffffff\0" \
7e9603e7	159	"initrd_high=0xffffffff\0" \
6efbe219 OS	160	"fdt_file=imx6q-sabrelite.dtb\0" \
	161	"fdt_addr=0x11000000\0" \
	162	"boot_fdt=try\0" \
	163	"ip_dyn=yes\0" \
d17087cd OS	164	"mmcdev=0\0" \
	165	"mmcpart=2\0" \
	166	"mmcroot=/dev/mmcblk0p3 rootwait rw\0" \
	167	"mmcargs=setenv bootargs console=${console},${baudrate} " \
	168	"root=${mmcroot}\0" \
	169	"loadbootscript=" \
	170	"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
	171	"bootscript=echo Running bootscript from mmc ...; " \
	172	"source\0" \
	173	"loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
6efbe219	174	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
d17087cd OS	175	"mmcboot=echo Booting from mmc ...; " \
d17087cd OS	176	"run mmcargs; " \
6efbe219 OS	177	"if test ${boot_fdt} = yes \|\| test ${boot_fdt} = try; then " \
	178	"if run loadfdt; then " \
	179	"bootm ${loadaddr} - ${fdt_addr}; " \
	180	"else " \
	181	"if test ${boot_fdt} = try; then " \
	182	"bootm; " \
	183	"else " \
	184	"echo WARN: Cannot load the DT; " \
	185	"fi; " \
	186	"fi; " \
	187	"else " \
	188	"bootm; " \
	189	"fi;\0" \
d17087cd OS	190	"netargs=setenv bootargs console=${console},${baudrate} " \
	191	"root=/dev/nfs " \
	192	"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
	193	"netboot=echo Booting from net ...; " \
	194	"run netargs; " \
6efbe219 OS	195	"if test ${ip_dyn} = yes; then " \
	196	"setenv get_cmd dhcp; " \
	197	"else " \
	198	"setenv get_cmd tftp; " \
	199	"fi; " \
	200	"${get_cmd} ${uimage}; " \
	201	"if test ${boot_fdt} = yes \|\| test ${boot_fdt} = try; then " \
	202	"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
	203	"bootm ${loadaddr} - ${fdt_addr}; " \
	204	"else " \
	205	"if test ${boot_fdt} = try; then " \
	206	"bootm; " \
	207	"else " \
	208	"echo WARN: Cannot load the DT; " \
	209	"fi; " \
	210	"fi; " \
	211	"else " \
	212	"bootm; " \
	213	"fi;\0"
bc5833c4 JL	214
bc5833c4 JL	215	#define CONFIG_BOOTCOMMAND \
d17087cd OS	216	"mmc dev ${mmcdev};" \
	217	"mmc dev ${mmcdev}; if mmc rescan; then " \
	218	"if run loadbootscript; then " \
	219	"run bootscript; " \
	220	"else " \
	221	"if run loaduimage; then " \
	222	"run mmcboot; " \
	223	"else run netboot; " \
	224	"fi; " \
	225	"fi; " \
	226	"else run netboot; fi"
bc5833c4 JL	227
	228	#define CONFIG_ARP_TIMEOUT 200UL
	229
	230	/* Miscellaneous configurable options */
	231	#define CONFIG_SYS_LONGHELP
	232	#define CONFIG_SYS_HUSH_PARSER
f5cdc117	233	#define CONFIG_SYS_PROMPT "MX6QSABRELITE U-Boot > "
bc5833c4	234	#define CONFIG_AUTO_COMPLETE
f5cdc117	235	#define CONFIG_SYS_CBSIZE 256
bc5833c4 JL	236
	237	/* Print Buffer Size */
	238	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
f5cdc117	239	#define CONFIG_SYS_MAXARGS 16
bc5833c4 JL	240	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
	241
	242	#define CONFIG_SYS_MEMTEST_START 0x10000000
f5cdc117	243	#define CONFIG_SYS_MEMTEST_END 0x10010000
bc5833c4	244
f5cdc117 WD	245	#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
f5cdc117 WD	246	#define CONFIG_SYS_HZ 1000
bc5833c4 JL	247
bc5833c4 JL	248	#define CONFIG_CMDLINE_EDITING
bc5833c4 JL	249
bc5833c4 JL	250	/* Physical Memory Map */
f5cdc117 WD	251	#define CONFIG_NR_DRAM_BANKS 1
	252	#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
	253	#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
bc5833c4	254
f5cdc117	255	#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
bc5833c4 JL	256	#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
	257	#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
	258
	259	#define CONFIG_SYS_INIT_SP_OFFSET \
	260	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
	261	#define CONFIG_SYS_INIT_SP_ADDR \
	262	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
	263
	264	/* FLASH and environment organization */
	265	#define CONFIG_SYS_NO_FLASH
	266
913b321a EN	267	#define CONFIG_ENV_SIZE (8 * 1024)
913b321a EN	268
bc5833c4	269	#define CONFIG_ENV_IS_IN_MMC
913b321a EN	270	/* #define CONFIG_ENV_IS_IN_SPI_FLASH */
	271
	272	#if defined(CONFIG_ENV_IS_IN_MMC)
	273	#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
	274	#define CONFIG_SYS_MMC_ENV_DEV 0
	275	#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
	276	#define CONFIG_ENV_OFFSET (768 * 1024)
	277	#define CONFIG_ENV_SECT_SIZE (8 * 1024)
	278	#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
	279	#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
	280	#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
	281	#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
	282	#endif
bc5833c4 JL	283
bc5833c4 JL	284	#define CONFIG_OF_LIBFDT
5fbfd1c2	285	#define CONFIG_CMD_BOOTZ
bc5833c4	286
66b4170b EN	287	#ifndef CONFIG_SYS_DCACHE_OFF
	288	#define CONFIG_CMD_CACHE
	289	#endif
	290
f5cdc117	291	#endif /* __CONFIG_H */