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1/*
2 * Copyright (C) 2012 Freescale Semiconductor, Inc.
3 *
4 * Configuration settings for the Freescale i.MX6Q SabreSD board.
5 *
1a459660 6 * SPDX-License-Identifier: GPL-2.0+
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7 */
8
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9#ifndef __MX6QSABRESD_CONFIG_H
10#define __MX6QSABRESD_CONFIG_H
7891e258 11
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12#ifdef CONFIG_SPL
13#define CONFIG_SPL_LIBCOMMON_SUPPORT
14#define CONFIG_SPL_MMC_SUPPORT
15#include "imx6_spl.h"
16#endif
17
7891e258 18#define CONFIG_MACH_TYPE 3980
bcfc7118 19#define CONFIG_MXC_UART_BASE UART1_BASE
51535d9f 20#define CONFIG_CONSOLE_DEV "ttymxc0"
903e779c 21#define CONFIG_MMCROOT "/dev/mmcblk1p2"
7891e258 22
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23#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
24
c1747970 25#include "mx6sabre_common.h"
51535d9f 26
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27#define CONFIG_SYS_FSL_USDHC_NUM 3
28#if defined(CONFIG_ENV_IS_IN_MMC)
acbb4457 29#define CONFIG_SYS_MMC_ENV_DEV 1 /* SDHC3 */
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30#endif
31
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32#define CONFIG_CMD_PCI
33#ifdef CONFIG_CMD_PCI
34#define CONFIG_PCI
35#define CONFIG_PCI_PNP
36#define CONFIG_PCI_SCAN_SHOW
37#define CONFIG_PCIE_IMX
38#define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12)
39#define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(3, 19)
40#endif
41
66ca09fc 42/* I2C Configs */
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43#define CONFIG_SYS_I2C
44#define CONFIG_SYS_I2C_MXC
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45#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
46#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
f8cb101e 47#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
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48#define CONFIG_SYS_I2C_SPEED 100000
49
50/* PMIC */
51#define CONFIG_POWER
52#define CONFIG_POWER_I2C
53#define CONFIG_POWER_PFUZE100
54#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
55
5a3d63c5 56/* USB Configs */
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57#ifdef CONFIG_CMD_USB
58#define CONFIG_USB_EHCI
59#define CONFIG_USB_EHCI_MX6
60#define CONFIG_USB_STORAGE
61#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
62#define CONFIG_USB_HOST_ETHER
63#define CONFIG_USB_ETHER_ASIX
64#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
65#define CONFIG_MXC_USB_FLAGS 0
66#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 /* Enabled USB controller number */
67#endif
68
bcfc7118 69#endif /* __MX6QSABRESD_CONFIG_H */