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7891e258 FE |
1 | /* |
2 | * Copyright (C) 2012 Freescale Semiconductor, Inc. | |
3 | * | |
4 | * Configuration settings for the Freescale i.MX6Q SabreSD board. | |
5 | * | |
1a459660 | 6 | * SPDX-License-Identifier: GPL-2.0+ |
7891e258 FE |
7 | */ |
8 | ||
bcfc7118 FE |
9 | #ifndef __MX6QSABRESD_CONFIG_H |
10 | #define __MX6QSABRESD_CONFIG_H | |
7891e258 | 11 | |
58cc9787 PKS |
12 | #include <asm/arch/imx-regs.h> |
13 | #include <asm/imx-common/gpio.h> | |
14 | ||
1558200a JT |
15 | #ifdef CONFIG_SPL |
16 | #define CONFIG_SPL_LIBCOMMON_SUPPORT | |
17 | #define CONFIG_SPL_MMC_SUPPORT | |
18 | #include "imx6_spl.h" | |
19 | #endif | |
20 | ||
7891e258 | 21 | #define CONFIG_MACH_TYPE 3980 |
bcfc7118 | 22 | #define CONFIG_MXC_UART_BASE UART1_BASE |
51535d9f | 23 | #define CONFIG_CONSOLE_DEV "ttymxc0" |
903e779c | 24 | #define CONFIG_MMCROOT "/dev/mmcblk1p2" |
1d585241 | 25 | #if defined(CONFIG_MX6Q) |
bf0c2245 | 26 | #define CONFIG_DEFAULT_FDT_FILE "imx6q-sabresd.dtb" |
1d585241 FE |
27 | #elif defined(CONFIG_MX6DL) |
28 | #define CONFIG_DEFAULT_FDT_FILE "imx6dl-sabresd.dtb" | |
29 | #endif | |
bcfc7118 | 30 | #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024) |
7891e258 | 31 | |
03ce3302 OS |
32 | #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ |
33 | ||
c1747970 | 34 | #include "mx6sabre_common.h" |
51535d9f | 35 | |
de7d02ae SG |
36 | #define CONFIG_SYS_FSL_USDHC_NUM 3 |
37 | #if defined(CONFIG_ENV_IS_IN_MMC) | |
acbb4457 | 38 | #define CONFIG_SYS_MMC_ENV_DEV 1 /* SDHC3 */ |
de7d02ae SG |
39 | #endif |
40 | ||
e919aa23 MV |
41 | #define CONFIG_CMD_PCI |
42 | #ifdef CONFIG_CMD_PCI | |
43 | #define CONFIG_PCI | |
44 | #define CONFIG_PCI_PNP | |
45 | #define CONFIG_PCI_SCAN_SHOW | |
46 | #define CONFIG_PCIE_IMX | |
47 | #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12) | |
48 | #define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(3, 19) | |
49 | #endif | |
50 | ||
66ca09fc FE |
51 | /* I2C Configs */ |
52 | #define CONFIG_CMD_I2C | |
53 | #define CONFIG_SYS_I2C | |
54 | #define CONFIG_SYS_I2C_MXC | |
f8cb101e | 55 | #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ |
66ca09fc FE |
56 | #define CONFIG_SYS_I2C_SPEED 100000 |
57 | ||
58 | /* PMIC */ | |
59 | #define CONFIG_POWER | |
60 | #define CONFIG_POWER_I2C | |
61 | #define CONFIG_POWER_PFUZE100 | |
62 | #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 | |
63 | ||
5a3d63c5 PF |
64 | /* USB Configs */ |
65 | #define CONFIG_CMD_USB | |
66 | #ifdef CONFIG_CMD_USB | |
67 | #define CONFIG_USB_EHCI | |
68 | #define CONFIG_USB_EHCI_MX6 | |
69 | #define CONFIG_USB_STORAGE | |
70 | #define CONFIG_EHCI_HCD_INIT_AFTER_RESET | |
71 | #define CONFIG_USB_HOST_ETHER | |
72 | #define CONFIG_USB_ETHER_ASIX | |
73 | #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) | |
74 | #define CONFIG_MXC_USB_FLAGS 0 | |
75 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 /* Enabled USB controller number */ | |
76 | #endif | |
77 | ||
bcfc7118 | 78 | #endif /* __MX6QSABRESD_CONFIG_H */ |