[people/ms/u-boot.git] / include / configs / mx6slevk.h

/*
 * Copyright 2013 Freescale Semiconductor, Inc.
 *
 * Configuration settings for the Freescale i.MX6SL EVK board.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __CONFIG_H
#define __CONFIG_H

#include "mx6_common.h"

#ifdef CONFIG_SPL
#define CONFIG_SPL_LIBCOMMON_SUPPORT
#define CONFIG_SPL_MMC_SUPPORT
#define CONFIG_SPL_FAT_SUPPORT
#include "imx6_spl.h"
#endif

#define MACH_TYPE_MX6SLEVK		4307
#define CONFIG_MACH_TYPE		MACH_TYPE_MX6SLEVK

/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN		(3 * SZ_1M)

#define CONFIG_BOARD_EARLY_INIT_F

#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE		UART1_IPS_BASE_ADDR

/* MMC Configs */
#define CONFIG_SYS_FSL_ESDHC_ADDR	USDHC2_BASE_ADDR

/* I2C Configs */
#define CONFIG_CMD_I2C
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED		  100000

/* PMIC */
#define CONFIG_POWER
#define CONFIG_POWER_I2C
#define CONFIG_POWER_PFUZE100
#define CONFIG_POWER_PFUZE100_I2C_ADDR	0x08

#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_MII
#define CONFIG_FEC_MXC
#define CONFIG_MII
#define IMX_FEC_BASE			ENET_BASE_ADDR
#define CONFIG_FEC_XCV_TYPE		RMII
#define CONFIG_ETHPRIME			"FEC"
#define CONFIG_FEC_MXC_PHYADDR		0

#define CONFIG_PHYLIB
#define CONFIG_PHY_SMSC

#define CONFIG_EXTRA_ENV_SETTINGS \
	"script=boot.scr\0" \
	"image=zImage\0" \
	"console=ttymxc0\0" \
	"fdt_high=0xffffffff\0" \
	"initrd_high=0xffffffff\0" \
	"fdt_file=imx6sl-evk.dtb\0" \
	"fdt_addr=0x88000000\0" \
	"boot_fdt=try\0" \
	"ip_dyn=yes\0" \
	"mmcdev=1\0" \
	"mmcpart=1\0" \
	"mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
	"mmcargs=setenv bootargs console=${console},${baudrate} " \
		"root=${mmcroot}\0" \
	"loadbootscript=" \
		"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
	"bootscript=echo Running bootscript from mmc ...; " \
		"source\0" \
	"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
	"mmcboot=echo Booting from mmc ...; " \
		"run mmcargs; " \
		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
			"if run loadfdt; then " \
				"bootz ${loadaddr} - ${fdt_addr}; " \
			"else " \
				"if test ${boot_fdt} = try; then " \
					"bootz; " \
				"else " \
					"echo WARN: Cannot load the DT; " \
				"fi; " \
			"fi; " \
		"else " \
			"bootz; " \
		"fi;\0" \
	"netargs=setenv bootargs console=${console},${baudrate} " \
		"root=/dev/nfs " \
	"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
		"netboot=echo Booting from net ...; " \
		"run netargs; " \
		"if test ${ip_dyn} = yes; then " \
			"setenv get_cmd dhcp; " \
		"else " \
			"setenv get_cmd tftp; " \
		"fi; " \
		"${get_cmd} ${image}; " \
		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
			"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
				"bootz ${loadaddr} - ${fdt_addr}; " \
			"else " \
				"if test ${boot_fdt} = try; then " \
					"bootz; " \
				"else " \
					"echo WARN: Cannot load the DT; " \
				"fi; " \
			"fi; " \
		"else " \
			"bootz; " \
		"fi;\0"

#define CONFIG_BOOTCOMMAND \
	   "mmc dev ${mmcdev};" \
	   "mmc dev ${mmcdev}; if mmc rescan; then " \
		   "if run loadbootscript; then " \
			   "run bootscript; " \
		   "else " \
			   "if run loadimage; then " \
				   "run mmcboot; " \
			   "else run netboot; " \
			   "fi; " \
		   "fi; " \
	   "else run netboot; fi"

/* Miscellaneous configurable options */
#define CONFIG_SYS_MEMTEST_START	0x80000000
#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + SZ_512M)

#define CONFIG_STACKSIZE		SZ_128K

/* Physical Memory Map */
#define CONFIG_NR_DRAM_BANKS		1
#define PHYS_SDRAM			MMDC0_ARB_BASE_ADDR
#define PHYS_SDRAM_SIZE			SZ_1G

#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM
#define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE

#define CONFIG_SYS_INIT_SP_OFFSET \
	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR \
	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)

/* Environment organization */
#define CONFIG_ENV_SIZE			SZ_8K

#if defined CONFIG_SYS_BOOT_SPINOR
#define CONFIG_ENV_IS_IN_SPI_FLASH
#define CONFIG_ENV_OFFSET               (768 * 1024)
#define CONFIG_ENV_SECT_SIZE            (64 * 1024)
#define CONFIG_ENV_SPI_BUS              CONFIG_SF_DEFAULT_BUS
#define CONFIG_ENV_SPI_CS               CONFIG_SF_DEFAULT_CS
#define CONFIG_ENV_SPI_MODE             CONFIG_SF_DEFAULT_MODE
#define CONFIG_ENV_SPI_MAX_HZ           CONFIG_SF_DEFAULT_SPEED
#else
#define CONFIG_ENV_OFFSET		(8 * SZ_64K)
#define CONFIG_ENV_IS_IN_MMC
#endif

#define CONFIG_CMD_SF
#ifdef CONFIG_CMD_SF
#define CONFIG_SPI_FLASH_STMICRO
#define CONFIG_MXC_SPI
#define CONFIG_SF_DEFAULT_BUS		0
#define CONFIG_SF_DEFAULT_CS		0
#define CONFIG_SF_DEFAULT_SPEED		20000000
#define CONFIG_SF_DEFAULT_MODE		SPI_MODE_0
#endif

/* USB Configs */
#define CONFIG_CMD_USB
#ifdef CONFIG_CMD_USB
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_MX6
#define CONFIG_USB_STORAGE
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#define CONFIG_USB_HOST_ETHER
#define CONFIG_USB_ETHER_ASIX
#define CONFIG_MXC_USB_PORTSC		(PORT_PTS_UTMI | PORT_PTS_PTW)
#define CONFIG_MXC_USB_FLAGS		0
#define CONFIG_USB_MAX_CONTROLLER_COUNT	2
#endif

#define CONFIG_SYS_FSL_USDHC_NUM	3
#if defined(CONFIG_ENV_IS_IN_MMC)
#define CONFIG_SYS_MMC_ENV_DEV		1	/* SDHC2*/
#endif

#define CONFIG_IMX6_THERMAL

#endif				/* __CONFIG_H */
Commit	Line	Data
57ca432f FE	1	/*
	2	* Copyright 2013 Freescale Semiconductor, Inc.
	3	*
	4	* Configuration settings for the Freescale i.MX6SL EVK board.
	5	*
1a459660	6	* SPDX-License-Identifier: GPL-2.0+
57ca432f FE	7	*/
	8
	9	#ifndef __CONFIG_H
	10	#define __CONFIG_H
	11
a6bbee66	12	#include "mx6_common.h"
57ca432f	13
e7d3b21b PF	14	#ifdef CONFIG_SPL
	15	#define CONFIG_SPL_LIBCOMMON_SUPPORT
	16	#define CONFIG_SPL_MMC_SUPPORT
	17	#define CONFIG_SPL_FAT_SUPPORT
	18	#include "imx6_spl.h"
	19	#endif
	20
57ca432f FE	21	#define MACH_TYPE_MX6SLEVK 4307
	22	#define CONFIG_MACH_TYPE MACH_TYPE_MX6SLEVK
	23
57ca432f FE	24	/* Size of malloc() pool */
	25	#define CONFIG_SYS_MALLOC_LEN (3 * SZ_1M)
	26
	27	#define CONFIG_BOARD_EARLY_INIT_F
57ca432f FE	28
	29	#define CONFIG_MXC_UART
	30	#define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR
	31
	32	/* MMC Configs */
08129d61	33	#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
57ca432f	34
c8200905 PF	35	/* I2C Configs */
	36	#define CONFIG_CMD_I2C
	37	#define CONFIG_SYS_I2C
	38	#define CONFIG_SYS_I2C_MXC
f8cb101e	39	#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
c8200905 PF	40	#define CONFIG_SYS_I2C_SPEED 100000
	41
	42	/* PMIC */
	43	#define CONFIG_POWER
	44	#define CONFIG_POWER_I2C
	45	#define CONFIG_POWER_PFUZE100
	46	#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
	47
31f07964 FE	48	#define CONFIG_CMD_PING
	49	#define CONFIG_CMD_DHCP
	50	#define CONFIG_CMD_MII
31f07964 FE	51	#define CONFIG_FEC_MXC
	52	#define CONFIG_MII
	53	#define IMX_FEC_BASE ENET_BASE_ADDR
	54	#define CONFIG_FEC_XCV_TYPE RMII
	55	#define CONFIG_ETHPRIME "FEC"
	56	#define CONFIG_FEC_MXC_PHYADDR 0
	57
	58	#define CONFIG_PHYLIB
	59	#define CONFIG_PHY_SMSC
	60
57ca432f FE	61	#define CONFIG_EXTRA_ENV_SETTINGS \
57ca432f FE	62	"script=boot.scr\0" \
8e184a53	63	"image=zImage\0" \
57ca432f FE	64	"console=ttymxc0\0" \
	65	"fdt_high=0xffffffff\0" \
	66	"initrd_high=0xffffffff\0" \
	67	"fdt_file=imx6sl-evk.dtb\0" \
6fc049be	68	"fdt_addr=0x88000000\0" \
57ca432f FE	69	"boot_fdt=try\0" \
57ca432f FE	70	"ip_dyn=yes\0" \
adc5a667	71	"mmcdev=1\0" \
94aeb8a6 OS	72	"mmcpart=1\0" \
94aeb8a6 OS	73	"mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
57ca432f FE	74	"mmcargs=setenv bootargs console=${console},${baudrate} " \
	75	"root=${mmcroot}\0" \
	76	"loadbootscript=" \
	77	"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
	78	"bootscript=echo Running bootscript from mmc ...; " \
	79	"source\0" \
8e184a53	80	"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
57ca432f FE	81	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
	82	"mmcboot=echo Booting from mmc ...; " \
	83	"run mmcargs; " \
	84	"if test ${boot_fdt} = yes \|\| test ${boot_fdt} = try; then " \
	85	"if run loadfdt; then " \
8e184a53	86	"bootz ${loadaddr} - ${fdt_addr}; " \
57ca432f FE	87	"else " \
57ca432f FE	88	"if test ${boot_fdt} = try; then " \
8e184a53	89	"bootz; " \
57ca432f FE	90	"else " \
	91	"echo WARN: Cannot load the DT; " \
	92	"fi; " \
	93	"fi; " \
	94	"else " \
8e184a53	95	"bootz; " \
57ca432f FE	96	"fi;\0" \
	97	"netargs=setenv bootargs console=${console},${baudrate} " \
	98	"root=/dev/nfs " \
	99	"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
	100	"netboot=echo Booting from net ...; " \
	101	"run netargs; " \
	102	"if test ${ip_dyn} = yes; then " \
	103	"setenv get_cmd dhcp; " \
	104	"else " \
	105	"setenv get_cmd tftp; " \
	106	"fi; " \
8e184a53	107	"${get_cmd} ${image}; " \
57ca432f FE	108	"if test ${boot_fdt} = yes \|\| test ${boot_fdt} = try; then " \
57ca432f FE	109	"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
8e184a53	110	"bootz ${loadaddr} - ${fdt_addr}; " \
57ca432f FE	111	"else " \
57ca432f FE	112	"if test ${boot_fdt} = try; then " \
8e184a53	113	"bootz; " \
57ca432f FE	114	"else " \
	115	"echo WARN: Cannot load the DT; " \
	116	"fi; " \
	117	"fi; " \
	118	"else " \
8e184a53	119	"bootz; " \
57ca432f FE	120	"fi;\0"
	121
	122	#define CONFIG_BOOTCOMMAND \
	123	"mmc dev ${mmcdev};" \
	124	"mmc dev ${mmcdev}; if mmc rescan; then " \
	125	"if run loadbootscript; then " \
	126	"run bootscript; " \
	127	"else " \
8e184a53	128	"if run loadimage; then " \
57ca432f FE	129	"run mmcboot; " \
	130	"else run netboot; " \
	131	"fi; " \
	132	"fi; " \
	133	"else run netboot; fi"
	134
	135	/* Miscellaneous configurable options */
57ca432f FE	136	#define CONFIG_SYS_MEMTEST_START 0x80000000
	137	#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + SZ_512M)
	138
57ca432f FE	139	#define CONFIG_STACKSIZE SZ_128K
	140
	141	/* Physical Memory Map */
	142	#define CONFIG_NR_DRAM_BANKS 1
	143	#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
	144	#define PHYS_SDRAM_SIZE SZ_1G
	145
	146	#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
	147	#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
	148	#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
	149
	150	#define CONFIG_SYS_INIT_SP_OFFSET \
	151	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
	152	#define CONFIG_SYS_INIT_SP_ADDR \
	153	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
	154
056845c2	155	/* Environment organization */
57ca432f	156	#define CONFIG_ENV_SIZE SZ_8K
be2fde60 PF	157
	158	#if defined CONFIG_SYS_BOOT_SPINOR
	159	#define CONFIG_ENV_IS_IN_SPI_FLASH
	160	#define CONFIG_ENV_OFFSET (768 * 1024)
	161	#define CONFIG_ENV_SECT_SIZE (64 * 1024)
	162	#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
	163	#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
	164	#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
	165	#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
	166	#else
0da040bf	167	#define CONFIG_ENV_OFFSET (8 * SZ_64K)
57ca432f	168	#define CONFIG_ENV_IS_IN_MMC
be2fde60	169	#endif
57ca432f	170
694c3bc1 FE	171	#define CONFIG_CMD_SF
694c3bc1 FE	172	#ifdef CONFIG_CMD_SF
694c3bc1 FE	173	#define CONFIG_SPI_FLASH_STMICRO
	174	#define CONFIG_MXC_SPI
	175	#define CONFIG_SF_DEFAULT_BUS 0
155fa9af	176	#define CONFIG_SF_DEFAULT_CS 0
694c3bc1 FE	177	#define CONFIG_SF_DEFAULT_SPEED 20000000
	178	#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
	179	#endif
	180
3b9c1a5d PF	181	/* USB Configs */
	182	#define CONFIG_CMD_USB
	183	#ifdef CONFIG_CMD_USB
	184	#define CONFIG_USB_EHCI
	185	#define CONFIG_USB_EHCI_MX6
	186	#define CONFIG_USB_STORAGE
	187	#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
	188	#define CONFIG_USB_HOST_ETHER
	189	#define CONFIG_USB_ETHER_ASIX
	190	#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI \| PORT_PTS_PTW)
	191	#define CONFIG_MXC_USB_FLAGS 0
	192	#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
	193	#endif
	194
36255d67 YL	195	#define CONFIG_SYS_FSL_USDHC_NUM 3
	196	#if defined(CONFIG_ENV_IS_IN_MMC)
	197	#define CONFIG_SYS_MMC_ENV_DEV 1 /* SDHC2*/
	198	#endif
	199
27d36080 PF	200	#define CONFIG_IMX6_THERMAL
27d36080 PF	201
57ca432f	202	#endif /* __CONFIG_H */