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57ca432f FE |
1 | /* |
2 | * Copyright 2013 Freescale Semiconductor, Inc. | |
3 | * | |
4 | * Configuration settings for the Freescale i.MX6SL EVK board. | |
5 | * | |
1a459660 | 6 | * SPDX-License-Identifier: GPL-2.0+ |
57ca432f FE |
7 | */ |
8 | ||
9 | #ifndef __CONFIG_H | |
10 | #define __CONFIG_H | |
11 | ||
12 | #include <asm/arch/imx-regs.h> | |
694c3bc1 | 13 | #include <asm/imx-common/gpio.h> |
1ace4022 | 14 | #include <linux/sizes.h> |
a6bbee66 | 15 | #include "mx6_common.h" |
57ca432f FE |
16 | |
17 | #define CONFIG_MX6 | |
18 | #define CONFIG_DISPLAY_CPUINFO | |
19 | #define CONFIG_DISPLAY_BOARDINFO | |
20 | ||
21 | #define MACH_TYPE_MX6SLEVK 4307 | |
22 | #define CONFIG_MACH_TYPE MACH_TYPE_MX6SLEVK | |
23 | ||
24 | #define CONFIG_CMDLINE_TAG | |
25 | #define CONFIG_SETUP_MEMORY_TAGS | |
26 | #define CONFIG_INITRD_TAG | |
27 | #define CONFIG_REVISION_TAG | |
28 | ||
4c97f169 YL |
29 | #define CONFIG_SYS_GENERIC_BOARD |
30 | ||
57ca432f FE |
31 | /* Size of malloc() pool */ |
32 | #define CONFIG_SYS_MALLOC_LEN (3 * SZ_1M) | |
33 | ||
34 | #define CONFIG_BOARD_EARLY_INIT_F | |
35 | #define CONFIG_MXC_GPIO | |
36 | ||
37 | #define CONFIG_MXC_UART | |
38 | #define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR | |
39 | ||
40 | /* MMC Configs */ | |
41 | #define CONFIG_FSL_ESDHC | |
42 | #define CONFIG_FSL_USDHC | |
08129d61 | 43 | #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR |
57ca432f FE |
44 | |
45 | #define CONFIG_MMC | |
46 | #define CONFIG_CMD_MMC | |
47 | #define CONFIG_GENERIC_MMC | |
48 | #define CONFIG_CMD_FAT | |
49 | #define CONFIG_DOS_PARTITION | |
50 | ||
c8200905 PF |
51 | /* I2C Configs */ |
52 | #define CONFIG_CMD_I2C | |
53 | #define CONFIG_SYS_I2C | |
54 | #define CONFIG_SYS_I2C_MXC | |
f8cb101e | 55 | #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ |
c8200905 PF |
56 | #define CONFIG_SYS_I2C_SPEED 100000 |
57 | ||
58 | /* PMIC */ | |
59 | #define CONFIG_POWER | |
60 | #define CONFIG_POWER_I2C | |
61 | #define CONFIG_POWER_PFUZE100 | |
62 | #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 | |
63 | ||
31f07964 FE |
64 | #define CONFIG_CMD_PING |
65 | #define CONFIG_CMD_DHCP | |
66 | #define CONFIG_CMD_MII | |
67 | #define CONFIG_CMD_NET | |
68 | #define CONFIG_FEC_MXC | |
69 | #define CONFIG_MII | |
70 | #define IMX_FEC_BASE ENET_BASE_ADDR | |
71 | #define CONFIG_FEC_XCV_TYPE RMII | |
72 | #define CONFIG_ETHPRIME "FEC" | |
73 | #define CONFIG_FEC_MXC_PHYADDR 0 | |
74 | ||
75 | #define CONFIG_PHYLIB | |
76 | #define CONFIG_PHY_SMSC | |
77 | ||
57ca432f FE |
78 | /* allow to overwrite serial and ethaddr */ |
79 | #define CONFIG_ENV_OVERWRITE | |
80 | #define CONFIG_CONS_INDEX 1 | |
81 | #define CONFIG_BAUDRATE 115200 | |
82 | ||
83 | /* Command definition */ | |
84 | #include <config_cmd_default.h> | |
85 | ||
86 | #undef CONFIG_CMD_IMLS | |
87 | ||
88 | #define CONFIG_BOOTDELAY 3 | |
89 | ||
af0a37ff | 90 | #define CONFIG_LOADADDR 0x82000000 |
57ca432f FE |
91 | #define CONFIG_SYS_TEXT_BASE 0x87800000 |
92 | ||
93 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
94 | "script=boot.scr\0" \ | |
8e184a53 | 95 | "image=zImage\0" \ |
57ca432f FE |
96 | "console=ttymxc0\0" \ |
97 | "fdt_high=0xffffffff\0" \ | |
98 | "initrd_high=0xffffffff\0" \ | |
99 | "fdt_file=imx6sl-evk.dtb\0" \ | |
6fc049be | 100 | "fdt_addr=0x88000000\0" \ |
57ca432f FE |
101 | "boot_fdt=try\0" \ |
102 | "ip_dyn=yes\0" \ | |
adc5a667 | 103 | "mmcdev=1\0" \ |
94aeb8a6 OS |
104 | "mmcpart=1\0" \ |
105 | "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \ | |
57ca432f FE |
106 | "mmcargs=setenv bootargs console=${console},${baudrate} " \ |
107 | "root=${mmcroot}\0" \ | |
108 | "loadbootscript=" \ | |
109 | "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ | |
110 | "bootscript=echo Running bootscript from mmc ...; " \ | |
111 | "source\0" \ | |
8e184a53 | 112 | "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ |
57ca432f FE |
113 | "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ |
114 | "mmcboot=echo Booting from mmc ...; " \ | |
115 | "run mmcargs; " \ | |
116 | "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ | |
117 | "if run loadfdt; then " \ | |
8e184a53 | 118 | "bootz ${loadaddr} - ${fdt_addr}; " \ |
57ca432f FE |
119 | "else " \ |
120 | "if test ${boot_fdt} = try; then " \ | |
8e184a53 | 121 | "bootz; " \ |
57ca432f FE |
122 | "else " \ |
123 | "echo WARN: Cannot load the DT; " \ | |
124 | "fi; " \ | |
125 | "fi; " \ | |
126 | "else " \ | |
8e184a53 | 127 | "bootz; " \ |
57ca432f FE |
128 | "fi;\0" \ |
129 | "netargs=setenv bootargs console=${console},${baudrate} " \ | |
130 | "root=/dev/nfs " \ | |
131 | "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ | |
132 | "netboot=echo Booting from net ...; " \ | |
133 | "run netargs; " \ | |
134 | "if test ${ip_dyn} = yes; then " \ | |
135 | "setenv get_cmd dhcp; " \ | |
136 | "else " \ | |
137 | "setenv get_cmd tftp; " \ | |
138 | "fi; " \ | |
8e184a53 | 139 | "${get_cmd} ${image}; " \ |
57ca432f FE |
140 | "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ |
141 | "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ | |
8e184a53 | 142 | "bootz ${loadaddr} - ${fdt_addr}; " \ |
57ca432f FE |
143 | "else " \ |
144 | "if test ${boot_fdt} = try; then " \ | |
8e184a53 | 145 | "bootz; " \ |
57ca432f FE |
146 | "else " \ |
147 | "echo WARN: Cannot load the DT; " \ | |
148 | "fi; " \ | |
149 | "fi; " \ | |
150 | "else " \ | |
8e184a53 | 151 | "bootz; " \ |
57ca432f FE |
152 | "fi;\0" |
153 | ||
154 | #define CONFIG_BOOTCOMMAND \ | |
155 | "mmc dev ${mmcdev};" \ | |
156 | "mmc dev ${mmcdev}; if mmc rescan; then " \ | |
157 | "if run loadbootscript; then " \ | |
158 | "run bootscript; " \ | |
159 | "else " \ | |
8e184a53 | 160 | "if run loadimage; then " \ |
57ca432f FE |
161 | "run mmcboot; " \ |
162 | "else run netboot; " \ | |
163 | "fi; " \ | |
164 | "fi; " \ | |
165 | "else run netboot; fi" | |
166 | ||
167 | /* Miscellaneous configurable options */ | |
168 | #define CONFIG_SYS_LONGHELP | |
169 | #define CONFIG_SYS_HUSH_PARSER | |
57ca432f FE |
170 | #define CONFIG_AUTO_COMPLETE |
171 | #define CONFIG_SYS_CBSIZE 256 | |
172 | ||
57ca432f FE |
173 | #define CONFIG_SYS_MAXARGS 16 |
174 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE | |
175 | ||
176 | #define CONFIG_SYS_MEMTEST_START 0x80000000 | |
177 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + SZ_512M) | |
178 | ||
179 | #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR | |
57ca432f FE |
180 | |
181 | #define CONFIG_CMDLINE_EDITING | |
182 | #define CONFIG_STACKSIZE SZ_128K | |
183 | ||
184 | /* Physical Memory Map */ | |
185 | #define CONFIG_NR_DRAM_BANKS 1 | |
186 | #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR | |
187 | #define PHYS_SDRAM_SIZE SZ_1G | |
188 | ||
189 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM | |
190 | #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR | |
191 | #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE | |
192 | ||
193 | #define CONFIG_SYS_INIT_SP_OFFSET \ | |
194 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) | |
195 | #define CONFIG_SYS_INIT_SP_ADDR \ | |
196 | (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) | |
197 | ||
198 | /* FLASH and environment organization */ | |
199 | #define CONFIG_SYS_NO_FLASH | |
200 | ||
57ca432f | 201 | #define CONFIG_ENV_SIZE SZ_8K |
be2fde60 PF |
202 | |
203 | #if defined CONFIG_SYS_BOOT_SPINOR | |
204 | #define CONFIG_ENV_IS_IN_SPI_FLASH | |
205 | #define CONFIG_ENV_OFFSET (768 * 1024) | |
206 | #define CONFIG_ENV_SECT_SIZE (64 * 1024) | |
207 | #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS | |
208 | #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS | |
209 | #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE | |
210 | #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED | |
211 | #else | |
0da040bf | 212 | #define CONFIG_ENV_OFFSET (8 * SZ_64K) |
57ca432f | 213 | #define CONFIG_ENV_IS_IN_MMC |
be2fde60 | 214 | #endif |
57ca432f FE |
215 | |
216 | #define CONFIG_OF_LIBFDT | |
217 | #define CONFIG_CMD_BOOTZ | |
218 | ||
219 | #ifndef CONFIG_SYS_DCACHE_OFF | |
220 | #define CONFIG_CMD_CACHE | |
221 | #endif | |
222 | ||
694c3bc1 FE |
223 | #define CONFIG_CMD_SF |
224 | #ifdef CONFIG_CMD_SF | |
225 | #define CONFIG_SPI_FLASH | |
226 | #define CONFIG_SPI_FLASH_STMICRO | |
227 | #define CONFIG_MXC_SPI | |
228 | #define CONFIG_SF_DEFAULT_BUS 0 | |
155fa9af | 229 | #define CONFIG_SF_DEFAULT_CS 0 |
694c3bc1 FE |
230 | #define CONFIG_SF_DEFAULT_SPEED 20000000 |
231 | #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 | |
232 | #endif | |
233 | ||
3b9c1a5d PF |
234 | /* USB Configs */ |
235 | #define CONFIG_CMD_USB | |
236 | #ifdef CONFIG_CMD_USB | |
237 | #define CONFIG_USB_EHCI | |
238 | #define CONFIG_USB_EHCI_MX6 | |
239 | #define CONFIG_USB_STORAGE | |
240 | #define CONFIG_EHCI_HCD_INIT_AFTER_RESET | |
241 | #define CONFIG_USB_HOST_ETHER | |
242 | #define CONFIG_USB_ETHER_ASIX | |
243 | #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) | |
244 | #define CONFIG_MXC_USB_FLAGS 0 | |
245 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 | |
246 | #endif | |
247 | ||
36255d67 YL |
248 | #define CONFIG_SYS_FSL_USDHC_NUM 3 |
249 | #if defined(CONFIG_ENV_IS_IN_MMC) | |
250 | #define CONFIG_SYS_MMC_ENV_DEV 1 /* SDHC2*/ | |
251 | #endif | |
252 | ||
27d36080 PF |
253 | #define CONFIG_IMX6_THERMAL |
254 | ||
255 | #define CONFIG_CMD_FUSE | |
256 | #if defined(CONFIG_CMD_FUSE) || defined(CONFIG_IMX6_THERMAL) | |
257 | #define CONFIG_MXC_OCOTP | |
258 | #endif | |
259 | ||
57ca432f | 260 | #endif /* __CONFIG_H */ |