]> git.ipfire.org Git - people/ms/u-boot.git/blame - include/configs/mx6slevk.h
Merge branch 'master' of git://git.denx.de/u-boot-arm
[people/ms/u-boot.git] / include / configs / mx6slevk.h
CommitLineData
57ca432f
FE
1/*
2 * Copyright 2013 Freescale Semiconductor, Inc.
3 *
4 * Configuration settings for the Freescale i.MX6SL EVK board.
5 *
1a459660 6 * SPDX-License-Identifier: GPL-2.0+
57ca432f
FE
7 */
8
9#ifndef __CONFIG_H
10#define __CONFIG_H
11
12#include <asm/arch/imx-regs.h>
694c3bc1 13#include <asm/imx-common/gpio.h>
1ace4022 14#include <linux/sizes.h>
a6bbee66 15#include "mx6_common.h"
57ca432f
FE
16
17#define CONFIG_MX6
18#define CONFIG_DISPLAY_CPUINFO
19#define CONFIG_DISPLAY_BOARDINFO
20
21#define MACH_TYPE_MX6SLEVK 4307
22#define CONFIG_MACH_TYPE MACH_TYPE_MX6SLEVK
23
24#define CONFIG_CMDLINE_TAG
25#define CONFIG_SETUP_MEMORY_TAGS
26#define CONFIG_INITRD_TAG
27#define CONFIG_REVISION_TAG
28
4c97f169
YL
29#define CONFIG_SYS_GENERIC_BOARD
30
57ca432f
FE
31/* Size of malloc() pool */
32#define CONFIG_SYS_MALLOC_LEN (3 * SZ_1M)
33
34#define CONFIG_BOARD_EARLY_INIT_F
35#define CONFIG_MXC_GPIO
36
37#define CONFIG_MXC_UART
38#define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR
39
40/* MMC Configs */
41#define CONFIG_FSL_ESDHC
42#define CONFIG_FSL_USDHC
08129d61 43#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
57ca432f
FE
44
45#define CONFIG_MMC
46#define CONFIG_CMD_MMC
47#define CONFIG_GENERIC_MMC
48#define CONFIG_CMD_FAT
49#define CONFIG_DOS_PARTITION
50
31f07964
FE
51#define CONFIG_CMD_PING
52#define CONFIG_CMD_DHCP
53#define CONFIG_CMD_MII
54#define CONFIG_CMD_NET
55#define CONFIG_FEC_MXC
56#define CONFIG_MII
57#define IMX_FEC_BASE ENET_BASE_ADDR
58#define CONFIG_FEC_XCV_TYPE RMII
59#define CONFIG_ETHPRIME "FEC"
60#define CONFIG_FEC_MXC_PHYADDR 0
61
62#define CONFIG_PHYLIB
63#define CONFIG_PHY_SMSC
64
57ca432f
FE
65/* allow to overwrite serial and ethaddr */
66#define CONFIG_ENV_OVERWRITE
67#define CONFIG_CONS_INDEX 1
68#define CONFIG_BAUDRATE 115200
69
70/* Command definition */
71#include <config_cmd_default.h>
72
73#undef CONFIG_CMD_IMLS
74
75#define CONFIG_BOOTDELAY 3
76
af0a37ff 77#define CONFIG_LOADADDR 0x82000000
57ca432f
FE
78#define CONFIG_SYS_TEXT_BASE 0x87800000
79
80#define CONFIG_EXTRA_ENV_SETTINGS \
81 "script=boot.scr\0" \
8e184a53 82 "image=zImage\0" \
57ca432f
FE
83 "console=ttymxc0\0" \
84 "fdt_high=0xffffffff\0" \
85 "initrd_high=0xffffffff\0" \
86 "fdt_file=imx6sl-evk.dtb\0" \
6fc049be 87 "fdt_addr=0x88000000\0" \
57ca432f
FE
88 "boot_fdt=try\0" \
89 "ip_dyn=yes\0" \
adc5a667 90 "mmcdev=1\0" \
94aeb8a6
OS
91 "mmcpart=1\0" \
92 "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
57ca432f
FE
93 "mmcargs=setenv bootargs console=${console},${baudrate} " \
94 "root=${mmcroot}\0" \
95 "loadbootscript=" \
96 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
97 "bootscript=echo Running bootscript from mmc ...; " \
98 "source\0" \
8e184a53 99 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
57ca432f
FE
100 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
101 "mmcboot=echo Booting from mmc ...; " \
102 "run mmcargs; " \
103 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
104 "if run loadfdt; then " \
8e184a53 105 "bootz ${loadaddr} - ${fdt_addr}; " \
57ca432f
FE
106 "else " \
107 "if test ${boot_fdt} = try; then " \
8e184a53 108 "bootz; " \
57ca432f
FE
109 "else " \
110 "echo WARN: Cannot load the DT; " \
111 "fi; " \
112 "fi; " \
113 "else " \
8e184a53 114 "bootz; " \
57ca432f
FE
115 "fi;\0" \
116 "netargs=setenv bootargs console=${console},${baudrate} " \
117 "root=/dev/nfs " \
118 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
119 "netboot=echo Booting from net ...; " \
120 "run netargs; " \
121 "if test ${ip_dyn} = yes; then " \
122 "setenv get_cmd dhcp; " \
123 "else " \
124 "setenv get_cmd tftp; " \
125 "fi; " \
8e184a53 126 "${get_cmd} ${image}; " \
57ca432f
FE
127 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
128 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
8e184a53 129 "bootz ${loadaddr} - ${fdt_addr}; " \
57ca432f
FE
130 "else " \
131 "if test ${boot_fdt} = try; then " \
8e184a53 132 "bootz; " \
57ca432f
FE
133 "else " \
134 "echo WARN: Cannot load the DT; " \
135 "fi; " \
136 "fi; " \
137 "else " \
8e184a53 138 "bootz; " \
57ca432f
FE
139 "fi;\0"
140
141#define CONFIG_BOOTCOMMAND \
142 "mmc dev ${mmcdev};" \
143 "mmc dev ${mmcdev}; if mmc rescan; then " \
144 "if run loadbootscript; then " \
145 "run bootscript; " \
146 "else " \
8e184a53 147 "if run loadimage; then " \
57ca432f
FE
148 "run mmcboot; " \
149 "else run netboot; " \
150 "fi; " \
151 "fi; " \
152 "else run netboot; fi"
153
154/* Miscellaneous configurable options */
155#define CONFIG_SYS_LONGHELP
156#define CONFIG_SYS_HUSH_PARSER
57ca432f
FE
157#define CONFIG_AUTO_COMPLETE
158#define CONFIG_SYS_CBSIZE 256
159
160/* Print Buffer Size */
161#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
162#define CONFIG_SYS_MAXARGS 16
163#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
164
165#define CONFIG_SYS_MEMTEST_START 0x80000000
166#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + SZ_512M)
167
168#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
57ca432f
FE
169
170#define CONFIG_CMDLINE_EDITING
171#define CONFIG_STACKSIZE SZ_128K
172
173/* Physical Memory Map */
174#define CONFIG_NR_DRAM_BANKS 1
175#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
176#define PHYS_SDRAM_SIZE SZ_1G
177
178#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
179#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
180#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
181
182#define CONFIG_SYS_INIT_SP_OFFSET \
183 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
184#define CONFIG_SYS_INIT_SP_ADDR \
185 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
186
187/* FLASH and environment organization */
188#define CONFIG_SYS_NO_FLASH
189
190#define CONFIG_ENV_OFFSET (6 * SZ_64K)
191#define CONFIG_ENV_SIZE SZ_8K
192#define CONFIG_ENV_IS_IN_MMC
57ca432f
FE
193
194#define CONFIG_OF_LIBFDT
195#define CONFIG_CMD_BOOTZ
196
197#ifndef CONFIG_SYS_DCACHE_OFF
198#define CONFIG_CMD_CACHE
199#endif
200
694c3bc1
FE
201#define CONFIG_CMD_SF
202#ifdef CONFIG_CMD_SF
203#define CONFIG_SPI_FLASH
204#define CONFIG_SPI_FLASH_STMICRO
205#define CONFIG_MXC_SPI
206#define CONFIG_SF_DEFAULT_BUS 0
155fa9af 207#define CONFIG_SF_DEFAULT_CS 0
694c3bc1
FE
208#define CONFIG_SF_DEFAULT_SPEED 20000000
209#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
210#endif
211
36255d67
YL
212#define CONFIG_SYS_FSL_USDHC_NUM 3
213#if defined(CONFIG_ENV_IS_IN_MMC)
214#define CONFIG_SYS_MMC_ENV_DEV 1 /* SDHC2*/
215#endif
216
57ca432f 217#endif /* __CONFIG_H */