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14a16131 FE |
1 | /* |
2 | * Copyright 2014 Freescale Semiconductor, Inc. | |
3 | * | |
4 | * Configuration settings for the Freescale i.MX6SX Sabresd board. | |
5 | * | |
6 | * SPDX-License-Identifier: GPL-2.0+ | |
7 | */ | |
8 | ||
14a16131 FE |
9 | #ifndef __CONFIG_H |
10 | #define __CONFIG_H | |
11 | ||
14a16131 FE |
12 | #include "mx6_common.h" |
13 | ||
71abf19b | 14 | #ifdef CONFIG_SPL |
71abf19b PF |
15 | #include "imx6_spl.h" |
16 | #endif | |
17 | ||
14a16131 FE |
18 | /* Size of malloc() pool */ |
19 | #define CONFIG_SYS_MALLOC_LEN (3 * SZ_1M) | |
20 | ||
14a16131 FE |
21 | #define CONFIG_MXC_UART |
22 | #define CONFIG_MXC_UART_BASE UART1_BASE | |
23 | ||
3fe0b104 PF |
24 | #ifdef CONFIG_IMX_BOOTAUX |
25 | /* Set to QSPI2 B flash at default */ | |
26 | #define CONFIG_SYS_AUXCORE_BOOTDATA 0x78000000 | |
3fe0b104 PF |
27 | |
28 | #define UPDATE_M4_ENV \ | |
29 | "m4image=m4_qspi.bin\0" \ | |
30 | "loadm4image=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4image}\0" \ | |
31 | "update_m4_from_sd=" \ | |
32 | "if sf probe 1:0; then " \ | |
33 | "if run loadm4image; then " \ | |
34 | "setexpr fw_sz ${filesize} + 0xffff; " \ | |
35 | "setexpr fw_sz ${fw_sz} / 0x10000; " \ | |
36 | "setexpr fw_sz ${fw_sz} * 0x10000; " \ | |
37 | "sf erase 0x0 ${fw_sz}; " \ | |
38 | "sf write ${loadaddr} 0x0 ${filesize}; " \ | |
39 | "fi; " \ | |
40 | "fi\0" \ | |
41 | "m4boot=sf probe 1:0; bootaux "__stringify(CONFIG_SYS_AUXCORE_BOOTDATA)"\0" | |
42 | #else | |
43 | #define UPDATE_M4_ENV "" | |
44 | #endif | |
45 | ||
14a16131 | 46 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
3fe0b104 | 47 | UPDATE_M4_ENV \ |
14a16131 FE |
48 | "script=boot.scr\0" \ |
49 | "image=zImage\0" \ | |
50 | "console=ttymxc0\0" \ | |
51 | "fdt_high=0xffffffff\0" \ | |
52 | "initrd_high=0xffffffff\0" \ | |
53 | "fdt_file=imx6sx-sdb.dtb\0" \ | |
54 | "fdt_addr=0x88000000\0" \ | |
55 | "boot_fdt=try\0" \ | |
56 | "ip_dyn=yes\0" \ | |
85eb0952 | 57 | "videomode=video=ctfb:x:800,y:480,depth:24,pclk:29850,le:89,ri:164,up:23,lo:10,hs:10,vs:10,sync:0,vmode:0\0" \ |
d0fbca2a | 58 | "mmcdev=2\0" \ |
14a16131 FE |
59 | "mmcpart=1\0" \ |
60 | "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \ | |
61 | "mmcargs=setenv bootargs console=${console},${baudrate} " \ | |
62 | "root=${mmcroot}\0" \ | |
63 | "loadbootscript=" \ | |
64 | "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ | |
65 | "bootscript=echo Running bootscript from mmc ...; " \ | |
66 | "source\0" \ | |
67 | "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ | |
68 | "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ | |
69 | "mmcboot=echo Booting from mmc ...; " \ | |
70 | "run mmcargs; " \ | |
71 | "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ | |
72 | "if run loadfdt; then " \ | |
73 | "bootz ${loadaddr} - ${fdt_addr}; " \ | |
74 | "else " \ | |
75 | "if test ${boot_fdt} = try; then " \ | |
76 | "bootz; " \ | |
77 | "else " \ | |
78 | "echo WARN: Cannot load the DT; " \ | |
79 | "fi; " \ | |
80 | "fi; " \ | |
81 | "else " \ | |
82 | "bootz; " \ | |
83 | "fi;\0" \ | |
84 | "netargs=setenv bootargs console=${console},${baudrate} " \ | |
85 | "root=/dev/nfs " \ | |
86 | "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ | |
87 | "netboot=echo Booting from net ...; " \ | |
88 | "run netargs; " \ | |
89 | "if test ${ip_dyn} = yes; then " \ | |
90 | "setenv get_cmd dhcp; " \ | |
91 | "else " \ | |
92 | "setenv get_cmd tftp; " \ | |
93 | "fi; " \ | |
94 | "${get_cmd} ${image}; " \ | |
95 | "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ | |
96 | "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ | |
97 | "bootz ${loadaddr} - ${fdt_addr}; " \ | |
98 | "else " \ | |
99 | "if test ${boot_fdt} = try; then " \ | |
100 | "bootz; " \ | |
101 | "else " \ | |
102 | "echo WARN: Cannot load the DT; " \ | |
103 | "fi; " \ | |
104 | "fi; " \ | |
105 | "else " \ | |
106 | "bootz; " \ | |
107 | "fi;\0" | |
108 | ||
109 | #define CONFIG_BOOTCOMMAND \ | |
110 | "mmc dev ${mmcdev};" \ | |
111 | "mmc dev ${mmcdev}; if mmc rescan; then " \ | |
112 | "if run loadbootscript; then " \ | |
113 | "run bootscript; " \ | |
114 | "else " \ | |
115 | "if run loadimage; then " \ | |
116 | "run mmcboot; " \ | |
117 | "else run netboot; " \ | |
118 | "fi; " \ | |
119 | "fi; " \ | |
120 | "else run netboot; fi" | |
121 | ||
122 | /* Miscellaneous configurable options */ | |
14a16131 FE |
123 | #define CONFIG_SYS_MEMTEST_START 0x80000000 |
124 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x10000) | |
125 | ||
14a16131 FE |
126 | /* Physical Memory Map */ |
127 | #define CONFIG_NR_DRAM_BANKS 1 | |
128 | #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR | |
14a16131 FE |
129 | |
130 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM | |
131 | #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR | |
132 | #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE | |
133 | ||
134 | #define CONFIG_SYS_INIT_SP_OFFSET \ | |
135 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) | |
136 | #define CONFIG_SYS_INIT_SP_ADDR \ | |
137 | (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) | |
138 | ||
139 | /* MMC Configuration */ | |
152adee1 | 140 | #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC4_BASE_ADDR |
14a16131 | 141 | |
fa8cf317 | 142 | /* I2C Configs */ |
fa8cf317 FE |
143 | #define CONFIG_SYS_I2C |
144 | #define CONFIG_SYS_I2C_MXC | |
03544c66 AA |
145 | #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ |
146 | #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ | |
f8cb101e | 147 | #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ |
fa8cf317 FE |
148 | #define CONFIG_SYS_I2C_SPEED 100000 |
149 | ||
150 | /* PMIC */ | |
151 | #define CONFIG_POWER | |
152 | #define CONFIG_POWER_I2C | |
153 | #define CONFIG_POWER_PFUZE100 | |
154 | #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 | |
155 | ||
d145878d | 156 | /* Network */ |
d145878d FE |
157 | #define CONFIG_FEC_MXC |
158 | #define CONFIG_MII | |
159 | ||
160 | #define IMX_FEC_BASE ENET_BASE_ADDR | |
161 | #define CONFIG_FEC_MXC_PHYADDR 0x1 | |
162 | ||
163 | #define CONFIG_FEC_XCV_TYPE RGMII | |
164 | #define CONFIG_ETHPRIME "FEC" | |
165 | ||
d145878d FE |
166 | #define CONFIG_PHY_ATHEROS |
167 | ||
a511a3e0 | 168 | #ifdef CONFIG_CMD_USB |
a511a3e0 PF |
169 | #define CONFIG_EHCI_HCD_INIT_AFTER_RESET |
170 | #define CONFIG_USB_HOST_ETHER | |
171 | #define CONFIG_USB_ETHER_ASIX | |
172 | #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) | |
173 | #define CONFIG_MXC_USB_FLAGS 0 | |
174 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 | |
175 | #endif | |
176 | ||
c860eed1 FE |
177 | #define CONFIG_CMD_PCI |
178 | #ifdef CONFIG_CMD_PCI | |
c860eed1 FE |
179 | #define CONFIG_PCI_SCAN_SHOW |
180 | #define CONFIG_PCIE_IMX | |
fb6f86c4 FE |
181 | #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(2, 0) |
182 | #define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(2, 1) | |
c860eed1 FE |
183 | #endif |
184 | ||
1368f993 | 185 | #define CONFIG_IMX_THERMAL |
4b16fd22 | 186 | |
fad7d735 | 187 | #ifdef CONFIG_FSL_QSPI |
fad7d735 | 188 | #define CONFIG_SYS_FSL_QSPI_LE |
adc0fabf | 189 | #define CONFIG_SYS_FSL_QSPI_AHB |
d87cbecc | 190 | #ifdef CONFIG_MX6SX_SABRESD_REVA |
fad7d735 | 191 | #define FSL_QSPI_FLASH_SIZE SZ_16M |
d87cbecc PF |
192 | #else |
193 | #define FSL_QSPI_FLASH_SIZE SZ_32M | |
194 | #endif | |
fad7d735 PF |
195 | #define FSL_QSPI_FLASH_NUM 2 |
196 | #endif | |
197 | ||
85eb0952 | 198 | #ifndef CONFIG_SPL_BUILD |
85eb0952 | 199 | #ifdef CONFIG_VIDEO |
85eb0952 YL |
200 | #define CONFIG_VIDEO_MXS |
201 | #define CONFIG_VIDEO_LOGO | |
85eb0952 YL |
202 | #define CONFIG_SPLASH_SCREEN |
203 | #define CONFIG_SPLASH_SCREEN_ALIGN | |
85eb0952 YL |
204 | #define CONFIG_BMP_16BPP |
205 | #define CONFIG_VIDEO_BMP_RLE8 | |
206 | #define CONFIG_VIDEO_BMP_LOGO | |
207 | #define MXS_LCDIF_BASE MX6SX_LCDIF1_BASE_ADDR | |
208 | #endif | |
209 | #endif | |
210 | ||
0da040bf | 211 | #define CONFIG_ENV_OFFSET (8 * SZ_64K) |
14a16131 | 212 | #define CONFIG_ENV_SIZE SZ_8K |
14a16131 | 213 | |
d0fbca2a YL |
214 | #define CONFIG_SYS_FSL_USDHC_NUM 3 |
215 | #if defined(CONFIG_ENV_IS_IN_MMC) | |
216 | #define CONFIG_SYS_MMC_ENV_DEV 2 /*USDHC4*/ | |
217 | #endif | |
218 | ||
14a16131 | 219 | #endif /* __CONFIG_H */ |