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ed407be5 PR |
1 | /* |
2 | * (C) Copyright 2011-2012 | |
3 | * Pali Rohár <pali.rohar@gmail.com> | |
4 | * | |
5 | * (C) Copyright 2010 | |
6 | * Alistair Buxton <a.j.buxton@gmail.com> | |
7 | * | |
8 | * Derived from Beagle Board code: | |
9 | * (C) Copyright 2006-2008 | |
10 | * Texas Instruments. | |
11 | * Richard Woodruff <r-woodruff2@ti.com> | |
12 | * Syed Mohammed Khasim <x0khasim@ti.com> | |
13 | * | |
14 | * Configuration settings for the Nokia RX-51 aka N900. | |
15 | * | |
3765b3e7 | 16 | * SPDX-License-Identifier: GPL-2.0+ |
ed407be5 PR |
17 | */ |
18 | ||
19 | #ifndef __CONFIG_H | |
20 | #define __CONFIG_H | |
21 | ||
22 | /* | |
23 | * High Level Configuration Options | |
24 | */ | |
ed407be5 PR |
25 | #define CONFIG_SYS_L2CACHE_OFF /* pretend there is no L2 CACHE */ |
26 | ||
27 | #define CONFIG_MACH_TYPE MACH_TYPE_NOKIA_RX51 | |
28 | ||
29 | /* | |
30 | * Nokia X-Loader loading secondary image to address 0x80400000 | |
31 | * NOLO loading boot image to random place, so it doesn't really | |
32 | * matter what we set this to. We have to copy u-boot to this address | |
33 | */ | |
34 | #define CONFIG_SYS_TEXT_BASE 0x80008000 | |
35 | ||
36 | #define CONFIG_SDRC /* The chip has SDRC controller */ | |
37 | ||
38 | #include <asm/arch/cpu.h> /* get chip and board defs */ | |
987ec585 | 39 | #include <asm/arch/omap.h> |
ed407be5 PR |
40 | #include <asm/arch/mem.h> |
41 | #include <linux/stringify.h> | |
42 | ||
ed407be5 PR |
43 | /* Clock Defines */ |
44 | #define V_OSCK 26000000 /* Clock output from T2 */ | |
45 | #define V_SCLK (V_OSCK >> 1) | |
46 | ||
ed407be5 PR |
47 | #define CONFIG_MISC_INIT_R |
48 | #define CONFIG_SKIP_LOWLEVEL_INIT /* X-Loader set everything up */ | |
49 | ||
50 | #define CONFIG_CMDLINE_TAG /* enable passing kernel command line string */ | |
51 | #define CONFIG_INITRD_TAG /* enable passing initrd */ | |
52 | #define CONFIG_REVISION_TAG /* enable passing revision tag*/ | |
53 | #define CONFIG_SETUP_MEMORY_TAGS /* enable memory tag */ | |
54 | ||
55 | /* | |
56 | * Size of malloc() pool | |
57 | */ | |
58 | #define CONFIG_ENV_SIZE (128 << 10) | |
59 | #define CONFIG_UBI_SIZE (512 << 10) | |
60 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + CONFIG_UBI_SIZE + \ | |
61 | (128 << 10)) | |
62 | ||
63 | /* | |
64 | * Hardware drivers | |
65 | */ | |
66 | ||
67 | /* | |
68 | * NS16550 Configuration | |
69 | */ | |
70 | #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ | |
71 | ||
ed407be5 PR |
72 | #define CONFIG_SYS_NS16550_SERIAL |
73 | #define CONFIG_SYS_NS16550_REG_SIZE (-4) | |
74 | #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK | |
75 | ||
76 | /* | |
77 | * select serial console configuration | |
78 | */ | |
79 | #define CONFIG_CONS_INDEX 3 | |
80 | #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 | |
81 | #define CONFIG_SERIAL3 3 /* UART3 on RX-51 */ | |
82 | ||
83 | /* allow to overwrite serial and ethaddr */ | |
84 | #define CONFIG_ENV_OVERWRITE | |
ed407be5 | 85 | #define CONFIG_SYS_BAUDRATE_TABLE { 4800, 9600, 19200, 38400, 57600, 115200 } |
ed407be5 PR |
86 | |
87 | /* USB */ | |
95de1e2f PK |
88 | #define CONFIG_USB_MUSB_UDC |
89 | #define CONFIG_USB_MUSB_HCD | |
ed407be5 PR |
90 | #define CONFIG_USB_OMAP3 |
91 | #define CONFIG_TWL4030_USB | |
92 | ||
93 | /* USB device configuration */ | |
94 | #define CONFIG_USB_DEVICE | |
95 | #define CONFIG_USBD_VENDORID 0x0421 | |
96 | #define CONFIG_USBD_PRODUCTID 0x01c8 | |
97 | #define CONFIG_USBD_MANUFACTURER "Nokia" | |
98 | #define CONFIG_USBD_PRODUCT_NAME "N900" | |
99 | ||
ed407be5 | 100 | /* commands to include */ |
ed407be5 PR |
101 | |
102 | #define CONFIG_CMDLINE_EDITING /* add command line history */ | |
103 | #define CONFIG_AUTO_COMPLETE /* add autocompletion support */ | |
104 | ||
6789e84e HS |
105 | #define CONFIG_SYS_I2C |
106 | #define CONFIG_SYS_OMAP24_I2C_SPEED 100000 | |
107 | #define CONFIG_SYS_OMAP24_I2C_SLAVE 1 | |
ed407be5 PR |
108 | |
109 | /* | |
110 | * TWL4030 | |
111 | */ | |
ed407be5 PR |
112 | #define CONFIG_TWL4030_LED |
113 | #define CONFIG_TWL4030_KEYPAD | |
114 | ||
ed407be5 PR |
115 | #define GPIO_SLIDE 71 |
116 | ||
117 | /* | |
118 | * Board ONENAND Info. | |
119 | */ | |
120 | ||
121 | #define PART1_NAME "bootloader" | |
122 | #define PART1_SIZE 128 | |
123 | #define PART1_MULL 1024 | |
124 | #define PART1_SUFF "k" | |
125 | #define PART1_OFFS 0x00000000 | |
126 | #define PART1_MASK 0x00000003 | |
127 | ||
128 | #define PART2_NAME "config" | |
129 | #define PART2_SIZE 384 | |
130 | #define PART2_MULL 1024 | |
131 | #define PART2_SUFF "k" | |
132 | #define PART2_OFFS 0x00020000 | |
133 | #define PART2_MASK 0x00000000 | |
134 | ||
135 | #define PART3_NAME "log" | |
136 | #define PART3_SIZE 256 | |
137 | #define PART3_MULL 1024 | |
138 | #define PART3_SUFF "k" | |
139 | #define PART3_OFFS 0x00080000 | |
140 | #define PART3_MASK 0x00000000 | |
141 | ||
142 | #define PART4_NAME "kernel" | |
143 | #define PART4_SIZE 2 | |
144 | #define PART4_MULL 1024*1024 | |
145 | #define PART4_SUFF "m" | |
146 | #define PART4_OFFS 0x000c0000 | |
147 | #define PART4_MASK 0x00000000 | |
148 | ||
149 | #define PART5_NAME "initfs" | |
150 | #define PART5_SIZE 2 | |
151 | #define PART5_MULL 1024*1024 | |
152 | #define PART5_SUFF "m" | |
153 | #define PART5_OFFS 0x002c0000 | |
154 | #define PART5_MASK 0x00000000 | |
155 | ||
156 | #define PART6_NAME "rootfs" | |
157 | #define PART6_SIZE 257280 | |
158 | #define PART6_MULL 1024 | |
159 | #define PART6_SUFF "k" | |
160 | #define PART6_OFFS 0x004c0000 | |
161 | #define PART6_MASK 0x00000000 | |
162 | ||
163 | #ifdef ONENAND_SUPPORT | |
164 | ||
ed407be5 PR |
165 | #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP |
166 | #define CONFIG_MTD_DEVICE | |
167 | #define CONFIG_MTD_PARTITIONS | |
168 | ||
ed407be5 PR |
169 | #define MTDIDS_DEFAULT "onenand0=onenand" |
170 | #define MTDPARTS_DEFAULT "mtdparts=onenand:" \ | |
171 | __stringify(PART1_SIZE) PART1_SUFF "(" PART1_NAME ")ro," \ | |
172 | __stringify(PART2_SIZE) PART2_SUFF "(" PART2_NAME ")," \ | |
173 | __stringify(PART3_SIZE) PART3_SUFF "(" PART3_NAME ")," \ | |
174 | __stringify(PART4_SIZE) PART4_SUFF "(" PART4_NAME ")," \ | |
175 | __stringify(PART5_SIZE) PART5_SUFF "(" PART5_NAME ")," \ | |
176 | "-(" PART6_NAME ")" | |
177 | ||
178 | #endif | |
179 | ||
180 | /* Watchdog support */ | |
181 | #define CONFIG_HW_WATCHDOG | |
182 | ||
183 | /* | |
184 | * Framebuffer | |
185 | */ | |
186 | /* Video console */ | |
ed407be5 PR |
187 | #define CONFIG_VIDEO_LOGO |
188 | #define VIDEO_FB_16BPP_PIXEL_SWAP | |
189 | #define VIDEO_FB_16BPP_WORD_SWAP | |
ed407be5 PR |
190 | #define CONFIG_SPLASH_SCREEN |
191 | ||
192 | /* functions for cfb_console */ | |
193 | #define VIDEO_KBD_INIT_FCT rx51_kp_init() | |
194 | #define VIDEO_TSTC_FCT rx51_kp_tstc | |
195 | #define VIDEO_GETC_FCT rx51_kp_getc | |
196 | #ifndef __ASSEMBLY__ | |
709ea543 | 197 | struct stdio_dev; |
ed407be5 | 198 | int rx51_kp_init(void); |
709ea543 SG |
199 | int rx51_kp_tstc(struct stdio_dev *sdev); |
200 | int rx51_kp_getc(struct stdio_dev *sdev); | |
ed407be5 PR |
201 | #endif |
202 | ||
203 | #ifndef MTDPARTS_DEFAULT | |
204 | #define MTDPARTS_DEFAULT | |
205 | #endif | |
206 | ||
207 | /* Environment information */ | |
ed407be5 PR |
208 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
209 | "mtdparts=" MTDPARTS_DEFAULT "\0" \ | |
210 | "usbtty=cdc_acm\0" \ | |
211 | "stdin=vga\0" \ | |
212 | "stdout=vga\0" \ | |
213 | "stderr=vga\0" \ | |
214 | "setcon=setenv stdin ${con};" \ | |
215 | "setenv stdout ${con};" \ | |
216 | "setenv stderr ${con}\0" \ | |
217 | "sercon=setenv con serial; run setcon\0" \ | |
218 | "usbcon=setenv con usbtty; run setcon\0" \ | |
219 | "vgacon=setenv con vga; run setcon\0" \ | |
220 | "slide=gpio input " __stringify(GPIO_SLIDE) "\0" \ | |
221 | "switchmmc=mmc dev ${mmcnum}\0" \ | |
222 | "kernaddr=0x82008000\0" \ | |
223 | "initrdaddr=0x84008000\0" \ | |
224 | "scriptaddr=0x86008000\0" \ | |
225 | "fileload=${mmctype}load mmc ${mmcnum}:${mmcpart} " \ | |
226 | "${loadaddr} ${mmcfile}\0" \ | |
227 | "kernload=setenv loadaddr ${kernaddr};" \ | |
228 | "setenv mmcfile ${mmckernfile};" \ | |
229 | "run fileload\0" \ | |
230 | "initrdload=setenv loadaddr ${initrdaddr};" \ | |
231 | "setenv mmcfile ${mmcinitrdfile};" \ | |
232 | "run fileload\0" \ | |
233 | "scriptload=setenv loadaddr ${scriptaddr};" \ | |
234 | "setenv mmcfile ${mmcscriptfile};" \ | |
235 | "run fileload\0" \ | |
236 | "scriptboot=echo Running ${mmcscriptfile} from mmc " \ | |
237 | "${mmcnum}:${mmcpart} ...; source ${scriptaddr}\0" \ | |
238 | "kernboot=echo Booting ${mmckernfile} from mmc " \ | |
239 | "${mmcnum}:${mmcpart} ...; bootm ${kernaddr}\0" \ | |
240 | "kerninitrdboot=echo Booting ${mmckernfile} ${mmcinitrdfile} from mmc "\ | |
241 | "${mmcnum}:${mmcpart} ...; bootm ${kernaddr} ${initrdaddr}\0" \ | |
242 | "attachboot=echo Booting attached kernel image ...;" \ | |
243 | "setenv setup_omap_atag 1;" \ | |
244 | "bootm ${attkernaddr};" \ | |
245 | "setenv setup_omap_atag\0" \ | |
246 | "trymmcscriptboot=if run switchmmc; then " \ | |
247 | "if run scriptload; then " \ | |
248 | "run scriptboot;" \ | |
249 | "fi;" \ | |
250 | "fi\0" \ | |
251 | "trymmckernboot=if run switchmmc; then " \ | |
252 | "if run kernload; then " \ | |
253 | "run kernboot;" \ | |
254 | "fi;" \ | |
255 | "fi\0" \ | |
256 | "trymmckerninitrdboot=if run switchmmc; then " \ | |
257 | "if run initrdload; then " \ | |
258 | "if run kernload; then " \ | |
259 | "run kerninitrdboot;" \ | |
260 | "fi;" \ | |
261 | "fi; " \ | |
262 | "fi\0" \ | |
263 | "trymmcpartboot=setenv mmcscriptfile boot.scr; run trymmcscriptboot;" \ | |
264 | "setenv mmckernfile uImage; run trymmckernboot\0" \ | |
265 | "trymmcallpartboot=setenv mmcpart 1; run trymmcpartboot;" \ | |
266 | "setenv mmcpart 2; run trymmcpartboot;" \ | |
267 | "setenv mmcpart 3; run trymmcpartboot;" \ | |
268 | "setenv mmcpart 4; run trymmcpartboot\0" \ | |
269 | "trymmcboot=if run switchmmc; then " \ | |
270 | "setenv mmctype fat;" \ | |
271 | "run trymmcallpartboot;" \ | |
272 | "setenv mmctype ext2;" \ | |
273 | "run trymmcallpartboot;" \ | |
274 | "setenv mmctype ext4;" \ | |
275 | "run trymmcallpartboot;" \ | |
276 | "fi\0" \ | |
277 | "emmcboot=setenv mmcnum 1; run trymmcboot\0" \ | |
278 | "sdboot=setenv mmcnum 0; run trymmcboot\0" \ | |
d9993988 PR |
279 | "menucmd=bootmenu\0" \ |
280 | "bootmenu_0=Attached kernel=run attachboot\0" \ | |
281 | "bootmenu_1=Internal eMMC=run emmcboot\0" \ | |
282 | "bootmenu_2=External SD card=run sdboot\0" \ | |
283 | "bootmenu_3=U-Boot boot order=boot\0" \ | |
284 | "bootmenu_delay=30\0" \ | |
ed407be5 PR |
285 | "" |
286 | ||
287 | #define CONFIG_PREBOOT \ | |
d9993988 PR |
288 | "setenv mmcnum 1; setenv mmcpart 1;" \ |
289 | "setenv mmcscriptfile bootmenu.scr;" \ | |
290 | "if run switchmmc; then " \ | |
291 | "setenv mmcdone true;" \ | |
292 | "setenv mmctype fat;" \ | |
293 | "if run scriptload; then true; else " \ | |
294 | "setenv mmctype ext2;" \ | |
295 | "if run scriptload; then true; else " \ | |
296 | "setenv mmctype ext4;" \ | |
297 | "if run scriptload; then true; else " \ | |
298 | "setenv mmcdone false;" \ | |
299 | "fi;" \ | |
300 | "fi;" \ | |
301 | "fi;" \ | |
302 | "if ${mmcdone}; then " \ | |
303 | "run scriptboot;" \ | |
304 | "fi;" \ | |
305 | "fi;" \ | |
306 | "if run slide; then true; else " \ | |
307 | "setenv bootmenu_delay 0;" \ | |
308 | "setenv bootdelay 0;" \ | |
309 | "fi" | |
310 | ||
311 | #define CONFIG_POSTBOOTMENU \ | |
312 | "echo;" \ | |
ed407be5 PR |
313 | "echo Extra commands:;" \ |
314 | "echo run sercon - Use serial port for control.;" \ | |
315 | "echo run usbcon - Use usbtty for control.;" \ | |
316 | "echo run vgacon - Use framebuffer/keyboard.;" \ | |
317 | "echo run sdboot - Boot from SD card slot.;" \ | |
318 | "echo run emmcboot - Boot internal eMMC memory.;" \ | |
319 | "echo run attachboot - Boot attached kernel image.;" \ | |
320 | "echo" | |
321 | ||
322 | #define CONFIG_BOOTCOMMAND \ | |
323 | "run sdboot;" \ | |
324 | "run emmcboot;" \ | |
325 | "run attachboot;" \ | |
326 | "echo" | |
327 | ||
d9993988 PR |
328 | #define CONFIG_MENU_SHOW |
329 | ||
ed407be5 PR |
330 | /* |
331 | * Miscellaneous configurable options | |
332 | */ | |
333 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ | |
ed407be5 PR |
334 | /* Boot Argument Buffer Size */ |
335 | #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) | |
336 | ||
337 | #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) | |
338 | #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + 0x01F00000)/*31MB*/ | |
339 | ||
340 | /* default load address */ | |
341 | #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) | |
342 | ||
343 | /* | |
344 | * OMAP3 has 12 GP timers, they can be driven by the system clock | |
345 | * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). | |
346 | * This rate is divided by a local divisor. | |
347 | */ | |
348 | #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) | |
349 | #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ | |
ed407be5 | 350 | |
ed407be5 PR |
351 | /* |
352 | * Physical Memory Map | |
353 | */ | |
354 | #define CONFIG_NR_DRAM_BANKS 2 | |
355 | #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 | |
356 | ||
357 | /* | |
358 | * FLASH and environment organization | |
359 | */ | |
360 | ||
ed407be5 PR |
361 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 |
362 | #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 | |
363 | #define CONFIG_SYS_INIT_RAM_SIZE 0x800 | |
364 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ | |
365 | CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) | |
366 | ||
367 | /* | |
368 | * Attached kernel image | |
369 | */ | |
370 | ||
371 | #define SDRAM_SIZE 0x10000000 /* 256 MB */ | |
372 | #define SDRAM_END (CONFIG_SYS_SDRAM_BASE + SDRAM_SIZE) | |
373 | ||
374 | #define IMAGE_MAXSIZE 0x1FF800 /* 2 MB - 2 kB */ | |
375 | #define KERNEL_OFFSET 0x40000 /* 256 kB */ | |
376 | #define KERNEL_MAXSIZE (IMAGE_MAXSIZE-KERNEL_OFFSET) | |
377 | #define KERNEL_ADDRESS (SDRAM_END-KERNEL_MAXSIZE) | |
378 | ||
379 | /* Reserve protected RAM for attached kernel */ | |
380 | #define CONFIG_PRAM ((KERNEL_MAXSIZE >> 10)+1) | |
381 | ||
382 | #endif /* __CONFIG_H */ |