[thirdparty/u-boot.git] / include / configs / nokia_rx51.h

/* SPDX-License-Identifier: GPL-2.0+ */
/*
 * (C) Copyright 2011-2012
 * Pali Rohár <pali.rohar@gmail.com>
 *
 * (C) Copyright 2010
 * Alistair Buxton <a.j.buxton@gmail.com>
 *
 * Derived from Beagle Board code:
 * (C) Copyright 2006-2008
 * Texas Instruments.
 * Richard Woodruff <r-woodruff2@ti.com>
 * Syed Mohammed Khasim <x0khasim@ti.com>
 *
 * Configuration settings for the Nokia RX-51 aka N900.
 */

#ifndef __CONFIG_H
#define __CONFIG_H

/*
 * High Level Configuration Options
 */
#define CONFIG_SYS_L2CACHE_OFF		/* pretend there is no L2 CACHE */

#define CONFIG_MACH_TYPE		MACH_TYPE_NOKIA_RX51

/*
 * Nokia X-Loader loading secondary image to address 0x80400000
 * NOLO loading boot image to random place, so it doesn't really
 * matter what we set this to. We have to copy u-boot to this address
 */

#include <asm/arch/cpu.h>		/* get chip and board defs */
#include <asm/arch/omap.h>
#include <asm/arch/mem.h>
#include <linux/stringify.h>

/* Clock Defines */
#define V_OSCK			26000000	/* Clock output from T2 */
#define V_SCLK			(V_OSCK >> 1)

#define CONFIG_SKIP_LOWLEVEL_INIT		/* X-Loader set everything up */

#define CONFIG_CMDLINE_TAG	/* enable passing kernel command line string */
#define CONFIG_INITRD_TAG			/* enable passing initrd */
#define CONFIG_REVISION_TAG			/* enable passing revision tag*/
#define CONFIG_SETUP_MEMORY_TAGS		/* enable memory tag */

/*
 * Size of malloc() pool
 */
#define CONFIG_UBI_SIZE			(512 << 10)
#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + CONFIG_UBI_SIZE + \
					(128 << 10))

/*
 * Hardware drivers
 */

/*
 * NS16550 Configuration
 */
#define V_NS16550_CLK		48000000		/* 48MHz (APLL96/2) */

#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE	(-4)
#define CONFIG_SYS_NS16550_CLK		V_NS16550_CLK

/*
 * select serial console configuration
 */
#define CONFIG_SYS_NS16550_COM3		OMAP34XX_UART3

/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_SYS_BAUDRATE_TABLE { 4800, 9600, 19200, 38400, 57600, 115200 }

/* USB device configuration */
#define CONFIG_USB_DEVICE
#define CONFIG_USBD_VENDORID		0x0421
#define CONFIG_USBD_PRODUCTID		0x01c8
#define CONFIG_USBD_MANUFACTURER	"Nokia"
#define CONFIG_USBD_PRODUCT_NAME	"N900"

/* commands to include */

#define CONFIG_SYS_I2C

/*
 * TWL4030
 */

#define GPIO_SLIDE			71

/*
 * Board ONENAND Info.
 */

#define PART1_NAME			"bootloader"
#define PART1_SIZE			128
#define PART1_MULL			1024
#define PART1_SUFF			"k"
#define PART1_OFFS			0x00000000
#define PART1_MASK			0x00000003

#define PART2_NAME			"config"
#define PART2_SIZE			384
#define PART2_MULL			1024
#define PART2_SUFF			"k"
#define PART2_OFFS			0x00020000
#define PART2_MASK			0x00000000

#define PART3_NAME			"log"
#define PART3_SIZE			256
#define PART3_MULL			1024
#define PART3_SUFF			"k"
#define PART3_OFFS			0x00080000
#define PART3_MASK			0x00000000

#define PART4_NAME			"kernel"
#define PART4_SIZE			2
#define PART4_MULL			1024*1024
#define PART4_SUFF			"m"
#define PART4_OFFS			0x000c0000
#define PART4_MASK			0x00000000

#define PART5_NAME			"initfs"
#define PART5_SIZE			2
#define PART5_MULL			1024*1024
#define PART5_SUFF			"m"
#define PART5_OFFS			0x002c0000
#define PART5_MASK			0x00000000

#define PART6_NAME			"rootfs"
#define PART6_SIZE			257280
#define PART6_MULL			1024
#define PART6_SUFF			"k"
#define PART6_OFFS			0x004c0000
#define PART6_MASK			0x00000000

#ifdef ONENAND_SUPPORT

#define CONFIG_SYS_ONENAND_BASE		ONENAND_MAP

#endif

/* Watchdog support */
#define CONFIG_HW_WATCHDOG

/*
 * Framebuffer
 */
/* Video console */
#define CONFIG_VIDEO_LOGO
#define VIDEO_FB_16BPP_PIXEL_SWAP
#define VIDEO_FB_16BPP_WORD_SWAP
#define CONFIG_SPLASH_SCREEN

/* functions for cfb_console */
#define VIDEO_KBD_INIT_FCT		rx51_kp_init()
#define VIDEO_TSTC_FCT			rx51_kp_tstc
#define VIDEO_GETC_FCT			rx51_kp_getc
#ifndef __ASSEMBLY__
struct stdio_dev;
int rx51_kp_init(void);
int rx51_kp_tstc(struct stdio_dev *sdev);
int rx51_kp_getc(struct stdio_dev *sdev);
#endif

/* Environment information */
#ifdef CONFIG_MTDPARTS_DEFAULT
#define MTDPARTS "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0"
#else
#define MTDPARTS
#endif
#define CONFIG_EXTRA_ENV_SETTINGS \
	MTDPARTS \
	"usbtty=cdc_acm\0" \
	"stdin=vga\0" \
	"stdout=vga\0" \
	"stderr=vga\0" \
	"setcon=setenv stdin ${con};" \
		"setenv stdout ${con};" \
		"setenv stderr ${con}\0" \
	"sercon=setenv con serial; run setcon\0" \
	"usbcon=setenv con usbtty; run setcon\0" \
	"vgacon=setenv con vga; run setcon\0" \
	"slide=gpio input " __stringify(GPIO_SLIDE) "\0" \
	"switchmmc=mmc dev ${mmcnum}\0" \
	"kernaddr=0x82008000\0" \
	"initrdaddr=0x84008000\0" \
	"scriptaddr=0x86008000\0" \
	"fileload=${mmctype}load mmc ${mmcnum}:${mmcpart} " \
		"${loadaddr} ${mmcfile}\0" \
	"kernload=setenv loadaddr ${kernaddr};" \
		"setenv mmcfile ${mmckernfile};" \
		"run fileload\0" \
	"initrdload=setenv loadaddr ${initrdaddr};" \
		"setenv mmcfile ${mmcinitrdfile};" \
		"run fileload\0" \
	"scriptload=setenv loadaddr ${scriptaddr};" \
		"setenv mmcfile ${mmcscriptfile};" \
		"run fileload\0" \
	"scriptboot=echo Running ${mmcscriptfile} from mmc " \
		"${mmcnum}:${mmcpart} ...; source ${scriptaddr}\0" \
	"kernboot=echo Booting ${mmckernfile} from mmc " \
		"${mmcnum}:${mmcpart} ...; bootm ${kernaddr}\0" \
	"kerninitrdboot=echo Booting ${mmckernfile} ${mmcinitrdfile} from mmc "\
		"${mmcnum}:${mmcpart} ...; bootm ${kernaddr} ${initrdaddr}\0" \
	"attachboot=echo Booting attached kernel image ...;" \
		"setenv setup_omap_atag 1;" \
		"bootm ${attkernaddr};" \
		"setenv setup_omap_atag\0" \
	"trymmcscriptboot=if run switchmmc; then " \
			"if run scriptload; then " \
				"run scriptboot;" \
			"fi;" \
		"fi\0" \
	"trymmckernboot=if run switchmmc; then " \
			"if run kernload; then " \
				"run kernboot;" \
			"fi;" \
		"fi\0" \
	"trymmckerninitrdboot=if run switchmmc; then " \
			"if run initrdload; then " \
				"if run kernload; then " \
					"run kerninitrdboot;" \
				"fi;" \
			"fi; " \
		"fi\0" \
	"trymmcpartboot=setenv mmcscriptfile boot.scr; run trymmcscriptboot;" \
		"setenv mmckernfile uImage; run trymmckernboot\0" \
	"trymmcallpartboot=setenv mmcpart 1; run trymmcpartboot;" \
		"setenv mmcpart 2; run trymmcpartboot;" \
		"setenv mmcpart 3; run trymmcpartboot;" \
		"setenv mmcpart 4; run trymmcpartboot\0" \
	"trymmcboot=if run switchmmc; then " \
			"setenv mmctype fat;" \
			"run trymmcallpartboot;" \
			"setenv mmctype ext2;" \
			"run trymmcallpartboot;" \
			"setenv mmctype ext4;" \
			"run trymmcallpartboot;" \
		"fi\0" \
	"emmcboot=setenv mmcnum 1; run trymmcboot\0" \
	"sdboot=setenv mmcnum 0; run trymmcboot\0" \
	"menucmd=bootmenu\0" \
	"bootmenu_0=Attached kernel=run attachboot\0" \
	"bootmenu_1=Internal eMMC=run emmcboot\0" \
	"bootmenu_2=External SD card=run sdboot\0" \
	"bootmenu_3=U-Boot boot order=boot\0" \
	"bootmenu_delay=30\0" \
	""

#define CONFIG_POSTBOOTMENU \
	"echo;" \
	"echo Extra commands:;" \
	"echo run sercon - Use serial port for control.;" \
	"echo run usbcon - Use usbtty for control.;" \
	"echo run vgacon - Use framebuffer/keyboard.;" \
	"echo run sdboot - Boot from SD card slot.;" \
	"echo run emmcboot - Boot internal eMMC memory.;" \
	"echo run attachboot - Boot attached kernel image.;" \
	"echo"

#define CONFIG_BOOTCOMMAND \
	"run sdboot;" \
	"run emmcboot;" \
	"run attachboot;" \
	"echo"

#define CONFIG_MENU_SHOW

/*
 * Miscellaneous configurable options
 */

#define CONFIG_SYS_MEMTEST_START	(OMAP34XX_SDRC_CS0)
#define CONFIG_SYS_MEMTEST_END		(OMAP34XX_SDRC_CS0 + 0x01F00000)/*31MB*/

/* default load address */
#define CONFIG_SYS_LOAD_ADDR		(OMAP34XX_SDRC_CS0)

/*
 * OMAP3 has 12 GP timers, they can be driven by the system clock
 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
 * This rate is divided by a local divisor.
 */
#define CONFIG_SYS_TIMERBASE		(OMAP34XX_GPT2)
#define CONFIG_SYS_PTV			2	/* Divisor: 2^(PTV+1) => 8 */

/*
 * Physical Memory Map
 */
#define PHYS_SDRAM_1			OMAP34XX_SDRC_CS0

/*
 * FLASH and environment organization
 */

#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
#define CONFIG_SYS_INIT_RAM_ADDR	0x4020f800
#define CONFIG_SYS_INIT_RAM_SIZE	0x800
#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
			CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)

/*
 * Attached kernel image
 */

#define SDRAM_SIZE			0x10000000	/* 256 MB */
#define SDRAM_END			(CONFIG_SYS_SDRAM_BASE + SDRAM_SIZE)

#define IMAGE_MAXSIZE			0x1FF800	/* 2 MB - 2 kB */
#define KERNEL_OFFSET			0x40000		/* 256 kB */
#define KERNEL_MAXSIZE			(IMAGE_MAXSIZE-KERNEL_OFFSET)
#define KERNEL_ADDRESS			(SDRAM_END-KERNEL_MAXSIZE)

/* Reserve protected RAM for attached kernel */
#define CONFIG_PRAM			((KERNEL_MAXSIZE >> 10)+1)

#endif /* __CONFIG_H */
Commit	Line	Data
83d290c5	1	/* SPDX-License-Identifier: GPL-2.0+ */
ed407be5 T	2	/*
	3	* (C) Copyright 2011-2012
	4	* Pali Rohár <pali.rohar@gmail.com>
	5	*
	6	* (C) Copyright 2010
	7	* Alistair Buxton <a.j.buxton@gmail.com>
	8	*
	9	* Derived from Beagle Board code:
	10	* (C) Copyright 2006-2008
	11	* Texas Instruments.
	12	* Richard Woodruff <r-woodruff2@ti.com>
	13	* Syed Mohammed Khasim <x0khasim@ti.com>
	14	*
	15	* Configuration settings for the Nokia RX-51 aka N900.
ed407be5 T	16	*/
	17
	18	#ifndef __CONFIG_H
	19	#define __CONFIG_H
	20
	21	/*
	22	* High Level Configuration Options
	23	*/
ed407be5 T	24	#define CONFIG_SYS_L2CACHE_OFF /* pretend there is no L2 CACHE */
	25
	26	#define CONFIG_MACH_TYPE MACH_TYPE_NOKIA_RX51
	27
	28	/*
	29	* Nokia X-Loader loading secondary image to address 0x80400000
	30	* NOLO loading boot image to random place, so it doesn't really
	31	* matter what we set this to. We have to copy u-boot to this address
	32	*/
ed407be5	33
ed407be5	34	#include <asm/arch/cpu.h> /* get chip and board defs */
987ec585	35	#include <asm/arch/omap.h>
ed407be5 T	36	#include <asm/arch/mem.h>
	37	#include <linux/stringify.h>
	38
ed407be5 T	39	/* Clock Defines */
	40	#define V_OSCK 26000000 /* Clock output from T2 */
	41	#define V_SCLK (V_OSCK >> 1)
	42
ed407be5 T	43	#define CONFIG_SKIP_LOWLEVEL_INIT /* X-Loader set everything up */
	44
	45	#define CONFIG_CMDLINE_TAG /* enable passing kernel command line string */
	46	#define CONFIG_INITRD_TAG /* enable passing initrd */
	47	#define CONFIG_REVISION_TAG /* enable passing revision tag*/
	48	#define CONFIG_SETUP_MEMORY_TAGS /* enable memory tag */
	49
	50	/*
	51	* Size of malloc() pool
	52	*/
ed407be5 T	53	#define CONFIG_UBI_SIZE (512 << 10)
	54	#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + CONFIG_UBI_SIZE + \
	55	(128 << 10))
	56
	57	/*
	58	* Hardware drivers
	59	*/
	60
	61	/*
	62	* NS16550 Configuration
	63	*/
	64	#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
	65
ed407be5 T	66	#define CONFIG_SYS_NS16550_SERIAL
	67	#define CONFIG_SYS_NS16550_REG_SIZE (-4)
	68	#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
	69
	70	/*
	71	* select serial console configuration
	72	*/
ed407be5	73	#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
ed407be5 T	74
	75	/* allow to overwrite serial and ethaddr */
	76	#define CONFIG_ENV_OVERWRITE
ed407be5	77	#define CONFIG_SYS_BAUDRATE_TABLE { 4800, 9600, 19200, 38400, 57600, 115200 }
ed407be5	78
ed407be5 T	79	/* USB device configuration */
	80	#define CONFIG_USB_DEVICE
	81	#define CONFIG_USBD_VENDORID 0x0421
	82	#define CONFIG_USBD_PRODUCTID 0x01c8
	83	#define CONFIG_USBD_MANUFACTURER "Nokia"
	84	#define CONFIG_USBD_PRODUCT_NAME "N900"
	85
ed407be5	86	/* commands to include */
ed407be5	87
6789e84e	88	#define CONFIG_SYS_I2C
ed407be5 T	89
	90	/*
	91	* TWL4030
	92	*/
ed407be5	93
ed407be5 T	94	#define GPIO_SLIDE 71
	95
	96	/*
	97	* Board ONENAND Info.
	98	*/
	99
	100	#define PART1_NAME "bootloader"
	101	#define PART1_SIZE 128
	102	#define PART1_MULL 1024
	103	#define PART1_SUFF "k"
	104	#define PART1_OFFS 0x00000000
	105	#define PART1_MASK 0x00000003
	106
	107	#define PART2_NAME "config"
	108	#define PART2_SIZE 384
	109	#define PART2_MULL 1024
	110	#define PART2_SUFF "k"
	111	#define PART2_OFFS 0x00020000
	112	#define PART2_MASK 0x00000000
	113
	114	#define PART3_NAME "log"
	115	#define PART3_SIZE 256
	116	#define PART3_MULL 1024
	117	#define PART3_SUFF "k"
	118	#define PART3_OFFS 0x00080000
	119	#define PART3_MASK 0x00000000
	120
	121	#define PART4_NAME "kernel"
	122	#define PART4_SIZE 2
	123	#define PART4_MULL 1024*1024
	124	#define PART4_SUFF "m"
	125	#define PART4_OFFS 0x000c0000
	126	#define PART4_MASK 0x00000000
	127
	128	#define PART5_NAME "initfs"
	129	#define PART5_SIZE 2
	130	#define PART5_MULL 1024*1024
	131	#define PART5_SUFF "m"
	132	#define PART5_OFFS 0x002c0000
	133	#define PART5_MASK 0x00000000
	134
	135	#define PART6_NAME "rootfs"
	136	#define PART6_SIZE 257280
	137	#define PART6_MULL 1024
	138	#define PART6_SUFF "k"
	139	#define PART6_OFFS 0x004c0000
	140	#define PART6_MASK 0x00000000
	141
	142	#ifdef ONENAND_SUPPORT
	143
ed407be5	144	#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
ed407be5	145
ed407be5 T	146	#endif
	147
	148	/* Watchdog support */
	149	#define CONFIG_HW_WATCHDOG
	150
	151	/*
	152	* Framebuffer
	153	*/
	154	/* Video console */
ed407be5 T	155	#define CONFIG_VIDEO_LOGO
	156	#define VIDEO_FB_16BPP_PIXEL_SWAP
	157	#define VIDEO_FB_16BPP_WORD_SWAP
ed407be5 T	158	#define CONFIG_SPLASH_SCREEN
	159
	160	/* functions for cfb_console */
	161	#define VIDEO_KBD_INIT_FCT rx51_kp_init()
	162	#define VIDEO_TSTC_FCT rx51_kp_tstc
	163	#define VIDEO_GETC_FCT rx51_kp_getc
	164	#ifndef __ASSEMBLY__
709ea543	165	struct stdio_dev;
ed407be5	166	int rx51_kp_init(void);
709ea543 SG	167	int rx51_kp_tstc(struct stdio_dev *sdev);
709ea543 SG	168	int rx51_kp_getc(struct stdio_dev *sdev);
ed407be5 T	169	#endif
ed407be5 T	170
ed407be5	171	/* Environment information */
43ede0bc TR	172	#ifdef CONFIG_MTDPARTS_DEFAULT
	173	#define MTDPARTS "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0"
	174	#else
	175	#define MTDPARTS
	176	#endif
ed407be5	177	#define CONFIG_EXTRA_ENV_SETTINGS \
43ede0bc	178	MTDPARTS \
ed407be5 T	179	"usbtty=cdc_acm\0" \
	180	"stdin=vga\0" \
	181	"stdout=vga\0" \
	182	"stderr=vga\0" \
	183	"setcon=setenv stdin ${con};" \
	184	"setenv stdout ${con};" \
	185	"setenv stderr ${con}\0" \
	186	"sercon=setenv con serial; run setcon\0" \
	187	"usbcon=setenv con usbtty; run setcon\0" \
	188	"vgacon=setenv con vga; run setcon\0" \
	189	"slide=gpio input " __stringify(GPIO_SLIDE) "\0" \
	190	"switchmmc=mmc dev ${mmcnum}\0" \
	191	"kernaddr=0x82008000\0" \
	192	"initrdaddr=0x84008000\0" \
	193	"scriptaddr=0x86008000\0" \
	194	"fileload=${mmctype}load mmc ${mmcnum}:${mmcpart} " \
	195	"${loadaddr} ${mmcfile}\0" \
	196	"kernload=setenv loadaddr ${kernaddr};" \
	197	"setenv mmcfile ${mmckernfile};" \
	198	"run fileload\0" \
	199	"initrdload=setenv loadaddr ${initrdaddr};" \
	200	"setenv mmcfile ${mmcinitrdfile};" \
	201	"run fileload\0" \
	202	"scriptload=setenv loadaddr ${scriptaddr};" \
	203	"setenv mmcfile ${mmcscriptfile};" \
	204	"run fileload\0" \
	205	"scriptboot=echo Running ${mmcscriptfile} from mmc " \
	206	"${mmcnum}:${mmcpart} ...; source ${scriptaddr}\0" \
	207	"kernboot=echo Booting ${mmckernfile} from mmc " \
	208	"${mmcnum}:${mmcpart} ...; bootm ${kernaddr}\0" \
	209	"kerninitrdboot=echo Booting ${mmckernfile} ${mmcinitrdfile} from mmc "\
	210	"${mmcnum}:${mmcpart} ...; bootm ${kernaddr} ${initrdaddr}\0" \
	211	"attachboot=echo Booting attached kernel image ...;" \
	212	"setenv setup_omap_atag 1;" \
	213	"bootm ${attkernaddr};" \
	214	"setenv setup_omap_atag\0" \
	215	"trymmcscriptboot=if run switchmmc; then " \
	216	"if run scriptload; then " \
	217	"run scriptboot;" \
	218	"fi;" \
	219	"fi\0" \
	220	"trymmckernboot=if run switchmmc; then " \
	221	"if run kernload; then " \
	222	"run kernboot;" \
	223	"fi;" \
	224	"fi\0" \
	225	"trymmckerninitrdboot=if run switchmmc; then " \
	226	"if run initrdload; then " \
	227	"if run kernload; then " \
	228	"run kerninitrdboot;" \
	229	"fi;" \
	230	"fi; " \
	231	"fi\0" \
	232	"trymmcpartboot=setenv mmcscriptfile boot.scr; run trymmcscriptboot;" \
	233	"setenv mmckernfile uImage; run trymmckernboot\0" \
	234	"trymmcallpartboot=setenv mmcpart 1; run trymmcpartboot;" \
	235	"setenv mmcpart 2; run trymmcpartboot;" \
	236	"setenv mmcpart 3; run trymmcpartboot;" \
	237	"setenv mmcpart 4; run trymmcpartboot\0" \
	238	"trymmcboot=if run switchmmc; then " \
	239	"setenv mmctype fat;" \
	240	"run trymmcallpartboot;" \
	241	"setenv mmctype ext2;" \
	242	"run trymmcallpartboot;" \
243	"setenv mmctype ext4;" \
244	"run trymmcallpartboot;" \
245	"fi\0" \
246	"emmcboot=setenv mmcnum 1; run trymmcboot\0" \
247	"sdboot=setenv mmcnum 0; run trymmcboot\0" \
d9993988 T	248	"menucmd=bootmenu\0" \
	249	"bootmenu_0=Attached kernel=run attachboot\0" \
	250	"bootmenu_1=Internal eMMC=run emmcboot\0" \
	251	"bootmenu_2=External SD card=run sdboot\0" \
	252	"bootmenu_3=U-Boot boot order=boot\0" \
	253	"bootmenu_delay=30\0" \
ed407be5 T	254	""
ed407be5 T	255
d9993988 T	256	#define CONFIG_POSTBOOTMENU \
d9993988 T	257	"echo;" \
ed407be5 T	258	"echo Extra commands:;" \
	259	"echo run sercon - Use serial port for control.;" \
	260	"echo run usbcon - Use usbtty for control.;" \
	261	"echo run vgacon - Use framebuffer/keyboard.;" \
	262	"echo run sdboot - Boot from SD card slot.;" \
	263	"echo run emmcboot - Boot internal eMMC memory.;" \
	264	"echo run attachboot - Boot attached kernel image.;" \
	265	"echo"
	266
	267	#define CONFIG_BOOTCOMMAND \
	268	"run sdboot;" \
	269	"run emmcboot;" \
	270	"run attachboot;" \
	271	"echo"
	272
d9993988 T	273	#define CONFIG_MENU_SHOW
d9993988 T	274
ed407be5 T	275	/*
	276	* Miscellaneous configurable options
	277	*/
ed407be5 T	278
	279	#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
	280	#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + 0x01F00000)/31MB/
	281
	282	/* default load address */
	283	#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0)
	284
	285	/*
	286	* OMAP3 has 12 GP timers, they can be driven by the system clock
	287	* (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
	288	* This rate is divided by a local divisor.
	289	*/
	290	#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
	291	#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
ed407be5	292
ed407be5 T	293	/*
	294	* Physical Memory Map
	295	*/
ed407be5 T	296	#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
	297
	298	/*
	299	* FLASH and environment organization
	300	*/
	301
ed407be5 T	302	#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
	303	#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
	304	#define CONFIG_SYS_INIT_RAM_SIZE 0x800
	305	#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
	306	CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
	307
	308	/*
	309	* Attached kernel image
	310	*/
	311
	312	#define SDRAM_SIZE 0x10000000 /* 256 MB */
	313	#define SDRAM_END (CONFIG_SYS_SDRAM_BASE + SDRAM_SIZE)
	314
	315	#define IMAGE_MAXSIZE 0x1FF800 /* 2 MB - 2 kB */
	316	#define KERNEL_OFFSET 0x40000 /* 256 kB */
	317	#define KERNEL_MAXSIZE (IMAGE_MAXSIZE-KERNEL_OFFSET)
	318	#define KERNEL_ADDRESS (SDRAM_END-KERNEL_MAXSIZE)
	319
	320	/* Reserve protected RAM for attached kernel */
	321	#define CONFIG_PRAM ((KERNEL_MAXSIZE >> 10)+1)
	322
	323	#endif /* __CONFIG_H */