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ed407be5 PR |
1 | /* |
2 | * (C) Copyright 2011-2012 | |
3 | * Pali Rohár <pali.rohar@gmail.com> | |
4 | * | |
5 | * (C) Copyright 2010 | |
6 | * Alistair Buxton <a.j.buxton@gmail.com> | |
7 | * | |
8 | * Derived from Beagle Board code: | |
9 | * (C) Copyright 2006-2008 | |
10 | * Texas Instruments. | |
11 | * Richard Woodruff <r-woodruff2@ti.com> | |
12 | * Syed Mohammed Khasim <x0khasim@ti.com> | |
13 | * | |
14 | * Configuration settings for the Nokia RX-51 aka N900. | |
15 | * | |
3765b3e7 | 16 | * SPDX-License-Identifier: GPL-2.0+ |
ed407be5 PR |
17 | */ |
18 | ||
19 | #ifndef __CONFIG_H | |
20 | #define __CONFIG_H | |
21 | ||
22 | /* | |
23 | * High Level Configuration Options | |
24 | */ | |
25 | ||
26 | #define CONFIG_OMAP /* in a TI OMAP core */ | |
ed407be5 PR |
27 | #define CONFIG_OMAP3430 /* which is in a 3430 */ |
28 | #define CONFIG_OMAP3_RX51 /* working with RX51 */ | |
29 | #define CONFIG_SYS_L2CACHE_OFF /* pretend there is no L2 CACHE */ | |
cdef0b3f NM |
30 | /* Common ARM Erratas */ |
31 | #define CONFIG_ARM_ERRATA_454179 | |
32 | #define CONFIG_ARM_ERRATA_430973 | |
33 | #define CONFIG_ARM_ERRATA_621766 | |
ed407be5 PR |
34 | |
35 | #define CONFIG_MACH_TYPE MACH_TYPE_NOKIA_RX51 | |
36 | ||
37 | /* | |
38 | * Nokia X-Loader loading secondary image to address 0x80400000 | |
39 | * NOLO loading boot image to random place, so it doesn't really | |
40 | * matter what we set this to. We have to copy u-boot to this address | |
41 | */ | |
42 | #define CONFIG_SYS_TEXT_BASE 0x80008000 | |
43 | ||
44 | #define CONFIG_SDRC /* The chip has SDRC controller */ | |
45 | ||
46 | #include <asm/arch/cpu.h> /* get chip and board defs */ | |
987ec585 | 47 | #include <asm/arch/omap.h> |
ed407be5 PR |
48 | #include <asm/arch/mem.h> |
49 | #include <linux/stringify.h> | |
50 | ||
ed407be5 PR |
51 | /* Clock Defines */ |
52 | #define V_OSCK 26000000 /* Clock output from T2 */ | |
53 | #define V_SCLK (V_OSCK >> 1) | |
54 | ||
55 | #undef CONFIG_USE_IRQ /* no support for IRQs */ | |
56 | #define CONFIG_MISC_INIT_R | |
57 | #define CONFIG_SKIP_LOWLEVEL_INIT /* X-Loader set everything up */ | |
58 | ||
59 | #define CONFIG_CMDLINE_TAG /* enable passing kernel command line string */ | |
60 | #define CONFIG_INITRD_TAG /* enable passing initrd */ | |
61 | #define CONFIG_REVISION_TAG /* enable passing revision tag*/ | |
62 | #define CONFIG_SETUP_MEMORY_TAGS /* enable memory tag */ | |
63 | ||
64 | /* | |
65 | * Size of malloc() pool | |
66 | */ | |
67 | #define CONFIG_ENV_SIZE (128 << 10) | |
68 | #define CONFIG_UBI_SIZE (512 << 10) | |
69 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + CONFIG_UBI_SIZE + \ | |
70 | (128 << 10)) | |
71 | ||
72 | /* | |
73 | * Hardware drivers | |
74 | */ | |
75 | ||
76 | /* | |
77 | * NS16550 Configuration | |
78 | */ | |
79 | #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ | |
80 | ||
ed407be5 PR |
81 | #define CONFIG_SYS_NS16550_SERIAL |
82 | #define CONFIG_SYS_NS16550_REG_SIZE (-4) | |
83 | #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK | |
84 | ||
85 | /* | |
86 | * select serial console configuration | |
87 | */ | |
88 | #define CONFIG_CONS_INDEX 3 | |
89 | #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 | |
90 | #define CONFIG_SERIAL3 3 /* UART3 on RX-51 */ | |
91 | ||
92 | /* allow to overwrite serial and ethaddr */ | |
93 | #define CONFIG_ENV_OVERWRITE | |
94 | #define CONFIG_BAUDRATE 115200 | |
95 | #define CONFIG_SYS_BAUDRATE_TABLE { 4800, 9600, 19200, 38400, 57600, 115200 } | |
ed407be5 | 96 | #define CONFIG_GENERIC_MMC |
ed407be5 PR |
97 | #define CONFIG_DOS_PARTITION |
98 | ||
99 | /* USB */ | |
95de1e2f PK |
100 | #define CONFIG_USB_MUSB_UDC |
101 | #define CONFIG_USB_MUSB_HCD | |
ed407be5 PR |
102 | #define CONFIG_USB_OMAP3 |
103 | #define CONFIG_TWL4030_USB | |
104 | ||
105 | /* USB device configuration */ | |
106 | #define CONFIG_USB_DEVICE | |
107 | #define CONFIG_USBD_VENDORID 0x0421 | |
108 | #define CONFIG_USBD_PRODUCTID 0x01c8 | |
109 | #define CONFIG_USBD_MANUFACTURER "Nokia" | |
110 | #define CONFIG_USBD_PRODUCT_NAME "N900" | |
111 | ||
ed407be5 PR |
112 | #define CONFIG_SYS_NO_FLASH |
113 | ||
114 | /* commands to include */ | |
ed407be5 PR |
115 | |
116 | #define CONFIG_CMDLINE_EDITING /* add command line history */ | |
117 | #define CONFIG_AUTO_COMPLETE /* add autocompletion support */ | |
118 | ||
119 | #define CONFIG_CMD_CLEAR /* ANSI terminal clear screen command */ | |
120 | ||
121 | #ifdef ONENAND_SUPPORT | |
122 | ||
123 | #define CONFIG_CMD_ONENAND /* ONENAND support */ | |
124 | #define CONFIG_CMD_MTDPARTS /* mtd parts support */ | |
125 | ||
126 | #ifdef UBIFS_SUPPORT | |
ed407be5 PR |
127 | #define CONFIG_CMD_UBIFS /* UBIFS Support */ |
128 | #endif | |
129 | ||
130 | #endif | |
131 | ||
ed407be5 | 132 | #define CONFIG_OMAP3_SPI |
6789e84e HS |
133 | #define CONFIG_SYS_I2C |
134 | #define CONFIG_SYS_OMAP24_I2C_SPEED 100000 | |
135 | #define CONFIG_SYS_OMAP24_I2C_SLAVE 1 | |
136 | #define CONFIG_SYS_I2C_OMAP34XX | |
ed407be5 PR |
137 | |
138 | /* | |
139 | * TWL4030 | |
140 | */ | |
141 | #define CONFIG_TWL4030_POWER | |
142 | #define CONFIG_TWL4030_LED | |
143 | #define CONFIG_TWL4030_KEYPAD | |
144 | ||
145 | #define CONFIG_OMAP_GPIO | |
146 | #define GPIO_SLIDE 71 | |
147 | ||
148 | /* | |
149 | * Board ONENAND Info. | |
150 | */ | |
151 | ||
152 | #define PART1_NAME "bootloader" | |
153 | #define PART1_SIZE 128 | |
154 | #define PART1_MULL 1024 | |
155 | #define PART1_SUFF "k" | |
156 | #define PART1_OFFS 0x00000000 | |
157 | #define PART1_MASK 0x00000003 | |
158 | ||
159 | #define PART2_NAME "config" | |
160 | #define PART2_SIZE 384 | |
161 | #define PART2_MULL 1024 | |
162 | #define PART2_SUFF "k" | |
163 | #define PART2_OFFS 0x00020000 | |
164 | #define PART2_MASK 0x00000000 | |
165 | ||
166 | #define PART3_NAME "log" | |
167 | #define PART3_SIZE 256 | |
168 | #define PART3_MULL 1024 | |
169 | #define PART3_SUFF "k" | |
170 | #define PART3_OFFS 0x00080000 | |
171 | #define PART3_MASK 0x00000000 | |
172 | ||
173 | #define PART4_NAME "kernel" | |
174 | #define PART4_SIZE 2 | |
175 | #define PART4_MULL 1024*1024 | |
176 | #define PART4_SUFF "m" | |
177 | #define PART4_OFFS 0x000c0000 | |
178 | #define PART4_MASK 0x00000000 | |
179 | ||
180 | #define PART5_NAME "initfs" | |
181 | #define PART5_SIZE 2 | |
182 | #define PART5_MULL 1024*1024 | |
183 | #define PART5_SUFF "m" | |
184 | #define PART5_OFFS 0x002c0000 | |
185 | #define PART5_MASK 0x00000000 | |
186 | ||
187 | #define PART6_NAME "rootfs" | |
188 | #define PART6_SIZE 257280 | |
189 | #define PART6_MULL 1024 | |
190 | #define PART6_SUFF "k" | |
191 | #define PART6_OFFS 0x004c0000 | |
192 | #define PART6_MASK 0x00000000 | |
193 | ||
194 | #ifdef ONENAND_SUPPORT | |
195 | ||
ed407be5 PR |
196 | #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP |
197 | #define CONFIG_MTD_DEVICE | |
198 | #define CONFIG_MTD_PARTITIONS | |
199 | ||
200 | #ifdef UBIFS_SUPPORT | |
201 | #define CONFIG_RBTREE | |
202 | #define CONFIG_LZO | |
203 | #endif | |
204 | ||
205 | #define MTDIDS_DEFAULT "onenand0=onenand" | |
206 | #define MTDPARTS_DEFAULT "mtdparts=onenand:" \ | |
207 | __stringify(PART1_SIZE) PART1_SUFF "(" PART1_NAME ")ro," \ | |
208 | __stringify(PART2_SIZE) PART2_SUFF "(" PART2_NAME ")," \ | |
209 | __stringify(PART3_SIZE) PART3_SUFF "(" PART3_NAME ")," \ | |
210 | __stringify(PART4_SIZE) PART4_SUFF "(" PART4_NAME ")," \ | |
211 | __stringify(PART5_SIZE) PART5_SUFF "(" PART5_NAME ")," \ | |
212 | "-(" PART6_NAME ")" | |
213 | ||
214 | #endif | |
215 | ||
216 | /* Watchdog support */ | |
217 | #define CONFIG_HW_WATCHDOG | |
218 | ||
219 | /* | |
220 | * Framebuffer | |
221 | */ | |
222 | /* Video console */ | |
ed407be5 PR |
223 | #define CONFIG_VIDEO_LOGO |
224 | #define VIDEO_FB_16BPP_PIXEL_SWAP | |
225 | #define VIDEO_FB_16BPP_WORD_SWAP | |
ed407be5 PR |
226 | #define CONFIG_SPLASH_SCREEN |
227 | ||
228 | /* functions for cfb_console */ | |
229 | #define VIDEO_KBD_INIT_FCT rx51_kp_init() | |
230 | #define VIDEO_TSTC_FCT rx51_kp_tstc | |
231 | #define VIDEO_GETC_FCT rx51_kp_getc | |
232 | #ifndef __ASSEMBLY__ | |
709ea543 | 233 | struct stdio_dev; |
ed407be5 | 234 | int rx51_kp_init(void); |
709ea543 SG |
235 | int rx51_kp_tstc(struct stdio_dev *sdev); |
236 | int rx51_kp_getc(struct stdio_dev *sdev); | |
ed407be5 PR |
237 | #endif |
238 | ||
239 | #ifndef MTDPARTS_DEFAULT | |
240 | #define MTDPARTS_DEFAULT | |
241 | #endif | |
242 | ||
243 | /* Environment information */ | |
ed407be5 PR |
244 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
245 | "mtdparts=" MTDPARTS_DEFAULT "\0" \ | |
246 | "usbtty=cdc_acm\0" \ | |
247 | "stdin=vga\0" \ | |
248 | "stdout=vga\0" \ | |
249 | "stderr=vga\0" \ | |
250 | "setcon=setenv stdin ${con};" \ | |
251 | "setenv stdout ${con};" \ | |
252 | "setenv stderr ${con}\0" \ | |
253 | "sercon=setenv con serial; run setcon\0" \ | |
254 | "usbcon=setenv con usbtty; run setcon\0" \ | |
255 | "vgacon=setenv con vga; run setcon\0" \ | |
256 | "slide=gpio input " __stringify(GPIO_SLIDE) "\0" \ | |
257 | "switchmmc=mmc dev ${mmcnum}\0" \ | |
258 | "kernaddr=0x82008000\0" \ | |
259 | "initrdaddr=0x84008000\0" \ | |
260 | "scriptaddr=0x86008000\0" \ | |
261 | "fileload=${mmctype}load mmc ${mmcnum}:${mmcpart} " \ | |
262 | "${loadaddr} ${mmcfile}\0" \ | |
263 | "kernload=setenv loadaddr ${kernaddr};" \ | |
264 | "setenv mmcfile ${mmckernfile};" \ | |
265 | "run fileload\0" \ | |
266 | "initrdload=setenv loadaddr ${initrdaddr};" \ | |
267 | "setenv mmcfile ${mmcinitrdfile};" \ | |
268 | "run fileload\0" \ | |
269 | "scriptload=setenv loadaddr ${scriptaddr};" \ | |
270 | "setenv mmcfile ${mmcscriptfile};" \ | |
271 | "run fileload\0" \ | |
272 | "scriptboot=echo Running ${mmcscriptfile} from mmc " \ | |
273 | "${mmcnum}:${mmcpart} ...; source ${scriptaddr}\0" \ | |
274 | "kernboot=echo Booting ${mmckernfile} from mmc " \ | |
275 | "${mmcnum}:${mmcpart} ...; bootm ${kernaddr}\0" \ | |
276 | "kerninitrdboot=echo Booting ${mmckernfile} ${mmcinitrdfile} from mmc "\ | |
277 | "${mmcnum}:${mmcpart} ...; bootm ${kernaddr} ${initrdaddr}\0" \ | |
278 | "attachboot=echo Booting attached kernel image ...;" \ | |
279 | "setenv setup_omap_atag 1;" \ | |
280 | "bootm ${attkernaddr};" \ | |
281 | "setenv setup_omap_atag\0" \ | |
282 | "trymmcscriptboot=if run switchmmc; then " \ | |
283 | "if run scriptload; then " \ | |
284 | "run scriptboot;" \ | |
285 | "fi;" \ | |
286 | "fi\0" \ | |
287 | "trymmckernboot=if run switchmmc; then " \ | |
288 | "if run kernload; then " \ | |
289 | "run kernboot;" \ | |
290 | "fi;" \ | |
291 | "fi\0" \ | |
292 | "trymmckerninitrdboot=if run switchmmc; then " \ | |
293 | "if run initrdload; then " \ | |
294 | "if run kernload; then " \ | |
295 | "run kerninitrdboot;" \ | |
296 | "fi;" \ | |
297 | "fi; " \ | |
298 | "fi\0" \ | |
299 | "trymmcpartboot=setenv mmcscriptfile boot.scr; run trymmcscriptboot;" \ | |
300 | "setenv mmckernfile uImage; run trymmckernboot\0" \ | |
301 | "trymmcallpartboot=setenv mmcpart 1; run trymmcpartboot;" \ | |
302 | "setenv mmcpart 2; run trymmcpartboot;" \ | |
303 | "setenv mmcpart 3; run trymmcpartboot;" \ | |
304 | "setenv mmcpart 4; run trymmcpartboot\0" \ | |
305 | "trymmcboot=if run switchmmc; then " \ | |
306 | "setenv mmctype fat;" \ | |
307 | "run trymmcallpartboot;" \ | |
308 | "setenv mmctype ext2;" \ | |
309 | "run trymmcallpartboot;" \ | |
310 | "setenv mmctype ext4;" \ | |
311 | "run trymmcallpartboot;" \ | |
312 | "fi\0" \ | |
313 | "emmcboot=setenv mmcnum 1; run trymmcboot\0" \ | |
314 | "sdboot=setenv mmcnum 0; run trymmcboot\0" \ | |
d9993988 PR |
315 | "menucmd=bootmenu\0" \ |
316 | "bootmenu_0=Attached kernel=run attachboot\0" \ | |
317 | "bootmenu_1=Internal eMMC=run emmcboot\0" \ | |
318 | "bootmenu_2=External SD card=run sdboot\0" \ | |
319 | "bootmenu_3=U-Boot boot order=boot\0" \ | |
320 | "bootmenu_delay=30\0" \ | |
ed407be5 PR |
321 | "" |
322 | ||
323 | #define CONFIG_PREBOOT \ | |
d9993988 PR |
324 | "setenv mmcnum 1; setenv mmcpart 1;" \ |
325 | "setenv mmcscriptfile bootmenu.scr;" \ | |
326 | "if run switchmmc; then " \ | |
327 | "setenv mmcdone true;" \ | |
328 | "setenv mmctype fat;" \ | |
329 | "if run scriptload; then true; else " \ | |
330 | "setenv mmctype ext2;" \ | |
331 | "if run scriptload; then true; else " \ | |
332 | "setenv mmctype ext4;" \ | |
333 | "if run scriptload; then true; else " \ | |
334 | "setenv mmcdone false;" \ | |
335 | "fi;" \ | |
336 | "fi;" \ | |
337 | "fi;" \ | |
338 | "if ${mmcdone}; then " \ | |
339 | "run scriptboot;" \ | |
340 | "fi;" \ | |
341 | "fi;" \ | |
342 | "if run slide; then true; else " \ | |
343 | "setenv bootmenu_delay 0;" \ | |
344 | "setenv bootdelay 0;" \ | |
345 | "fi" | |
346 | ||
347 | #define CONFIG_POSTBOOTMENU \ | |
348 | "echo;" \ | |
ed407be5 PR |
349 | "echo Extra commands:;" \ |
350 | "echo run sercon - Use serial port for control.;" \ | |
351 | "echo run usbcon - Use usbtty for control.;" \ | |
352 | "echo run vgacon - Use framebuffer/keyboard.;" \ | |
353 | "echo run sdboot - Boot from SD card slot.;" \ | |
354 | "echo run emmcboot - Boot internal eMMC memory.;" \ | |
355 | "echo run attachboot - Boot attached kernel image.;" \ | |
356 | "echo" | |
357 | ||
358 | #define CONFIG_BOOTCOMMAND \ | |
359 | "run sdboot;" \ | |
360 | "run emmcboot;" \ | |
361 | "run attachboot;" \ | |
362 | "echo" | |
363 | ||
d9993988 PR |
364 | #define CONFIG_MENU_SHOW |
365 | ||
ed407be5 PR |
366 | /* |
367 | * Miscellaneous configurable options | |
368 | */ | |
369 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ | |
ed407be5 PR |
370 | #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ |
371 | /* Print Buffer Size */ | |
372 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ | |
373 | sizeof(CONFIG_SYS_PROMPT) + 16) | |
374 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ | |
375 | /* Boot Argument Buffer Size */ | |
376 | #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) | |
377 | ||
378 | #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) | |
379 | #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + 0x01F00000)/*31MB*/ | |
380 | ||
381 | /* default load address */ | |
382 | #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) | |
383 | ||
384 | /* | |
385 | * OMAP3 has 12 GP timers, they can be driven by the system clock | |
386 | * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). | |
387 | * This rate is divided by a local divisor. | |
388 | */ | |
389 | #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) | |
390 | #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ | |
ed407be5 PR |
391 | |
392 | /* | |
393 | * Stack sizes | |
394 | * | |
395 | * The stack sizes are set up in start.S using the settings below | |
396 | */ | |
397 | #define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */ | |
398 | ||
399 | /* | |
400 | * Physical Memory Map | |
401 | */ | |
402 | #define CONFIG_NR_DRAM_BANKS 2 | |
403 | #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 | |
404 | ||
405 | /* | |
406 | * FLASH and environment organization | |
407 | */ | |
408 | ||
409 | #define CONFIG_ENV_IS_NOWHERE | |
410 | ||
411 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 | |
412 | #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 | |
413 | #define CONFIG_SYS_INIT_RAM_SIZE 0x800 | |
414 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ | |
415 | CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) | |
416 | ||
417 | /* | |
418 | * Attached kernel image | |
419 | */ | |
420 | ||
421 | #define SDRAM_SIZE 0x10000000 /* 256 MB */ | |
422 | #define SDRAM_END (CONFIG_SYS_SDRAM_BASE + SDRAM_SIZE) | |
423 | ||
424 | #define IMAGE_MAXSIZE 0x1FF800 /* 2 MB - 2 kB */ | |
425 | #define KERNEL_OFFSET 0x40000 /* 256 kB */ | |
426 | #define KERNEL_MAXSIZE (IMAGE_MAXSIZE-KERNEL_OFFSET) | |
427 | #define KERNEL_ADDRESS (SDRAM_END-KERNEL_MAXSIZE) | |
428 | ||
429 | /* Reserve protected RAM for attached kernel */ | |
430 | #define CONFIG_PRAM ((KERNEL_MAXSIZE >> 10)+1) | |
431 | ||
432 | #endif /* __CONFIG_H */ |