[people/ms/u-boot.git] / include / configs / omap1510inn.h

/*
 * (C) Copyright 2003
 * Texas Instruments.
 * Kshitij Gupta <kshitij@ti.com>
 * Configuation settings for the TI OMAP Innovator board.
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#ifndef __CONFIG_H
#define __CONFIG_H

/*
 * High Level Configuration Options
 * (easy to change)
 */
#define CONFIG_ARM925T	1		/* This is an arm925t CPU	*/
#define CONFIG_OMAP	1		/* in a TI OMAP core	*/
#define CONFIG_OMAP1510 1		/* which is in a 1510 (helen) */
#define CONFIG_INNOVATOROMAP1510 1	/*	a Innovator Board  */

/* input clock of PLL */
#define CONFIG_SYS_CLK_FREQ	12000000	/* the OMAP1510 Innovator has 12MHz input clock */

#define CONFIG_MISC_INIT_R

#define CONFIG_CMDLINE_TAG	 1	/* enable passing of ATAGs	*/
#define CONFIG_SETUP_MEMORY_TAGS 1
#define CONFIG_INITRD_TAG	 1

/*
 * Size of malloc() pool
 */
#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 128*1024)

/*
 * Hardware drivers
 */
/*
#define CONFIG_DRIVER_SMC9196
#define CONFIG_SMC9196_BASE 0x08000300
#define CONFIG_SMC9196_EXT_PHY
*/
#define CONFIG_LAN91C96
#define CONFIG_LAN91C96_BASE 0x08000300
#define CONFIG_LAN91C96_EXT_PHY

/*
 * NS16550 Configuration
 */
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE	(-4)
#define CONFIG_SYS_NS16550_CLK		(CONFIG_SYS_CLK_FREQ)	/* can be 12M/32Khz or 48Mhz  */
#define CONFIG_SYS_NS16550_COM1	0xfffb0000		/* uart1, bluetooth uart on helen */

/*
 * select serial console configuration
 */
#define CONFIG_SERIAL1		1	/* we use SERIAL 1 on OMAP1510 Innovator */

/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE

#define CONFIG_ENV_OVERWRITE
#define CONFIG_CONS_INDEX	1
#define CONFIG_BAUDRATE		115200

/*
 * Command line configuration.
 */
#include <config_cmd_default.h>

#define CONFIG_CMD_DHCP


/*
 * BOOTP options
 */
#define CONFIG_BOOTP_SUBNETMASK
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
#define CONFIG_BOOTP_BOOTPATH


#include <configs/omap1510.h>

#define CONFIG_BOOTDELAY	3
#define CONFIG_BOOTARGS		"console=ttyS0,115200n8 noinitrd root=/dev/nfs ip=bootp"
#define CONFIG_BOOTCOMMAND	"bootp;tftp;bootm"
#define CONFIG_SYS_AUTOLOAD		"n"		/* No autoload */

#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE	115200		/* speed to run kgdb serial port */
/* what's this ? it's not used anywhere */
#define CONFIG_KGDB_SER_INDEX	1		/* which serial port to use */
#endif

/*
 * Miscellaneous configurable options
 */
#define CONFIG_SYS_LONGHELP				/* undef to save memory		*/
#define CONFIG_SYS_PROMPT		"OMAP1510 Innovator # " /* Monitor Command Prompt	*/
#define CONFIG_SYS_CBSIZE		256		/* Console I/O Buffer Size	*/
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
#define CONFIG_SYS_MAXARGS		16		/* max number of command args	*/
#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE	/* Boot Argument Buffer Size	*/

#define CONFIG_SYS_MEMTEST_START	0x10000000	/* memtest works on	*/
#define CONFIG_SYS_MEMTEST_END		0x12000000	/* 32 MB in DRAM	*/

#define CONFIG_SYS_LOAD_ADDR		0x10000000	/* default load address */

/* The 1510 has 3 timers, they can be driven by the RefClk (12MHz) or by DPLL1.
 * This time is further subdivided by a local divisor.
 */
#define CONFIG_SYS_TIMERBASE	OMAP1510_TIMER1_BASE	/* use timer 1 */
#define CONFIG_SYS_PTV		2	/* Divisor: 2^(PTV+1) => 8 */
#define CONFIG_SYS_HZ		1000

/*-----------------------------------------------------------------------
 * Physical Memory Map
 */
#define CONFIG_NR_DRAM_BANKS	1	   /* we have 1 bank of DRAM */
#define PHYS_SDRAM_1		0x10000000 /* SDRAM Bank #1 */
#define PHYS_SDRAM_1_SIZE	0x02000000 /* 32 MB */

#define PHYS_FLASH_1		0x00000000 /* Flash Bank #1 */

#define CONFIG_SYS_FLASH_BASE		PHYS_FLASH_1

#define PHYS_SRAM		0x20000000

/*-----------------------------------------------------------------------
 * FLASH and environment organization
 */
#define CONFIG_SYS_MAX_FLASH_BANKS	2	/* max number of memory banks */
#define PHYS_FLASH_SIZE		0x01000000 /* 16MB */
#define PHYS_FLASH_SECT_SIZE	(128*1024)	/* Size of a sector (128kB) */
#define CONFIG_SYS_MAX_FLASH_SECT	(128)	/* max number of sectors on one chip */
#define CONFIG_ENV_ADDR		(CONFIG_SYS_FLASH_BASE + PHYS_FLASH_SECT_SIZE)
#define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_FLASH_BASE	/* Monitor at beginning of flash */
#define CONFIG_SYS_MONITOR_LEN		PHYS_FLASH_SECT_SIZE	/* Reserve 1 sector */
#define CONFIG_SYS_FLASH_BANKS_LIST	{ CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_BASE + PHYS_FLASH_SIZE }

/*-----------------------------------------------------------------------
 * FLASH driver setup
 */
#define CONFIG_SYS_FLASH_CFI		1	/* Flash memory is CFI compliant */
#define CONFIG_FLASH_CFI_DRIVER	1	/* Use drivers/mtd/cfi_flash.c */
#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE	1	/* Use buffered writes (~10x faster) */
#define CONFIG_SYS_FLASH_PROTECTION	1	/* Use hardware sector protection */

/* timeout values are in ticks */
#define CONFIG_SYS_FLASH_ERASE_TOUT	(20*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
#define CONFIG_SYS_FLASH_WRITE_TOUT	(20*CONFIG_SYS_HZ) /* Timeout for Flash Write */

#define CONFIG_ENV_IS_IN_FLASH	1
#define CONFIG_ENV_SECT_SIZE	PHYS_FLASH_SECT_SIZE	/* Total Size of Environment Sector */
#define CONFIG_ENV_SIZE		CONFIG_ENV_SECT_SIZE
#define CONFIG_ENV_OFFSET		( CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN )	/* Environment after Monitor */

#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
#define CONFIG_SYS_INIT_SP_ADDR 	PHYS_SRAM

#endif	/* __CONFIG_H */
Commit	Line	Data
2e5983d2 WD	1	/*
	2	* (C) Copyright 2003
	3	* Texas Instruments.
	4	* Kshitij Gupta <kshitij@ti.com>
	5	* Configuation settings for the TI OMAP Innovator board.
	6	*
	7	* See file CREDITS for list of people who contributed to this
	8	* project.
	9	*
	10	* This program is free software; you can redistribute it and/or
	11	* modify it under the terms of the GNU General Public License as
	12	* published by the Free Software Foundation; either version 2 of
	13	* the License, or (at your option) any later version.
	14	*
	15	* This program is distributed in the hope that it will be useful,
	16	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	17	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	18	* GNU General Public License for more details.
	19	*
	20	* You should have received a copy of the GNU General Public License
	21	* along with this program; if not, write to the Free Software
	22	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	23	* MA 02111-1307 USA
	24	*/
	25
	26	#ifndef __CONFIG_H
	27	#define __CONFIG_H
	28
	29	/*
	30	* High Level Configuration Options
	31	* (easy to change)
	32	*/
	33	#define CONFIG_ARM925T 1 /* This is an arm925t CPU */
	34	#define CONFIG_OMAP 1 /* in a TI OMAP core */
	35	#define CONFIG_OMAP1510 1 /* which is in a 1510 (helen) */
	36	#define CONFIG_INNOVATOROMAP1510 1 /* a Innovator Board */
	37
	38	/* input clock of PLL */
	39	#define CONFIG_SYS_CLK_FREQ 12000000 /* the OMAP1510 Innovator has 12MHz input clock */
	40
2e5983d2 WD	41	#define CONFIG_MISC_INIT_R
	42
	43	#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
	44	#define CONFIG_SETUP_MEMORY_TAGS 1
5779d8d9	45	#define CONFIG_INITRD_TAG 1
2e5983d2 WD	46
	47	/*
	48	* Size of malloc() pool
	49	*/
6d0f6bcf	50	#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
2e5983d2 WD	51
	52	/*
	53	* Hardware drivers
	54	*/
	55	/*
	56	#define CONFIG_DRIVER_SMC9196
	57	#define CONFIG_SMC9196_BASE 0x08000300
	58	#define CONFIG_SMC9196_EXT_PHY
	59	*/
ac6b362a	60	#define CONFIG_LAN91C96
2e5983d2 WD	61	#define CONFIG_LAN91C96_BASE 0x08000300
	62	#define CONFIG_LAN91C96_EXT_PHY
	63
	64	/*
	65	* NS16550 Configuration
	66	*/
6d0f6bcf JCPV	67	#define CONFIG_SYS_NS16550
	68	#define CONFIG_SYS_NS16550_SERIAL
	69	#define CONFIG_SYS_NS16550_REG_SIZE (-4)
	70	#define CONFIG_SYS_NS16550_CLK (CONFIG_SYS_CLK_FREQ) /* can be 12M/32Khz or 48Mhz */
	71	#define CONFIG_SYS_NS16550_COM1 0xfffb0000 /* uart1, bluetooth uart on helen */
2e5983d2 WD	72
	73	/*
	74	* select serial console configuration
	75	*/
	76	#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on OMAP1510 Innovator */
	77
	78	/* allow to overwrite serial and ethaddr */
	79	#define CONFIG_ENV_OVERWRITE
	80
	81	#define CONFIG_ENV_OVERWRITE
	82	#define CONFIG_CONS_INDEX 1
	83	#define CONFIG_BAUDRATE 115200
a5cb2309 JL	84
	85	/*
	86	* Command line configuration.
	87	*/
	88	#include <config_cmd_default.h>
	89
	90	#define CONFIG_CMD_DHCP
	91
	92
d3b8c1a7 JL	93	/*
	94	* BOOTP options
	95	*/
	96	#define CONFIG_BOOTP_SUBNETMASK
	97	#define CONFIG_BOOTP_GATEWAY
	98	#define CONFIG_BOOTP_HOSTNAME
	99	#define CONFIG_BOOTP_BOOTPATH
	100
2e5983d2	101
2e5983d2 WD	102	#include <configs/omap1510.h>
	103
	104	#define CONFIG_BOOTDELAY 3
5779d8d9 WD	105	#define CONFIG_BOOTARGS "console=ttyS0,115200n8 noinitrd root=/dev/nfs ip=bootp"
5779d8d9 WD	106	#define CONFIG_BOOTCOMMAND "bootp;tftp;bootm"
6d0f6bcf	107	#define CONFIG_SYS_AUTOLOAD "n" /* No autoload */
2e5983d2	108
a5cb2309	109	#if defined(CONFIG_CMD_KGDB)
2e5983d2 WD	110	#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
	111	/* what's this ? it's not used anywhere */
	112	#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
	113	#endif
	114
	115	/*
	116	* Miscellaneous configurable options
	117	*/
6d0f6bcf JCPV	118	#define CONFIG_SYS_LONGHELP /* undef to save memory */
	119	#define CONFIG_SYS_PROMPT "OMAP1510 Innovator # " /* Monitor Command Prompt */
	120	#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
	121	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
	122	#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
	123	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
2e5983d2	124
6d0f6bcf JCPV	125	#define CONFIG_SYS_MEMTEST_START 0x10000000 /* memtest works on */
6d0f6bcf JCPV	126	#define CONFIG_SYS_MEMTEST_END 0x12000000 /* 32 MB in DRAM */
2e5983d2	127
6d0f6bcf	128	#define CONFIG_SYS_LOAD_ADDR 0x10000000 /* default load address */
2e5983d2	129
3791a118	130	/* The 1510 has 3 timers, they can be driven by the RefClk (12MHz) or by DPLL1.
2e5983d2 WD	131	* This time is further subdivided by a local divisor.
2e5983d2 WD	132	*/
81472d89	133	#define CONFIG_SYS_TIMERBASE OMAP1510_TIMER1_BASE /* use timer 1 */
3791a118 LM	134	#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
3791a118 LM	135	#define CONFIG_SYS_HZ 1000
2e5983d2	136
2e5983d2 WD	137	/*-----------------------------------------------------------------------
	138	* Physical Memory Map
	139	*/
	140	#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
	141	#define PHYS_SDRAM_1 0x10000000 /* SDRAM Bank #1 */
	142	#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
	143
	144	#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
	145
6d0f6bcf	146	#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
2e5983d2	147
56ccd36f A	148	#define PHYS_SRAM 0x20000000
56ccd36f A	149
2e5983d2 WD	150	/*-----------------------------------------------------------------------
	151	* FLASH and environment organization
	152	*/
6d0f6bcf	153	#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */
2e5983d2	154	#define PHYS_FLASH_SIZE 0x01000000 /* 16MB */
656658dd	155	#define PHYS_FLASH_SECT_SIZE (1281024) / Size of a sector (128kB) */
6d0f6bcf JCPV	156	#define CONFIG_SYS_MAX_FLASH_SECT (128) /* max number of sectors on one chip */
	157	#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + PHYS_FLASH_SECT_SIZE)
	158	#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE /* Monitor at beginning of flash */
	159	#define CONFIG_SYS_MONITOR_LEN PHYS_FLASH_SECT_SIZE /* Reserve 1 sector */
	160	#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_BASE + PHYS_FLASH_SIZE }
656658dd WD	161
	162	/*-----------------------------------------------------------------------
	163	* FLASH driver setup
	164	*/
6d0f6bcf	165	#define CONFIG_SYS_FLASH_CFI 1 /* Flash memory is CFI compliant */
00b1883a	166	#define CONFIG_FLASH_CFI_DRIVER 1 /* Use drivers/mtd/cfi_flash.c */
6d0f6bcf JCPV	167	#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* Use buffered writes (~10x faster) */
6d0f6bcf JCPV	168	#define CONFIG_SYS_FLASH_PROTECTION 1 /* Use hardware sector protection */
2e5983d2 WD	169
2e5983d2 WD	170	/* timeout values are in ticks */
6d0f6bcf JCPV	171	#define CONFIG_SYS_FLASH_ERASE_TOUT (20CONFIG_SYS_HZ) / Timeout for Flash Erase */
6d0f6bcf JCPV	172	#define CONFIG_SYS_FLASH_WRITE_TOUT (20CONFIG_SYS_HZ) / Timeout for Flash Write */
2e5983d2	173
5a1aceb0	174	#define CONFIG_ENV_IS_IN_FLASH 1
0e8d1586 JCPV	175	#define CONFIG_ENV_SECT_SIZE PHYS_FLASH_SECT_SIZE /* Total Size of Environment Sector */
0e8d1586 JCPV	176	#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
6d0f6bcf	177	#define CONFIG_ENV_OFFSET ( CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN ) /* Environment after Monitor */
2e5983d2	178
56ccd36f A	179	#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
	180	#define CONFIG_SYS_INIT_SP_ADDR PHYS_SRAM
	181
2e5983d2	182	#endif /* __CONFIG_H */