[people/ms/u-boot.git] / include / configs / omap1610inn.h

/*
 * (C) Copyright 2003
 * Texas Instruments.
 * Kshitij Gupta <kshitij@ti.com>
 * Configuation settings for the TI OMAP Innovator board.
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#ifndef __CONFIG_H
#define __CONFIG_H

/*
 * High Level Configuration Options
 * (easy to change)
 */
#define CONFIG_ARM926EJS	1	/* This is an arm926ejs CPU core  */
#define CONFIG_OMAP	1			/* in a TI OMAP core    */
#define CONFIG_OMAP1610	1		/* which is in a 1610  */
#define CONFIG_INNOVATOROMAP1610	1	/*  a Innovator Board  */

#define CONFIG_MACH_TYPE	MACH_TYPE_OMAP_INNOVATOR

/* input clock of PLL */
/* the OMAP1610 Innovator has 12MHz input clock */
#define CONFIG_SYS_CLK_FREQ	12000000

#undef CONFIG_USE_IRQ	/* we don't need IRQ/FIQ stuff */

#define CONFIG_MISC_INIT_R

#define CONFIG_CMDLINE_TAG	1	/* enable passing of ATAGs  */
#define CONFIG_SETUP_MEMORY_TAGS	1

/*
 * Size of malloc() pool
 */
#define CONFIG_SYS_MALLOC_LEN	(CONFIG_ENV_SIZE + 128*1024)

/*
 * Hardware drivers
 */
/*
*/
#define CONFIG_NET_MULTI
#define CONFIG_LAN91C96
#define CONFIG_LAN91C96_BASE 0x04000300
#define CONFIG_LAN91C96_EXT_PHY

/*
 * NS16550 Configuration
 */
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE	(-4)
#define CONFIG_SYS_NS16550_CLK		(48000000)	/* can be 12M/32Khz or 48Mhz */
#define CONFIG_SYS_NS16550_COM1	0xfffb0000	/* uart1, bluetooth uart on helen */

/*
 * select serial console configuration
 */
#define CONFIG_SERIAL1		1		/* we use SERIAL 1 on OMAP1610 Innovator */

/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_CONS_INDEX	1
#define CONFIG_BAUDRATE	115200
#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }


/*
 * Command line configuration.
 */
#include <config_cmd_default.h>

#define CONFIG_CMD_DHCP


/*
 * BOOTP options
 */
#define CONFIG_BOOTP_SUBNETMASK
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
#define CONFIG_BOOTP_BOOTPATH


#include <configs/omap1510.h>

#define CONFIG_BOOTDELAY	3
#define CONFIG_BOOTARGS	"mem=32M console=ttyS0,115200n8 noinitrd \
				root=/dev/nfs rw nfsroot=157.87.82.48:\
				/home/a0875451/mwd/myfs/target ip=dhcp"
#define CONFIG_NETMASK	255.255.254.0	/* talk on MY local net */
#define CONFIG_IPADDR	156.117.97.156	/* static IP I currently own */
#define CONFIG_SERVERIP	156.117.97.139	/* current IP of my dev pc */
#define CONFIG_BOOTFILE	"uImage"	/* file to load */

#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE	115200	/* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX	1	/* which serial port to use */
#endif

/*
 * Miscellaneous configurable options
 */
#define CONFIG_SYS_LONGHELP	/* undef to save memory     */
#define CONFIG_SYS_PROMPT	"OMAP1610 Innovator # "	/* Monitor Command Prompt   */
#define CONFIG_SYS_CBSIZE	256		/* Console I/O Buffer Size  */
/* Print Buffer Size */
#define CONFIG_SYS_PBSIZE	(CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
#define CONFIG_SYS_MAXARGS	16		/* max number of command args   */
#define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE	/* Boot Argument Buffer Size    */

#define CONFIG_SYS_MEMTEST_START	0x10000000	/* memtest works on */
#define CONFIG_SYS_MEMTEST_END	0x12000000	/* 32 MB in DRAM    */

#define CONFIG_SYS_LOAD_ADDR	0x10000000	/* default load address */

/* The 1610 has 6 timers, they can be driven by the RefClk (12Mhz) or by
 * DPLL1. This time is further subdivided by a local divisor.
 */
#define CONFIG_SYS_TIMERBASE	0xFFFEC500	/* use timer 1 */
#define CONFIG_SYS_PTV		7	/* 2^(PTV+1), divide by 256 */
#define CONFIG_SYS_HZ		((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV))

/*-----------------------------------------------------------------------
 * Stack sizes
 *
 * The stack sizes are set up in start.S using the settings below
 */
#define CONFIG_STACKSIZE	(128*1024)	/* regular stack */
#ifdef CONFIG_USE_IRQ
#define CONFIG_STACKSIZE_IRQ	(4*1024)	/* IRQ stack */
#define CONFIG_STACKSIZE_FIQ	(4*1024)	/* FIQ stack */
#endif

/*-----------------------------------------------------------------------
 * Physical Memory Map
 */
#define CONFIG_NR_DRAM_BANKS	1		/* we have 1 bank of DRAM */
#define PHYS_SDRAM_1		0x10000000	/* SDRAM Bank #1 */
#define PHYS_SDRAM_1_SIZE	0x02000000	/* 32 MB */

#define PHYS_FLASH_1_BM1	0x00000000	/* Flash Bank #1 if booting from flash */
#define PHYS_FLASH_1_BM0	0x0C000000	/* Flash Bank #1 if booting from RAM */

#ifdef CONFIG_CS_AUTOBOOT			/* Determine CS assignment in runtime */

#ifndef __ASSEMBLY__
extern unsigned long omap_flash_base;		/* set in flash__init */
#endif
#define CONFIG_SYS_FLASH_BASE		omap_flash_base

#elif defined(CONFIG_CS0_BOOT)

#define CONFIG_SYS_FLASH_BASE		PHYS_FLASH_1_BM0

#else

#define CONFIG_SYS_FLASH_BASE		PHYS_FLASH_1_BM1

#endif

#define PHYS_SRAM		0x20000000

/*-----------------------------------------------------------------------
 * FLASH and environment organization
 */
#define CONFIG_SYS_MAX_FLASH_BANKS	1	/* max number of memory banks */
#define PHYS_FLASH_SIZE	0x02000000	/* 32MB */
#define CONFIG_SYS_MAX_FLASH_SECT	(259)	/* max number of sectors on one chip */
/* addr of environment */
#define CONFIG_ENV_ADDR	(CONFIG_SYS_FLASH_BASE + 0x020000)

/* timeout values are in ticks */
#define CONFIG_SYS_FLASH_ERASE_TOUT	(20*CONFIG_SYS_HZ)	/* Timeout for Flash Erase */
#define CONFIG_SYS_FLASH_WRITE_TOUT	(20*CONFIG_SYS_HZ)	/* Timeout for Flash Write */

#define CONFIG_ENV_IS_IN_FLASH	1
#define CONFIG_ENV_SIZE	0x20000	/* Total Size of Environment Sector */
#define CONFIG_ENV_OFFSET	0x20000	/* environment starts here  */

#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
#define CONFIG_SYS_INIT_SP_ADDR 	PHYS_SRAM

#endif							/* __CONFIG_H */
Commit	Line	Data
6f21347d WD	1	/*
	2	* (C) Copyright 2003
	3	* Texas Instruments.
	4	* Kshitij Gupta <kshitij@ti.com>
	5	* Configuation settings for the TI OMAP Innovator board.
	6	*
	7	* See file CREDITS for list of people who contributed to this
	8	* project.
	9	*
	10	* This program is free software; you can redistribute it and/or
	11	* modify it under the terms of the GNU General Public License as
	12	* published by the Free Software Foundation; either version 2 of
	13	* the License, or (at your option) any later version.
	14	*
	15	* This program is distributed in the hope that it will be useful,
	16	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	17	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	18	* GNU General Public License for more details.
	19	*
	20	* You should have received a copy of the GNU General Public License
	21	* along with this program; if not, write to the Free Software
	22	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	23	* MA 02111-1307 USA
	24	*/
	25
	26	#ifndef __CONFIG_H
	27	#define __CONFIG_H
	28
	29	/*
	30	* High Level Configuration Options
	31	* (easy to change)
	32	*/
	33	#define CONFIG_ARM926EJS 1 /* This is an arm926ejs CPU core */
	34	#define CONFIG_OMAP 1 /* in a TI OMAP core */
	35	#define CONFIG_OMAP1610 1 /* which is in a 1610 */
	36	#define CONFIG_INNOVATOROMAP1610 1 /* a Innovator Board */
2141e144 IG	37
2141e144 IG	38	#define CONFIG_MACH_TYPE MACH_TYPE_OMAP_INNOVATOR
6f21347d WD	39
	40	/* input clock of PLL */
	41	/* the OMAP1610 Innovator has 12MHz input clock */
	42	#define CONFIG_SYS_CLK_FREQ 12000000
	43
	44	#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
	45
	46	#define CONFIG_MISC_INIT_R
	47
	48	#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
	49	#define CONFIG_SETUP_MEMORY_TAGS 1
	50
	51	/*
	52	* Size of malloc() pool
	53	*/
6d0f6bcf	54	#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
6f21347d WD	55
	56	/*
	57	* Hardware drivers
	58	*/
	59	/*
	60	*/
ac6b362a NM	61	#define CONFIG_NET_MULTI
ac6b362a NM	62	#define CONFIG_LAN91C96
6f21347d WD	63	#define CONFIG_LAN91C96_BASE 0x04000300
	64	#define CONFIG_LAN91C96_EXT_PHY
	65
	66	/*
	67	* NS16550 Configuration
	68	*/
6d0f6bcf JCPV	69	#define CONFIG_SYS_NS16550
	70	#define CONFIG_SYS_NS16550_SERIAL
	71	#define CONFIG_SYS_NS16550_REG_SIZE (-4)
	72	#define CONFIG_SYS_NS16550_CLK (48000000) /* can be 12M/32Khz or 48Mhz */
	73	#define CONFIG_SYS_NS16550_COM1 0xfffb0000 /* uart1, bluetooth uart on helen */
6f21347d WD	74
	75	/*
	76	* select serial console configuration
	77	*/
a8c7c708	78	#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on OMAP1610 Innovator */
6f21347d WD	79
	80	/* allow to overwrite serial and ethaddr */
	81	#define CONFIG_ENV_OVERWRITE
	82	#define CONFIG_CONS_INDEX 1
	83	#define CONFIG_BAUDRATE 115200
6d0f6bcf	84	#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
6f21347d	85
a5cb2309 JL	86
	87	/*
	88	* Command line configuration.
	89	*/
	90	#include <config_cmd_default.h>
	91
	92	#define CONFIG_CMD_DHCP
	93
	94
d3b8c1a7 JL	95	/*
	96	* BOOTP options
	97	*/
	98	#define CONFIG_BOOTP_SUBNETMASK
	99	#define CONFIG_BOOTP_GATEWAY
	100	#define CONFIG_BOOTP_HOSTNAME
	101	#define CONFIG_BOOTP_BOOTPATH
	102
6f21347d	103
6f21347d WD	104	#include <configs/omap1510.h>
	105
	106	#define CONFIG_BOOTDELAY 3
	107	#define CONFIG_BOOTARGS "mem=32M console=ttyS0,115200n8 noinitrd \
	108	root=/dev/nfs rw nfsroot=157.87.82.48:\
	109	/home/a0875451/mwd/myfs/target ip=dhcp"
	110	#define CONFIG_NETMASK 255.255.254.0 /* talk on MY local net */
	111	#define CONFIG_IPADDR 156.117.97.156 /* static IP I currently own */
	112	#define CONFIG_SERVERIP 156.117.97.139 /* current IP of my dev pc */
	113	#define CONFIG_BOOTFILE "uImage" /* file to load */
	114
a5cb2309	115	#if defined(CONFIG_CMD_KGDB)
6f21347d WD	116	#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
	117	#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
	118	#endif
	119
	120	/*
	121	* Miscellaneous configurable options
	122	*/
6d0f6bcf JCPV	123	#define CONFIG_SYS_LONGHELP /* undef to save memory */
	124	#define CONFIG_SYS_PROMPT "OMAP1610 Innovator # " /* Monitor Command Prompt */
	125	#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
6f21347d	126	/* Print Buffer Size */
6d0f6bcf JCPV	127	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
	128	#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
	129	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
6f21347d	130
6d0f6bcf JCPV	131	#define CONFIG_SYS_MEMTEST_START 0x10000000 /* memtest works on */
6d0f6bcf JCPV	132	#define CONFIG_SYS_MEMTEST_END 0x12000000 /* 32 MB in DRAM */
6f21347d	133
6d0f6bcf	134	#define CONFIG_SYS_LOAD_ADDR 0x10000000 /* default load address */
6f21347d	135
42d1f039	136	/* The 1610 has 6 timers, they can be driven by the RefClk (12Mhz) or by
6f21347d WD	137	* DPLL1. This time is further subdivided by a local divisor.
6f21347d WD	138	*/
6d0f6bcf	139	#define CONFIG_SYS_TIMERBASE 0xFFFEC500 /* use timer 1 */
81472d89 LM	140	#define CONFIG_SYS_PTV 7 /* 2^(PTV+1), divide by 256 */
81472d89 LM	141	#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV))
6f21347d WD	142
	143	/*-----------------------------------------------------------------------
	144	* Stack sizes
	145	*
	146	* The stack sizes are set up in start.S using the settings below
	147	*/
	148	#define CONFIG_STACKSIZE (1281024) / regular stack */
	149	#ifdef CONFIG_USE_IRQ
	150	#define CONFIG_STACKSIZE_IRQ (41024) / IRQ stack */
	151	#define CONFIG_STACKSIZE_FIQ (41024) / FIQ stack */
	152	#endif
	153
	154	/*-----------------------------------------------------------------------
	155	* Physical Memory Map
	156	*/
3ff02c27 WD	157	#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
3ff02c27 WD	158	#define PHYS_SDRAM_1 0x10000000 /* SDRAM Bank #1 */
6f21347d WD	159	#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
6f21347d WD	160
3ff02c27 WD	161	#define PHYS_FLASH_1_BM1 0x00000000 /* Flash Bank #1 if booting from flash */
	162	#define PHYS_FLASH_1_BM0 0x0C000000 /* Flash Bank #1 if booting from RAM */
	163
	164	#ifdef CONFIG_CS_AUTOBOOT /* Determine CS assignment in runtime */
ca0e7748	165
3ff02c27 WD	166	#ifndef __ASSEMBLY__
3ff02c27 WD	167	extern unsigned long omap_flash_base; /* set in flash__init */
63e73c9a	168	#endif
6d0f6bcf	169	#define CONFIG_SYS_FLASH_BASE omap_flash_base
3ff02c27 WD	170
	171	#elif defined(CONFIG_CS0_BOOT)
	172
6d0f6bcf	173	#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1_BM0
6f21347d	174
3ff02c27 WD	175	#else
3ff02c27 WD	176
6d0f6bcf	177	#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1_BM1
3ff02c27 WD	178
3ff02c27 WD	179	#endif
6f21347d	180
574fa1f0 A	181	#define PHYS_SRAM 0x20000000
574fa1f0 A	182
6f21347d WD	183	/*-----------------------------------------------------------------------
	184	* FLASH and environment organization
	185	*/
6d0f6bcf	186	#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
6f21347d	187	#define PHYS_FLASH_SIZE 0x02000000 /* 32MB */
6d0f6bcf	188	#define CONFIG_SYS_MAX_FLASH_SECT (259) /* max number of sectors on one chip */
6f21347d	189	/* addr of environment */
6d0f6bcf	190	#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x020000)
6f21347d WD	191
6f21347d WD	192	/* timeout values are in ticks */
6d0f6bcf JCPV	193	#define CONFIG_SYS_FLASH_ERASE_TOUT (20CONFIG_SYS_HZ) / Timeout for Flash Erase */
6d0f6bcf JCPV	194	#define CONFIG_SYS_FLASH_WRITE_TOUT (20CONFIG_SYS_HZ) / Timeout for Flash Write */
6f21347d	195
5a1aceb0	196	#define CONFIG_ENV_IS_IN_FLASH 1
0e8d1586 JCPV	197	#define CONFIG_ENV_SIZE 0x20000 /* Total Size of Environment Sector */
0e8d1586 JCPV	198	#define CONFIG_ENV_OFFSET 0x20000 /* environment starts here */
6f21347d	199
574fa1f0 A	200	#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
	201	#define CONFIG_SYS_INIT_SP_ADDR PHYS_SRAM
	202
6f21347d	203	#endif /* __CONFIG_H */