[people/ms/u-boot.git] / include / configs / omap3_beagle.h

/*
 * (C) Copyright 2006-2008
 * Texas Instruments.
 * Richard Woodruff <r-woodruff2@ti.com>
 * Syed Mohammed Khasim <x0khasim@ti.com>
 *
 * Configuration settings for the TI OMAP3530 Beagle board.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __CONFIG_H
#define __CONFIG_H

#define CONFIG_NR_DRAM_BANKS	2	/* CS1 may or may not be populated */

/*
 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
 * 64 bytes before this address should be set aside for u-boot.img's
 * header. That is 0x800FFFC0--0x80100000 should not be used for any
 * other needs.  We use this rather than the inherited defines from
 * ti_armv7_common.h for backwards compatibility.
 */
#define CONFIG_SYS_TEXT_BASE		0x80100000
#define CONFIG_SPL_BSS_START_ADDR	0x80000000
#define CONFIG_SPL_BSS_MAX_SIZE		(512 << 10)	/* 512 KB */
#define CONFIG_SYS_SPL_MALLOC_START	0x80208000
#define CONFIG_SYS_SPL_MALLOC_SIZE	0x100000

#include <configs/ti_omap3_common.h>

/*
 * Display CPU and Board information
 */
#define CONFIG_DISPLAY_CPUINFO		1
#define CONFIG_DISPLAY_BOARDINFO	1

#define CONFIG_MISC_INIT_R

#define CONFIG_REVISION_TAG		1
#define CONFIG_ENV_OVERWRITE

/* Status LED */
#define CONFIG_STATUS_LED		1
#define CONFIG_BOARD_SPECIFIC_LED	1
#define STATUS_LED_BIT			0x01
#define STATUS_LED_STATE		STATUS_LED_ON
#define STATUS_LED_PERIOD		(CONFIG_SYS_HZ / 2)
#define STATUS_LED_BIT1			0x02
#define STATUS_LED_STATE1		STATUS_LED_ON
#define STATUS_LED_PERIOD1		(CONFIG_SYS_HZ / 2)
#define STATUS_LED_BOOT			STATUS_LED_BIT
#define STATUS_LED_GREEN		STATUS_LED_BIT1

/* Enable Multi Bus support for I2C */
#define CONFIG_I2C_MULTI_BUS		1

/* Probe all devices */
#define CONFIG_SYS_I2C_NOPROBES		{{0x0, 0x0}}

/* USB */
#define CONFIG_USB_MUSB_GADGET
#define CONFIG_USB_MUSB_OMAP2PLUS
#define CONFIG_USB_MUSB_PIO_ONLY
#define CONFIG_USB_GADGET_DUALSPEED
#define CONFIG_TWL4030_USB		1
#define CONFIG_USB_ETHER
#define CONFIG_USB_ETHER_RNDIS
#define CONFIG_USB_GADGET
#define CONFIG_USB_GADGET_VBUS_DRAW	0
#define CONFIG_USB_GADGET_DOWNLOAD
#define CONFIG_G_DNL_VENDOR_NUM		0x0451
#define CONFIG_G_DNL_PRODUCT_NUM	0xd022
#define CONFIG_G_DNL_MANUFACTURER	"TI"
#define CONFIG_USB_FUNCTION_FASTBOOT
#define CONFIG_CMD_FASTBOOT
#define CONFIG_ANDROID_BOOT_IMAGE
#define CONFIG_FASTBOOT_BUF_ADDR	CONFIG_SYS_LOAD_ADDR
#define CONFIG_FASTBOOT_BUF_SIZE	0x07000000

/* USB EHCI */
#define CONFIG_CMD_USB
#define CONFIG_USB_EHCI

#define CONFIG_USB_EHCI_OMAP
#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO	147

#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
#define CONFIG_USB_HOST_ETHER
#define CONFIG_USB_ETHER_ASIX
#define CONFIG_USB_ETHER_MCS7830
#define CONFIG_USB_ETHER_SMSC95XX

/* GPIO banks */
#define CONFIG_OMAP3_GPIO_5		/* GPIO128..159 is in GPIO bank 5 */
#define CONFIG_OMAP3_GPIO_6		/* GPIO160..191 is in GPIO bank 6 */

/* commands to include */
#define CONFIG_CMD_ASKENV

#define CONFIG_CMD_CACHE

#define MTDIDS_DEFAULT			"nand0=nand"
#define MTDPARTS_DEFAULT		"mtdparts=nand:512k(x-loader),"\
					"1920k(u-boot),128k(u-boot-env),"\
					"4m(kernel),-(fs)"

#define CONFIG_USB_STORAGE	/* USB storage support		*/
#define CONFIG_CMD_NAND		/* NAND support			*/
#define CONFIG_CMD_LED		/* LED support			*/
#define CONFIG_CMD_GPIO     /* Enable gpio command */
#define CONFIG_CMD_DHCP

#define CONFIG_VIDEO_OMAP3	/* DSS Support			*/

/*
 * TWL4030
 */
#define CONFIG_TWL4030_LED		1

/*
 * Board NAND Info.
 */
#define CONFIG_SYS_NAND_QUIET_TEST	1
#define CONFIG_NAND_OMAP_GPMC
#define CONFIG_SYS_MAX_NAND_DEVICE	1		/* Max number of NAND */
							/* devices */

#define CONFIG_EXTRA_ENV_SETTINGS \
	"loadaddr=0x80200000\0" \
	"rdaddr=0x81000000\0" \
	"fdt_high=0xffffffff\0" \
	"fdtaddr=0x80f80000\0" \
	"usbtty=cdc_acm\0" \
	"bootfile=uImage\0" \
	"ramdisk=ramdisk.gz\0" \
	"bootdir=/boot\0" \
	"bootpart=0:2\0" \
	"console=ttyO2,115200n8\0" \
	"mpurate=auto\0" \
	"buddy=none\0" \
	"optargs=\0" \
	"camera=none\0" \
	"vram=12M\0" \
	"dvimode=640x480MR-16@60\0" \
	"defaultdisplay=dvi\0" \
	"mmcdev=0\0" \
	"mmcroot=/dev/mmcblk0p2 rw\0" \
	"mmcrootfstype=ext3 rootwait\0" \
	"nandroot=ubi0:rootfs ubi.mtd=4\0" \
	"nandrootfstype=ubifs\0" \
	"ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=0x81000000,64M\0" \
	"ramrootfstype=ext2\0" \
	"mmcargs=setenv bootargs console=${console} " \
		"${optargs} " \
		"mpurate=${mpurate} " \
		"buddy=${buddy} "\
		"camera=${camera} "\
		"vram=${vram} " \
		"omapfb.mode=dvi:${dvimode} " \
		"omapdss.def_disp=${defaultdisplay} " \
		"root=${mmcroot} " \
		"rootfstype=${mmcrootfstype}\0" \
	"nandargs=setenv bootargs console=${console} " \
		"${optargs} " \
		"mpurate=${mpurate} " \
		"buddy=${buddy} "\
		"camera=${camera} "\
		"vram=${vram} " \
		"omapfb.mode=dvi:${dvimode} " \
		"omapdss.def_disp=${defaultdisplay} " \
		"root=${nandroot} " \
		"rootfstype=${nandrootfstype}\0" \
	"findfdt=" \
		"if test $beaglerev = AxBx; then " \
			"setenv fdtfile omap3-beagle.dtb; fi; " \
		"if test $beaglerev = Cx; then " \
			"setenv fdtfile omap3-beagle.dtb; fi; " \
		"if test $beaglerev = C4; then " \
			"setenv fdtfile omap3-beagle.dtb; fi; " \
		"if test $beaglerev = xMAB; then " \
			"setenv fdtfile omap3-beagle-xm-ab.dtb; fi; " \
		"if test $beaglerev = xMC; then " \
			"setenv fdtfile omap3-beagle-xm.dtb; fi; " \
		"if test $fdtfile = undefined; then " \
			"echo WARNING: Could not determine device tree to use; fi; \0" \
	"validatefdt=" \
		"if test $beaglerev = xMAB; then " \
			"if test ! -e mmc ${bootpart} ${bootdir}/${fdtfile}; then " \
				"setenv fdtfile omap3-beagle-xm.dtb; " \
			"fi; " \
		"fi; \0" \
	"bootenv=uEnv.txt\0" \
	"loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \
	"importbootenv=echo Importing environment from mmc ...; " \
		"env import -t -r $loadaddr $filesize\0" \
	"ramargs=setenv bootargs console=${console} " \
		"${optargs} " \
		"mpurate=${mpurate} " \
		"buddy=${buddy} "\
		"vram=${vram} " \
		"omapfb.mode=dvi:${dvimode} " \
		"omapdss.def_disp=${defaultdisplay} " \
		"root=${ramroot} " \
		"rootfstype=${ramrootfstype}\0" \
	"loadramdisk=load mmc ${bootpart} ${rdaddr} ${bootdir}/${ramdisk}\0" \
	"loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \
	"loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \
	"bootscript=echo Running bootscript from mmc${mmcdev} ...; " \
		"source ${loadaddr}\0" \
	"loadfdt=run validatefdt; load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}\0" \
	"mmcboot=echo Booting from mmc ...; " \
		"run mmcargs; " \
		"bootm ${loadaddr}\0" \
	"mmcbootz=echo Booting with DT from mmc${mmcdev} ...; " \
		"run mmcargs; " \
		"bootz ${loadaddr} - ${fdtaddr}\0" \
	"nandboot=echo Booting from nand ...; " \
		"run nandargs; " \
		"nand read ${loadaddr} 280000 400000; " \
		"bootm ${loadaddr}\0" \
	"ramboot=echo Booting from ramdisk ...; " \
		"run ramargs; " \
		"bootm ${loadaddr}\0" \
	"userbutton=if gpio input 173; then run userbutton_xm; " \
		"else run userbutton_nonxm; fi;\0" \
	"userbutton_xm=gpio input 4;\0" \
	"userbutton_nonxm=gpio input 7;\0"
/* "run userbutton" will return 1 (false) if pressed and 0 (true) if not */
#define CONFIG_BOOTCOMMAND \
	"run findfdt; " \
	"mmc dev ${mmcdev}; if mmc rescan; then " \
		"if run userbutton; then " \
			"setenv bootenv uEnv.txt;" \
		"else " \
			"setenv bootenv user.txt;" \
		"fi;" \
		"echo SD/MMC found on device ${mmcdev};" \
		"if run loadbootenv; then " \
			"echo Loaded environment from ${bootenv};" \
			"run importbootenv;" \
		"fi;" \
		"if test -n $uenvcmd; then " \
			"echo Running uenvcmd ...;" \
			"run uenvcmd;" \
		"fi;" \
		"if run loadbootscript; then " \
			"run bootscript; " \
		"else " \
			"if run loadimage; then " \
				"run mmcboot;" \
			"fi;" \
		"fi; " \
	"fi;" \
	"run nandboot;" \
	"setenv bootfile zImage;" \
	"if run loadimage; then " \
		"run loadfdt;" \
		"run mmcbootz; " \
	"fi; " \

/*
 * OMAP3 has 12 GP timers, they can be driven by the system clock
 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
 * This rate is divided by a local divisor.
 */
#define CONFIG_SYS_PTV			2       /* Divisor: 2^(PTV+1) => 8 */

/*-----------------------------------------------------------------------
 * FLASH and environment organization
 */

/* **** PISMO SUPPORT *** */
#if defined(CONFIG_CMD_NAND)
#define CONFIG_SYS_FLASH_BASE		NAND_BASE
#endif

/* Monitor at start of flash */
#define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_FLASH_BASE
#define CONFIG_SYS_ONENAND_BASE		ONENAND_MAP

#define CONFIG_ENV_IS_IN_NAND		1
#define CONFIG_ENV_SIZE			(128 << 10)	/* 128 KiB */
#define ONENAND_ENV_OFFSET		0x260000 /* environment starts here */
#define SMNAND_ENV_OFFSET		0x260000 /* environment starts here */

#define CONFIG_SYS_ENV_SECT_SIZE	(128 << 10)	/* 128 KiB */
#define CONFIG_ENV_OFFSET		SMNAND_ENV_OFFSET
#define CONFIG_ENV_ADDR			SMNAND_ENV_OFFSET

#define CONFIG_OMAP3_SPI

#define CONFIG_SYS_CACHELINE_SIZE	64

/* Defines for SPL */
#define CONFIG_SPL_OMAP3_ID_NAND

/* NAND boot config */
#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_PAGE_COUNT	64
#define CONFIG_SYS_NAND_PAGE_SIZE	2048
#define CONFIG_SYS_NAND_OOBSIZE		64
#define CONFIG_SYS_NAND_BLOCK_SIZE	(128*1024)
#define CONFIG_SYS_NAND_BAD_BLOCK_POS	0
#define CONFIG_SYS_NAND_ECCPOS		{2, 3, 4, 5, 6, 7, 8, 9,\
						10, 11, 12, 13}
#define CONFIG_SYS_NAND_ECCSIZE		512
#define CONFIG_SYS_NAND_ECCBYTES	3
#define CONFIG_NAND_OMAP_ECCSCHEME	OMAP_ECC_HAM1_CODE_HW
#define CONFIG_SYS_NAND_U_BOOT_OFFS	0x80000
/* NAND: SPL falcon mode configs */
#ifdef CONFIG_SPL_OS_BOOT
#define CONFIG_CMD_SPL_NAND_OFS		0x240000
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS	0x280000
#define CONFIG_CMD_SPL_WRITE_SIZE	0x2000
#endif

#endif /* __CONFIG_H */
Commit	Line	Data
f904cdbb DB	1	/*
	2	* (C) Copyright 2006-2008
	3	* Texas Instruments.
	4	* Richard Woodruff <r-woodruff2@ti.com>
	5	* Syed Mohammed Khasim <x0khasim@ti.com>
	6	*
	7	* Configuration settings for the TI OMAP3530 Beagle board.
	8	*
3765b3e7	9	* SPDX-License-Identifier: GPL-2.0+
f904cdbb DB	10	*/
	11
	12	#ifndef __CONFIG_H
	13	#define __CONFIG_H
f904cdbb	14
df4dbb5d TR	15	#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
df4dbb5d TR	16
f904cdbb	17	/*
df4dbb5d TR	18	* 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
	19	* 64 bytes before this address should be set aside for u-boot.img's
	20	* header. That is 0x800FFFC0--0x80100000 should not be used for any
	21	* other needs. We use this rather than the inherited defines from
	22	* ti_armv7_common.h for backwards compatibility.
f904cdbb	23	*/
df4dbb5d TR	24	#define CONFIG_SYS_TEXT_BASE 0x80100000
	25	#define CONFIG_SPL_BSS_START_ADDR 0x80000000
	26	#define CONFIG_SPL_BSS_MAX_SIZE (512 << 10) /* 512 KB */
	27	#define CONFIG_SYS_SPL_MALLOC_START 0x80208000
	28	#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
cae377b5	29
df4dbb5d	30	#include <configs/ti_omap3_common.h>
f904cdbb	31
6a6b62e3 SP	32	/*
	33	* Display CPU and Board information
	34	*/
	35	#define CONFIG_DISPLAY_CPUINFO 1
	36	#define CONFIG_DISPLAY_BOARDINFO 1
	37
f904cdbb DB	38	#define CONFIG_MISC_INIT_R
f904cdbb DB	39
f904cdbb	40	#define CONFIG_REVISION_TAG 1
f904cdbb	41	#define CONFIG_ENV_OVERWRITE
f904cdbb	42
70d8c944 JK	43	/* Status LED */
	44	#define CONFIG_STATUS_LED 1
	45	#define CONFIG_BOARD_SPECIFIC_LED 1
	46	#define STATUS_LED_BIT 0x01
	47	#define STATUS_LED_STATE STATUS_LED_ON
	48	#define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2)
	49	#define STATUS_LED_BIT1 0x02
	50	#define STATUS_LED_STATE1 STATUS_LED_ON
	51	#define STATUS_LED_PERIOD1 (CONFIG_SYS_HZ / 2)
	52	#define STATUS_LED_BOOT STATUS_LED_BIT
	53	#define STATUS_LED_GREEN STATUS_LED_BIT1
	54
f74fc4ae JK	55	/* Enable Multi Bus support for I2C */
	56	#define CONFIG_I2C_MULTI_BUS 1
	57
	58	/* Probe all devices */
8c4e0ca6	59	#define CONFIG_SYS_I2C_NOPROBES {{0x0, 0x0}}
f74fc4ae	60
25374bfb	61	/* USB */
95de1e2f	62	#define CONFIG_USB_MUSB_GADGET
c2af345e	63	#define CONFIG_USB_MUSB_OMAP2PLUS
95de1e2f	64	#define CONFIG_USB_MUSB_PIO_ONLY
c2af345e	65	#define CONFIG_USB_GADGET_DUALSPEED
25374bfb	66	#define CONFIG_TWL4030_USB 1
c642b151 IY	67	#define CONFIG_USB_ETHER
c642b151 IY	68	#define CONFIG_USB_ETHER_RNDIS
dd5b68fb RH	69	#define CONFIG_USB_GADGET
dd5b68fb RH	70	#define CONFIG_USB_GADGET_VBUS_DRAW 0
01acd6ab	71	#define CONFIG_USB_GADGET_DOWNLOAD
dd5b68fb RH	72	#define CONFIG_G_DNL_VENDOR_NUM 0x0451
	73	#define CONFIG_G_DNL_PRODUCT_NUM 0xd022
	74	#define CONFIG_G_DNL_MANUFACTURER "TI"
17da3c0c	75	#define CONFIG_USB_FUNCTION_FASTBOOT
dd5b68fb RH	76	#define CONFIG_CMD_FASTBOOT
dd5b68fb RH	77	#define CONFIG_ANDROID_BOOT_IMAGE
a588d99a PK	78	#define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR
a588d99a PK	79	#define CONFIG_FASTBOOT_BUF_SIZE 0x07000000
25374bfb	80
d90859a6 AH	81	/* USB EHCI */
	82	#define CONFIG_CMD_USB
	83	#define CONFIG_USB_EHCI
928c4bdf	84
29321c05	85	#define CONFIG_USB_EHCI_OMAP
29321c05 IY	86	#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 147
29321c05 IY	87
d90859a6	88	#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
2162439a	89	#define CONFIG_USB_HOST_ETHER
54b62d59	90	#define CONFIG_USB_ETHER_ASIX
a743415f	91	#define CONFIG_USB_ETHER_MCS7830
eddf6d28	92	#define CONFIG_USB_ETHER_SMSC95XX
2162439a	93
ce23b18b SR	94	/* GPIO banks */
	95	#define CONFIG_OMAP3_GPIO_5 /* GPIO128..159 is in GPIO bank 5 */
	96	#define CONFIG_OMAP3_GPIO_6 /* GPIO160..191 is in GPIO bank 6 */
d90859a6	97
f904cdbb	98	/* commands to include */
776bebb7 TR	99	#define CONFIG_CMD_ASKENV
776bebb7 TR	100
95c6f6d3	101	#define CONFIG_CMD_CACHE
df4dbb5d	102
917cfc70 NM	103	#define MTDIDS_DEFAULT "nand0=nand"
	104	#define MTDPARTS_DEFAULT "mtdparts=nand:512k(x-loader),"\
	105	"1920k(u-boot),128k(u-boot-env),"\
	106	"4m(kernel),-(fs)"
f904cdbb	107
d90859a6	108	#define CONFIG_USB_STORAGE /* USB storage support */
f904cdbb	109	#define CONFIG_CMD_NAND /* NAND support */
70d8c944	110	#define CONFIG_CMD_LED /* LED support */
aae58b95	111	#define CONFIG_CMD_GPIO /* Enable gpio command */
fafee9ed	112	#define CONFIG_CMD_DHCP
f904cdbb	113
25a4d017	114	#define CONFIG_VIDEO_OMAP3 /* DSS Support */
f904cdbb	115
2c155130 TR	116	/*
	117	* TWL4030
	118	*/
2c155130 TR	119	#define CONFIG_TWL4030_LED 1
2c155130 TR	120
f904cdbb DB	121	/*
	122	* Board NAND Info.
	123	*/
60c23173	124	#define CONFIG_SYS_NAND_QUIET_TEST 1
f904cdbb	125	#define CONFIG_NAND_OMAP_GPMC
f904cdbb DB	126	#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
f904cdbb DB	127	/* devices */
f904cdbb	128
f904cdbb	129	#define CONFIG_EXTRA_ENV_SETTINGS \
f4b36ea9 JK	130	"loadaddr=0x80200000\0" \
f4b36ea9 JK	131	"rdaddr=0x81000000\0" \
2ade496f NM	132	"fdt_high=0xffffffff\0" \
2ade496f NM	133	"fdtaddr=0x80f80000\0" \
25374bfb	134	"usbtty=cdc_acm\0" \
a33e3c79	135	"bootfile=uImage\0" \
102ce9ea NM	136	"ramdisk=ramdisk.gz\0" \
	137	"bootdir=/boot\0" \
	138	"bootpart=0:2\0" \
27b8c8f2	139	"console=ttyO2,115200n8\0" \
f6e593bb	140	"mpurate=auto\0" \
847b83d0	141	"buddy=none\0" \
c522eac4 JK	142	"optargs=\0" \
c522eac4 JK	143	"camera=none\0" \
13d2cb98	144	"vram=12M\0" \
f4b36ea9	145	"dvimode=640x480MR-16@60\0" \
13d2cb98	146	"defaultdisplay=dvi\0" \
0cd31144	147	"mmcdev=0\0" \
13d2cb98 SS	148	"mmcroot=/dev/mmcblk0p2 rw\0" \
13d2cb98 SS	149	"mmcrootfstype=ext3 rootwait\0" \
3c6e50d7 SS	150	"nandroot=ubi0:rootfs ubi.mtd=4\0" \
3c6e50d7 SS	151	"nandrootfstype=ubifs\0" \
f4b36ea9 JK	152	"ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=0x81000000,64M\0" \
f4b36ea9 JK	153	"ramrootfstype=ext2\0" \
f904cdbb	154	"mmcargs=setenv bootargs console=${console} " \
c522eac4	155	"${optargs} " \
5af32460	156	"mpurate=${mpurate} " \
b1660314	157	"buddy=${buddy} "\
c522eac4	158	"camera=${camera} "\
13d2cb98 SS	159	"vram=${vram} " \
13d2cb98 SS	160	"omapfb.mode=dvi:${dvimode} " \
13d2cb98 SS	161	"omapdss.def_disp=${defaultdisplay} " \
	162	"root=${mmcroot} " \
	163	"rootfstype=${mmcrootfstype}\0" \
f904cdbb	164	"nandargs=setenv bootargs console=${console} " \
c522eac4	165	"${optargs} " \
5af32460	166	"mpurate=${mpurate} " \
b1660314	167	"buddy=${buddy} "\
c522eac4	168	"camera=${camera} "\
13d2cb98 SS	169	"vram=${vram} " \
13d2cb98 SS	170	"omapfb.mode=dvi:${dvimode} " \
13d2cb98 SS	171	"omapdss.def_disp=${defaultdisplay} " \
	172	"root=${nandroot} " \
	173	"rootfstype=${nandrootfstype}\0" \
2ade496f NM	174	"findfdt=" \
	175	"if test $beaglerev = AxBx; then " \
	176	"setenv fdtfile omap3-beagle.dtb; fi; " \
	177	"if test $beaglerev = Cx; then " \
	178	"setenv fdtfile omap3-beagle.dtb; fi; " \
5c9038b6 RN	179	"if test $beaglerev = C4; then " \
5c9038b6 RN	180	"setenv fdtfile omap3-beagle.dtb; fi; " \
2ade496f	181	"if test $beaglerev = xMAB; then " \
3d47ffb9	182	"setenv fdtfile omap3-beagle-xm-ab.dtb; fi; " \
2ade496f NM	183	"if test $beaglerev = xMC; then " \
	184	"setenv fdtfile omap3-beagle-xm.dtb; fi; " \
	185	"if test $fdtfile = undefined; then " \
	186	"echo WARNING: Could not determine device tree to use; fi; \0" \
4fa2427c RN	187	"validatefdt=" \
	188	"if test $beaglerev = xMAB; then " \
	189	"if test ! -e mmc ${bootpart} ${bootdir}/${fdtfile}; then " \
	190	"setenv fdtfile omap3-beagle-xm.dtb; " \
	191	"fi; " \
	192	"fi; \0" \
f835ea71 JK	193	"bootenv=uEnv.txt\0" \
f835ea71 JK	194	"loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \
cf073e49	195	"importbootenv=echo Importing environment from mmc ...; " \
44bd26fa	196	"env import -t -r $loadaddr $filesize\0" \
f4b36ea9 JK	197	"ramargs=setenv bootargs console=${console} " \
	198	"${optargs} " \
	199	"mpurate=${mpurate} " \
	200	"buddy=${buddy} "\
	201	"vram=${vram} " \
	202	"omapfb.mode=dvi:${dvimode} " \
	203	"omapdss.def_disp=${defaultdisplay} " \
	204	"root=${ramroot} " \
	205	"rootfstype=${ramrootfstype}\0" \
102ce9ea NM	206	"loadramdisk=load mmc ${bootpart} ${rdaddr} ${bootdir}/${ramdisk}\0" \
102ce9ea NM	207	"loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \
09642269 GG	208	"loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \
	209	"bootscript=echo Running bootscript from mmc${mmcdev} ...; " \
	210	"source ${loadaddr}\0" \
4fa2427c	211	"loadfdt=run validatefdt; load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}\0" \
f904cdbb DB	212	"mmcboot=echo Booting from mmc ...; " \
	213	"run mmcargs; " \
	214	"bootm ${loadaddr}\0" \
ea70690d NM	215	"mmcbootz=echo Booting with DT from mmc${mmcdev} ...; " \
	216	"run mmcargs; " \
	217	"bootz ${loadaddr} - ${fdtaddr}\0" \
f904cdbb DB	218	"nandboot=echo Booting from nand ...; " \
	219	"run nandargs; " \
	220	"nand read ${loadaddr} 280000 400000; " \
	221	"bootm ${loadaddr}\0" \
f4b36ea9 JK	222	"ramboot=echo Booting from ramdisk ...; " \
	223	"run ramargs; " \
	224	"bootm ${loadaddr}\0" \
aae58b95 JF	225	"userbutton=if gpio input 173; then run userbutton_xm; " \
	226	"else run userbutton_nonxm; fi;\0" \
	227	"userbutton_xm=gpio input 4;\0" \
	228	"userbutton_nonxm=gpio input 7;\0"
d7aff44a	229	/* "run userbutton" will return 1 (false) if pressed and 0 (true) if not */
f904cdbb	230	#define CONFIG_BOOTCOMMAND \
2ade496f	231	"run findfdt; " \
66968110	232	"mmc dev ${mmcdev}; if mmc rescan; then " \
aae58b95 JF	233	"if run userbutton; then " \
	234	"setenv bootenv uEnv.txt;" \
	235	"else " \
f835ea71 JK	236	"setenv bootenv user.txt;" \
f835ea71 JK	237	"fi;" \
cf073e49 AH	238	"echo SD/MMC found on device ${mmcdev};" \
cf073e49 AH	239	"if run loadbootenv; then " \
f835ea71	240	"echo Loaded environment from ${bootenv};" \
cf073e49 AH	241	"run importbootenv;" \
	242	"fi;" \
	243	"if test -n $uenvcmd; then " \
	244	"echo Running uenvcmd ...;" \
	245	"run uenvcmd;" \
	246	"fi;" \
09642269 GG	247	"if run loadbootscript; then " \
	248	"run bootscript; " \
	249	"else " \
	250	"if run loadimage; then " \
	251	"run mmcboot;" \
	252	"fi;" \
	253	"fi; " \
cf073e49 AH	254	"fi;" \
cf073e49 AH	255	"run nandboot;" \
ea70690d NM	256	"setenv bootfile zImage;" \
	257	"if run loadimage; then " \
	258	"run loadfdt;" \
	259	"run mmcbootz; " \
	260	"fi; " \
f904cdbb	261
f904cdbb	262	/*
d3a513c2 MP	263	* OMAP3 has 12 GP timers, they can be driven by the system clock
	264	* (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
	265	* This rate is divided by a local divisor.
f904cdbb	266	*/
d3a513c2	267	#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
f904cdbb	268
f904cdbb DB	269	/*-----------------------------------------------------------------------
	270	* FLASH and environment organization
	271	*/
	272
	273	/* ** PISMO SUPPORT * */
6cbec7b3	274	#if defined(CONFIG_CMD_NAND)
222a3113	275	#define CONFIG_SYS_FLASH_BASE NAND_BASE
6cbec7b3	276	#endif
f904cdbb DB	277
	278	/* Monitor at start of flash */
	279	#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
	280	#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
	281
	282	#define CONFIG_ENV_IS_IN_NAND 1
df4dbb5d	283	#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
f904cdbb DB	284	#define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */
	285	#define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
	286
6cbec7b3 LC	287	#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
6cbec7b3 LC	288	#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
f904cdbb DB	289	#define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
f904cdbb DB	290
53736baa DB	291	#define CONFIG_OMAP3_SPI
53736baa DB	292
8e40852f A	293	#define CONFIG_SYS_CACHELINE_SIZE 64
8e40852f A	294
75c57a35	295	/* Defines for SPL */
75c57a35	296	#define CONFIG_SPL_OMAP3_ID_NAND
75c57a35 TR	297
75c57a35 TR	298	/* NAND boot config */
55f1b39f	299	#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
75c57a35 TR	300	#define CONFIG_SYS_NAND_5_ADDR_CYCLE
	301	#define CONFIG_SYS_NAND_PAGE_COUNT 64
	302	#define CONFIG_SYS_NAND_PAGE_SIZE 2048
	303	#define CONFIG_SYS_NAND_OOBSIZE 64
	304	#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
	305	#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
	306	#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
	307	10, 11, 12, 13}
	308	#define CONFIG_SYS_NAND_ECCSIZE 512
	309	#define CONFIG_SYS_NAND_ECCBYTES 3
3f719069	310	#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW
75c57a35	311	#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
434f2cfc	312	/* NAND: SPL falcon mode configs */
	313	#ifdef CONFIG_SPL_OS_BOOT
	314	#define CONFIG_CMD_SPL_NAND_OFS 0x240000
	315	#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
	316	#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
	317	#endif
75c57a35	318
f904cdbb	319	#endif /* __CONFIG_H */