[people/ms/u-boot.git] / include / configs / omap3_evm_common.h

/*
 * Common configuration settings for the TI OMAP3 EVM board.
 *
 * Copyright (C) 2006-2011 Texas Instruments Incorporated - http://www.ti.com/
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
 * kind, whether express or implied; without even the implied warranty
 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#ifndef __OMAP3_EVM_COMMON_H
#define __OMAP3_EVM_COMMON_H

/*
 * High level configuration options
 */
#define CONFIG_OMAP			/* This is TI OMAP core */
#define CONFIG_OMAP34XX			/* belonging to 34XX family */
#define CONFIG_OMAP3430			/* which is in a 3430 */

#define CONFIG_SDRC			/* The chip has SDRC controller */

#define CONFIG_OMAP3_EVM		/* This is a OMAP3 EVM */
#define CONFIG_OMAP3_MICRON_DDR		/* with MICRON DDR part */
#define CONFIG_TWL4030_POWER		/* with TWL4030 PMIC */

#undef CONFIG_USE_IRQ			/* no support for IRQs */

/*
 * Clock related definitions
 */
#define V_OSCK			26000000	/* Clock output from T2 */
#define V_SCLK			(V_OSCK >> 1)

/*
 * OMAP3 has 12 GP timers, they can be driven by the system clock
 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
 * This rate is divided by a local divisor.
 */
#define CONFIG_SYS_TIMERBASE		OMAP34XX_GPT2
#define CONFIG_SYS_PTV			2	/* Divisor: 2^(PTV+1) => 8 */
#define CONFIG_SYS_HZ			1000

/* Size of environment - 128KB */
#define CONFIG_ENV_SIZE			(128 << 10)

/* Size of malloc pool */
#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (128 << 10))

/*
 * Stack sizes
 * These values are used in start.S
 */
#define CONFIG_STACKSIZE	(128 << 10)	/* regular stack 128 KiB */

#ifdef CONFIG_USE_IRQ
#define CONFIG_STACKSIZE_IRQ	(4 << 10)	/* IRQ stack 4 KiB */
#define CONFIG_STACKSIZE_FIQ	(4 << 10)	/* FIQ stack 4 KiB */
#endif

/*
 * Physical Memory Map
 * Note 1: CS1 may or may not be populated
 * Note 2: SDRAM size is expected to be at least 32MB
 */
#define CONFIG_NR_DRAM_BANKS		2
#define PHYS_SDRAM_1			OMAP34XX_SDRC_CS0
#define PHYS_SDRAM_1_SIZE		(32 << 20)
#define PHYS_SDRAM_2			OMAP34XX_SDRC_CS1

/* SDRAM Bank Allocation method */
#define SDRC_R_B_C

/* Limits for memtest */
#define CONFIG_SYS_MEMTEST_START	(OMAP34XX_SDRC_CS0)
#define CONFIG_SYS_MEMTEST_END		(OMAP34XX_SDRC_CS0 + \
						0x01F00000) /* 31MB */

/* Default load address */
#define CONFIG_SYS_LOAD_ADDR		(OMAP34XX_SDRC_CS0)

/* -----------------------------------------------------------------------------
 * Hardware drivers
 * -----------------------------------------------------------------------------
 */

/*
 * NS16550 Configuration
 */
#define V_NS16550_CLK			48000000	/* 48MHz (APLL96/2) */

#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE	(-4)
#define CONFIG_SYS_NS16550_CLK		V_NS16550_CLK

/*
 * select serial console configuration
 */
#define CONFIG_CONS_INDEX		1
#define CONFIG_SERIAL1			1	/* UART1 on OMAP3 EVM */
#define CONFIG_SYS_NS16550_COM1		OMAP34XX_UART1
#define CONFIG_BAUDRATE			115200
#define CONFIG_SYS_BAUDRATE_TABLE	{4800, 9600, 19200, 38400, 57600,\
					115200}

/*
 * I2C
 */
#define CONFIG_HARD_I2C
#define CONFIG_DRIVER_OMAP34XX_I2C

#define CONFIG_SYS_I2C_SPEED		100000
#define CONFIG_SYS_I2C_SLAVE		1
#define CONFIG_SYS_I2C_BUS		0
#define CONFIG_SYS_I2C_BUS_SELECT	1

/*
 * PISMO support
 */
#define PISMO1_NAND_SIZE		GPMC_SIZE_128M
#define PISMO1_ONEN_SIZE		GPMC_SIZE_128M

/* Monitor at start of flash - Reserve 2 sectors */
#define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_FLASH_BASE

#define CONFIG_SYS_MONITOR_LEN		(256 << 10)

/* Start location & size of environment */
#define ONENAND_ENV_OFFSET		0x260000
#define SMNAND_ENV_OFFSET		0x260000

#define CONFIG_SYS_ENV_SECT_SIZE	(128 << 10)	/* 128 KiB */

/*
 * NAND
 */
/* Physical address to access NAND */
#define CONFIG_SYS_NAND_ADDR		NAND_BASE

/* Physical address to access NAND at CS0 */
#define CONFIG_SYS_NAND_BASE		NAND_BASE

/* Max number of NAND devices */
#define CONFIG_SYS_MAX_NAND_DEVICE	1

/* Timeout values (in ticks) */
#define CONFIG_SYS_FLASH_ERASE_TOUT	(100 * CONFIG_SYS_HZ)
#define CONFIG_SYS_FLASH_WRITE_TOUT	(100 * CONFIG_SYS_HZ)

/* Flash banks JFFS2 should use */
#define CONFIG_SYS_MAX_MTD_BANKS	(CONFIG_SYS_MAX_FLASH_BANKS + \
						CONFIG_SYS_MAX_NAND_DEVICE)

#define CONFIG_SYS_JFFS2_MEM_NAND
#define CONFIG_SYS_JFFS2_FIRST_BANK	CONFIG_SYS_MAX_FLASH_BANKS
#define CONFIG_SYS_JFFS2_NUM_BANKS	1

#define CONFIG_JFFS2_NAND
/* nand device jffs2 lives on */
#define CONFIG_JFFS2_DEV		"nand0"
/* Start of jffs2 partition */
#define CONFIG_JFFS2_PART_OFFSET	0x680000
/* Size of jffs2 partition */
#define CONFIG_JFFS2_PART_SIZE		0xf980000

/*
 * USB
 */
#ifdef CONFIG_USB_OMAP3

#ifdef CONFIG_MUSB_HCD
#define CONFIG_CMD_USB

#define CONFIG_USB_STORAGE
#define CONGIG_CMD_STORAGE
#define CONFIG_CMD_FAT

#ifdef CONFIG_USB_KEYBOARD
#define CONFIG_SYS_USB_EVENT_POLL
#define CONFIG_PREBOOT			"usb start"
#endif /* CONFIG_USB_KEYBOARD */

#endif /* CONFIG_MUSB_HCD */

#ifdef CONFIG_MUSB_UDC
/* USB device configuration */
#define CONFIG_USB_DEVICE
#define CONFIG_USB_TTY
#define CONFIG_SYS_CONSOLE_IS_IN_ENV

/* Change these to suit your needs */
#define CONFIG_USBD_VENDORID		0x0451
#define CONFIG_USBD_PRODUCTID		0x5678
#define CONFIG_USBD_MANUFACTURER	"Texas Instruments"
#define CONFIG_USBD_PRODUCT_NAME	"EVM"
#endif /* CONFIG_MUSB_UDC */

#endif /* CONFIG_USB_OMAP3 */

/* ----------------------------------------------------------------------------
 * U-boot features
 * ----------------------------------------------------------------------------
 */
#define CONFIG_SYS_PROMPT		"OMAP3_EVM # "
#define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
#define CONFIG_SYS_MAXARGS		16	/* max args for a command */

#define CONFIG_MISC_INIT_R

#define CONFIG_CMDLINE_TAG			/* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_REVISION_TAG

/* Size of Console IO buffer */
#define CONFIG_SYS_CBSIZE		512

/* Size of print buffer */
#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
						sizeof(CONFIG_SYS_PROMPT) + 16)

/* Size of bootarg buffer */
#define CONFIG_SYS_BARGSIZE		(CONFIG_SYS_CBSIZE)

#define CONFIG_BOOTFILE			"uImage"

/*
 * NAND / OneNAND
 */
#if defined(CONFIG_CMD_NAND)
#define CONFIG_SYS_FLASH_BASE		PISMO1_NAND_BASE

#define CONFIG_NAND_OMAP_GPMC
#define GPMC_NAND_ECC_LP_x16_LAYOUT
#define CONFIG_ENV_IS_IN_NAND
#define CONFIG_ENV_OFFSET		SMNAND_ENV_OFFSET
#elif defined(CONFIG_CMD_ONENAND)
#define CONFIG_SYS_FLASH_BASE		PISMO1_ONEN_BASE
#define CONFIG_SYS_ONENAND_BASE		ONENAND_MAP

#define CONFIG_ENV_IS_IN_ONENAND
#define CONFIG_ENV_OFFSET		ONENAND_ENV_OFFSET
#endif

#define CONFIG_ENV_ADDR			CONFIG_ENV_OFFSET

#if defined(CONFIG_CMD_NET)

/* Ethernet (SMSC9115 from SMSC9118 family) */
#define CONFIG_NET_MULTI
#define CONFIG_SMC911X
#define CONFIG_SMC911X_32_BIT
#define CONFIG_SMC911X_BASE		0x2C000000

/* BOOTP fields */
#define CONFIG_BOOTP_SUBNETMASK		0x00000001
#define CONFIG_BOOTP_GATEWAY		0x00000002
#define CONFIG_BOOTP_HOSTNAME		0x00000004
#define CONFIG_BOOTP_BOOTPATH		0x00000010

#endif /* CONFIG_CMD_NET */

/* Support for relocation */
#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
#define CONFIG_SYS_INIT_RAM_ADDR	0x4020f800
#define CONFIG_SYS_INIT_RAM_SIZE	0x800
#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
					 CONFIG_SYS_INIT_RAM_SIZE - \
					 GENERATED_GBL_DATA_SIZE)

/* -----------------------------------------------------------------------------
 * Board specific
 * -----------------------------------------------------------------------------
 */
#define CONFIG_SYS_NO_FLASH

/* Uncomment to define the board revision statically */
/* #define CONFIG_STATIC_BOARD_REV	OMAP3EVM_BOARD_GEN_2 */

#endif /* __OMAP3_EVM_COMMON_H */
Commit	Line	Data
3970884c SP	1	/*
	2	* Common configuration settings for the TI OMAP3 EVM board.
	3	*
	4	* Copyright (C) 2006-2011 Texas Instruments Incorporated - http://www.ti.com/
	5	*
	6	* This program is free software; you can redistribute it and/or
	7	* modify it under the terms of the GNU General Public License as
	8	* published by the Free Software Foundation; either version 2 of
	9	* the License, or (at your option) any later version.
	10	*
	11	* This program is distributed "as is" WITHOUT ANY WARRANTY of any
	12	* kind, whether express or implied; without even the implied warranty
	13	* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	* GNU General Public License for more details.
	15	*/
	16
	17	#ifndef __OMAP3_EVM_COMMON_H
	18	#define __OMAP3_EVM_COMMON_H
	19
	20	/*
	21	* High level configuration options
	22	*/
	23	#define CONFIG_OMAP /* This is TI OMAP core */
	24	#define CONFIG_OMAP34XX /* belonging to 34XX family */
	25	#define CONFIG_OMAP3430 /* which is in a 3430 */
	26
	27	#define CONFIG_SDRC /* The chip has SDRC controller */
	28
	29	#define CONFIG_OMAP3_EVM /* This is a OMAP3 EVM */
	30	#define CONFIG_OMAP3_MICRON_DDR /* with MICRON DDR part */
	31	#define CONFIG_TWL4030_POWER /* with TWL4030 PMIC */
	32
	33	#undef CONFIG_USE_IRQ /* no support for IRQs */
	34
	35	/*
	36	* Clock related definitions
	37	*/
	38	#define V_OSCK 26000000 /* Clock output from T2 */
	39	#define V_SCLK (V_OSCK >> 1)
	40
	41	/*
	42	* OMAP3 has 12 GP timers, they can be driven by the system clock
	43	* (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
	44	* This rate is divided by a local divisor.
	45	*/
	46	#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
	47	#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
	48	#define CONFIG_SYS_HZ 1000
	49
	50	/* Size of environment - 128KB */
	51	#define CONFIG_ENV_SIZE (128 << 10)
	52
	53	/* Size of malloc pool */
	54	#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
	55
	56	/*
	57	* Stack sizes
	58	* These values are used in start.S
	59	*/
	60	#define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */
	61
	62	#ifdef CONFIG_USE_IRQ
	63	#define CONFIG_STACKSIZE_IRQ (4 << 10) /* IRQ stack 4 KiB */
	64	#define CONFIG_STACKSIZE_FIQ (4 << 10) /* FIQ stack 4 KiB */
65	#endif
66
67	/*
68	* Physical Memory Map
69	* Note 1: CS1 may or may not be populated
70	* Note 2: SDRAM size is expected to be at least 32MB
71	*/
72	#define CONFIG_NR_DRAM_BANKS 2
73	#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
74	#define PHYS_SDRAM_1_SIZE (32 << 20)
75	#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
76
77	/* SDRAM Bank Allocation method */
78	#define SDRC_R_B_C
79
80	/* Limits for memtest */
81	#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
82	#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
83	0x01F00000) /* 31MB */
84
85	/* Default load address */
86	#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0)
87
88	/* -----------------------------------------------------------------------------
89	* Hardware drivers
90	* -----------------------------------------------------------------------------
91	*/
92
93	/*
94	* NS16550 Configuration
95	*/
96	#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
97
98	#define CONFIG_SYS_NS16550
99	#define CONFIG_SYS_NS16550_SERIAL
100	#define CONFIG_SYS_NS16550_REG_SIZE (-4)
101	#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
102
103	/*
104	* select serial console configuration
105	*/
106	#define CONFIG_CONS_INDEX 1
107	#define CONFIG_SERIAL1 1 /* UART1 on OMAP3 EVM */
108	#define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1
109	#define CONFIG_BAUDRATE 115200
110	#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
111	115200}
112
113	/*
114	* I2C
115	*/
116	#define CONFIG_HARD_I2C
117	#define CONFIG_DRIVER_OMAP34XX_I2C
118
119	#define CONFIG_SYS_I2C_SPEED 100000
120	#define CONFIG_SYS_I2C_SLAVE 1
121	#define CONFIG_SYS_I2C_BUS 0
122	#define CONFIG_SYS_I2C_BUS_SELECT 1
123
124	/*
125	* PISMO support
126	*/
127	#define PISMO1_NAND_SIZE GPMC_SIZE_128M
128	#define PISMO1_ONEN_SIZE GPMC_SIZE_128M
129
130	/* Monitor at start of flash - Reserve 2 sectors */
131	#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
132
133	#define CONFIG_SYS_MONITOR_LEN (256 << 10)
134
135	/* Start location & size of environment */
136	#define ONENAND_ENV_OFFSET 0x260000
137	#define SMNAND_ENV_OFFSET 0x260000
138
139	#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
140
141	/*
142	* NAND
143	*/
144	/* Physical address to access NAND */
145	#define CONFIG_SYS_NAND_ADDR NAND_BASE
146
147	/* Physical address to access NAND at CS0 */
148	#define CONFIG_SYS_NAND_BASE NAND_BASE
149
150	/* Max number of NAND devices */
151	#define CONFIG_SYS_MAX_NAND_DEVICE 1
152
153	/* Timeout values (in ticks) */
154	#define CONFIG_SYS_FLASH_ERASE_TOUT (100 * CONFIG_SYS_HZ)
155	#define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ)
156
157	/* Flash banks JFFS2 should use */
158	#define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \
159	CONFIG_SYS_MAX_NAND_DEVICE)
160
161	#define CONFIG_SYS_JFFS2_MEM_NAND
162	#define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS
163	#define CONFIG_SYS_JFFS2_NUM_BANKS 1
164
165	#define CONFIG_JFFS2_NAND
166	/* nand device jffs2 lives on */
167	#define CONFIG_JFFS2_DEV "nand0"
168	/* Start of jffs2 partition */
169	#define CONFIG_JFFS2_PART_OFFSET 0x680000
170	/* Size of jffs2 partition */
171	#define CONFIG_JFFS2_PART_SIZE 0xf980000
172
173	/*
174	* USB
175	*/
176	#ifdef CONFIG_USB_OMAP3
177
178	#ifdef CONFIG_MUSB_HCD
179	#define CONFIG_CMD_USB
180
181	#define CONFIG_USB_STORAGE
182	#define CONGIG_CMD_STORAGE
183	#define CONFIG_CMD_FAT
184
185	#ifdef CONFIG_USB_KEYBOARD
186	#define CONFIG_SYS_USB_EVENT_POLL
187	#define CONFIG_PREBOOT "usb start"
188	#endif /* CONFIG_USB_KEYBOARD */
189
190	#endif /* CONFIG_MUSB_HCD */
191
192	#ifdef CONFIG_MUSB_UDC
193	/* USB device configuration */
194	#define CONFIG_USB_DEVICE
195	#define CONFIG_USB_TTY
196	#define CONFIG_SYS_CONSOLE_IS_IN_ENV
197
198	/* Change these to suit your needs */
199	#define CONFIG_USBD_VENDORID 0x0451
200	#define CONFIG_USBD_PRODUCTID 0x5678
201	#define CONFIG_USBD_MANUFACTURER "Texas Instruments"
202	#define CONFIG_USBD_PRODUCT_NAME "EVM"
203	#endif /* CONFIG_MUSB_UDC */
204
205	#endif /* CONFIG_USB_OMAP3 */
206
207	/* ----------------------------------------------------------------------------
208	* U-boot features
209	* ----------------------------------------------------------------------------
210	*/
211	#define CONFIG_SYS_PROMPT "OMAP3_EVM # "
212	#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
213	#define CONFIG_SYS_MAXARGS 16 /* max args for a command */
214
215	#define CONFIG_MISC_INIT_R
216
217	#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
218	#define CONFIG_SETUP_MEMORY_TAGS
219	#define CONFIG_INITRD_TAG
220	#define CONFIG_REVISION_TAG
221
222	/* Size of Console IO buffer */
223	#define CONFIG_SYS_CBSIZE 512
224
225	/* Size of print buffer */
226	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
227	sizeof(CONFIG_SYS_PROMPT) + 16)
228
229	/* Size of bootarg buffer */
230	#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
231
232	#define CONFIG_BOOTFILE "uImage"
233
234	/*
235	* NAND / OneNAND
236	*/
237	#if defined(CONFIG_CMD_NAND)
238	#define CONFIG_SYS_FLASH_BASE PISMO1_NAND_BASE
239
240	#define CONFIG_NAND_OMAP_GPMC
241	#define GPMC_NAND_ECC_LP_x16_LAYOUT
242	#define CONFIG_ENV_IS_IN_NAND
243	#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
244	#elif defined(CONFIG_CMD_ONENAND)
245	#define CONFIG_SYS_FLASH_BASE PISMO1_ONEN_BASE
246	#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
247
248	#define CONFIG_ENV_IS_IN_ONENAND
249	#define CONFIG_ENV_OFFSET ONENAND_ENV_OFFSET
250	#endif
251
252	#define CONFIG_ENV_ADDR CONFIG_ENV_OFFSET
253
254	#if defined(CONFIG_CMD_NET)
255
256	/* Ethernet (SMSC9115 from SMSC9118 family) */
257	#define CONFIG_NET_MULTI
258	#define CONFIG_SMC911X
259	#define CONFIG_SMC911X_32_BIT
260	#define CONFIG_SMC911X_BASE 0x2C000000
261
262	/* BOOTP fields */
263	#define CONFIG_BOOTP_SUBNETMASK 0x00000001
264	#define CONFIG_BOOTP_GATEWAY 0x00000002
265	#define CONFIG_BOOTP_HOSTNAME 0x00000004
266	#define CONFIG_BOOTP_BOOTPATH 0x00000010
267
268	#endif /* CONFIG_CMD_NET */
269
270	/* Support for relocation */
271	#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
272	#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
273	#define CONFIG_SYS_INIT_RAM_SIZE 0x800
274	#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
275	CONFIG_SYS_INIT_RAM_SIZE - \
276	GENERATED_GBL_DATA_SIZE)
277
278	/* -----------------------------------------------------------------------------
279	* Board specific
280	* -----------------------------------------------------------------------------
281	*/
282	#define CONFIG_SYS_NO_FLASH
283
284	/* Uncomment to define the board revision statically */
285	/* #define CONFIG_STATIC_BOARD_REV OMAP3EVM_BOARD_GEN_2 */
286
287	#endif /* __OMAP3_EVM_COMMON_H */