projects / people / ms / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 3970884c SP |
1 | /* |
| 2 | * Common configuration settings for the TI OMAP3 EVM board. | |
| 3 | * | |
| 4 | * Copyright (C) 2006-2011 Texas Instruments Incorporated - http://www.ti.com/ | |
| 5 | * | |
| 1a459660 | 6 | * SPDX-License-Identifier: GPL-2.0+ |
| 3970884c SP |
7 | */ |
| 8 | ||
| 9 | #ifndef __OMAP3_EVM_COMMON_H | |
| 10 | #define __OMAP3_EVM_COMMON_H | |
| 11 | ||
| 12 | /* | |
| 13 | * High level configuration options | |
| 14 | */ | |
| 15 | #define CONFIG_OMAP /* This is TI OMAP core */ | |
| 16 | #define CONFIG_OMAP34XX /* belonging to 34XX family */ | |
| 308252ad | 17 | #define CONFIG_OMAP_GPIO |
| 806d2792 | 18 | #define CONFIG_OMAP_COMMON |
| 3970884c SP |
19 | |
| 20 | #define CONFIG_SDRC /* The chip has SDRC controller */ | |
| 21 | ||
| 22 | #define CONFIG_OMAP3_EVM /* This is a OMAP3 EVM */ | |
| 3970884c SP |
23 | #define CONFIG_TWL4030_POWER /* with TWL4030 PMIC */ |
| 24 | ||
| 3970884c SP |
25 | /* |
| 26 | * Clock related definitions | |
| 27 | */ | |
| 28 | #define V_OSCK 26000000 /* Clock output from T2 */ | |
| 29 | #define V_SCLK (V_OSCK >> 1) | |
| 30 | ||
| 31 | /* | |
| 32 | * OMAP3 has 12 GP timers, they can be driven by the system clock | |
| 33 | * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). | |
| 34 | * This rate is divided by a local divisor. | |
| 35 | */ | |
| 36 | #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2 | |
| 37 | #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ | |
| 3970884c SP |
38 | |
| 39 | /* Size of environment - 128KB */ | |
| 40 | #define CONFIG_ENV_SIZE (128 << 10) | |
| 41 | ||
| 42 | /* Size of malloc pool */ | |
| 43 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10)) | |
| 44 | ||
| 3970884c SP |
45 | /* |
| 46 | * Physical Memory Map | |
| 47 | * Note 1: CS1 may or may not be populated | |
| 48 | * Note 2: SDRAM size is expected to be at least 32MB | |
| 49 | */ | |
| 50 | #define CONFIG_NR_DRAM_BANKS 2 | |
| 51 | #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 | |
| 3970884c SP |
52 | #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 |
| 53 | ||
| 3970884c SP |
54 | /* Limits for memtest */ |
| 55 | #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) | |
| 56 | #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ | |
| 57 | 0x01F00000) /* 31MB */ | |
| 58 | ||
| 59 | /* Default load address */ | |
| 60 | #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) | |
| 61 | ||
| 62 | /* ----------------------------------------------------------------------------- | |
| 63 | * Hardware drivers | |
| 64 | * ----------------------------------------------------------------------------- | |
| 65 | */ | |
| 66 | ||
| 67 | /* | |
| 68 | * NS16550 Configuration | |
| 69 | */ | |
| 70 | #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ | |
| 71 | ||
| 72 | #define CONFIG_SYS_NS16550 | |
| 73 | #define CONFIG_SYS_NS16550_SERIAL | |
| 74 | #define CONFIG_SYS_NS16550_REG_SIZE (-4) | |
| 75 | #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK | |
| 76 | ||
| 77 | /* | |
| 78 | * select serial console configuration | |
| 79 | */ | |
| 80 | #define CONFIG_CONS_INDEX 1 | |
| 81 | #define CONFIG_SERIAL1 1 /* UART1 on OMAP3 EVM */ | |
| 82 | #define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1 | |
| 83 | #define CONFIG_BAUDRATE 115200 | |
| 84 | #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ | |
| 85 | 115200} | |
| 86 | ||
| 87 | /* | |
| 88 | * I2C | |
| 89 | */ | |
| 6789e84e HS |
90 | #define CONFIG_SYS_I2C |
| 91 | #define CONFIG_SYS_OMAP24_I2C_SPEED 100000 | |
| 92 | #define CONFIG_SYS_OMAP24_I2C_SLAVE 1 | |
| 93 | #define CONFIG_SYS_I2C_OMAP34XX | |
| 3970884c SP |
94 | |
| 95 | /* | |
| 96 | * PISMO support | |
| 97 | */ | |
| 98 | #define PISMO1_NAND_SIZE GPMC_SIZE_128M | |
| 99 | #define PISMO1_ONEN_SIZE GPMC_SIZE_128M | |
| 100 | ||
| 101 | /* Monitor at start of flash - Reserve 2 sectors */ | |
| 102 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE | |
| 103 | ||
| 104 | #define CONFIG_SYS_MONITOR_LEN (256 << 10) | |
| 105 | ||
| 106 | /* Start location & size of environment */ | |
| 107 | #define ONENAND_ENV_OFFSET 0x260000 | |
| 108 | #define SMNAND_ENV_OFFSET 0x260000 | |
| 109 | ||
| 110 | #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ | |
| 111 | ||
| 112 | /* | |
| 113 | * NAND | |
| 114 | */ | |
| 115 | /* Physical address to access NAND */ | |
| 116 | #define CONFIG_SYS_NAND_ADDR NAND_BASE | |
| 117 | ||
| 118 | /* Physical address to access NAND at CS0 */ | |
| 119 | #define CONFIG_SYS_NAND_BASE NAND_BASE | |
| 120 | ||
| 121 | /* Max number of NAND devices */ | |
| 122 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 | |
| b80a6603 | 123 | #define CONFIG_SYS_NAND_BUSWIDTH_16BIT 16 |
| 3970884c SP |
124 | /* Timeout values (in ticks) */ |
| 125 | #define CONFIG_SYS_FLASH_ERASE_TOUT (100 * CONFIG_SYS_HZ) | |
| 126 | #define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ) | |
| 127 | ||
| 128 | /* Flash banks JFFS2 should use */ | |
| 129 | #define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \ | |
| 130 | CONFIG_SYS_MAX_NAND_DEVICE) | |
| 131 | ||
| 132 | #define CONFIG_SYS_JFFS2_MEM_NAND | |
| 133 | #define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS | |
| 134 | #define CONFIG_SYS_JFFS2_NUM_BANKS 1 | |
| 135 | ||
| 136 | #define CONFIG_JFFS2_NAND | |
| 137 | /* nand device jffs2 lives on */ | |
| 138 | #define CONFIG_JFFS2_DEV "nand0" | |
| 139 | /* Start of jffs2 partition */ | |
| 140 | #define CONFIG_JFFS2_PART_OFFSET 0x680000 | |
| 141 | /* Size of jffs2 partition */ | |
| 142 | #define CONFIG_JFFS2_PART_SIZE 0xf980000 | |
| 143 | ||
| 144 | /* | |
| 145 | * USB | |
| 146 | */ | |
| 147 | #ifdef CONFIG_USB_OMAP3 | |
| 148 | ||
| 149 | #ifdef CONFIG_MUSB_HCD | |
| 150 | #define CONFIG_CMD_USB | |
| 151 | ||
| 152 | #define CONFIG_USB_STORAGE | |
| 153 | #define CONGIG_CMD_STORAGE | |
| 154 | #define CONFIG_CMD_FAT | |
| 155 | ||
| 156 | #ifdef CONFIG_USB_KEYBOARD | |
| 157 | #define CONFIG_SYS_USB_EVENT_POLL | |
| 158 | #define CONFIG_PREBOOT "usb start" | |
| 159 | #endif /* CONFIG_USB_KEYBOARD */ | |
| 160 | ||
| 161 | #endif /* CONFIG_MUSB_HCD */ | |
| 162 | ||
| 163 | #ifdef CONFIG_MUSB_UDC | |
| 164 | /* USB device configuration */ | |
| 165 | #define CONFIG_USB_DEVICE | |
| 166 | #define CONFIG_USB_TTY | |
| 167 | #define CONFIG_SYS_CONSOLE_IS_IN_ENV | |
| 168 | ||
| 169 | /* Change these to suit your needs */ | |
| 170 | #define CONFIG_USBD_VENDORID 0x0451 | |
| 171 | #define CONFIG_USBD_PRODUCTID 0x5678 | |
| 172 | #define CONFIG_USBD_MANUFACTURER "Texas Instruments" | |
| 173 | #define CONFIG_USBD_PRODUCT_NAME "EVM" | |
| 174 | #endif /* CONFIG_MUSB_UDC */ | |
| 175 | ||
| 176 | #endif /* CONFIG_USB_OMAP3 */ | |
| 177 | ||
| 178 | /* ---------------------------------------------------------------------------- | |
| 179 | * U-boot features | |
| 180 | * ---------------------------------------------------------------------------- | |
| 181 | */ | |
| 182 | #define CONFIG_SYS_PROMPT "OMAP3_EVM # " | |
| 3970884c SP |
183 | #define CONFIG_SYS_MAXARGS 16 /* max args for a command */ |
| 184 | ||
| 185 | #define CONFIG_MISC_INIT_R | |
| 186 | ||
| 187 | #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ | |
| 188 | #define CONFIG_SETUP_MEMORY_TAGS | |
| 189 | #define CONFIG_INITRD_TAG | |
| 190 | #define CONFIG_REVISION_TAG | |
| 191 | ||
| 192 | /* Size of Console IO buffer */ | |
| 193 | #define CONFIG_SYS_CBSIZE 512 | |
| 194 | ||
| 195 | /* Size of print buffer */ | |
| 196 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ | |
| 197 | sizeof(CONFIG_SYS_PROMPT) + 16) | |
| 198 | ||
| 199 | /* Size of bootarg buffer */ | |
| 200 | #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) | |
| 201 | ||
| 202 | #define CONFIG_BOOTFILE "uImage" | |
| 203 | ||
| 204 | /* | |
| 205 | * NAND / OneNAND | |
| 206 | */ | |
| 207 | #if defined(CONFIG_CMD_NAND) | |
| 208 | #define CONFIG_SYS_FLASH_BASE PISMO1_NAND_BASE | |
| 209 | ||
| 210 | #define CONFIG_NAND_OMAP_GPMC | |
| 3970884c SP |
211 | #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET |
| 212 | #elif defined(CONFIG_CMD_ONENAND) | |
| 213 | #define CONFIG_SYS_FLASH_BASE PISMO1_ONEN_BASE | |
| 214 | #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP | |
| edc633ea | 215 | #endif |
| 3970884c | 216 | |
| edc633ea SP |
217 | #if !defined(CONFIG_ENV_IS_NOWHERE) |
| 218 | #if defined(CONFIG_CMD_NAND) | |
| 219 | #define CONFIG_ENV_IS_IN_NAND | |
| 220 | #elif defined(CONFIG_CMD_ONENAND) | |
| 3970884c SP |
221 | #define CONFIG_ENV_IS_IN_ONENAND |
| 222 | #define CONFIG_ENV_OFFSET ONENAND_ENV_OFFSET | |
| 223 | #endif | |
| edc633ea | 224 | #endif /* CONFIG_ENV_IS_NOWHERE */ |
| 3970884c SP |
225 | |
| 226 | #define CONFIG_ENV_ADDR CONFIG_ENV_OFFSET | |
| 227 | ||
| 228 | #if defined(CONFIG_CMD_NET) | |
| 229 | ||
| 230 | /* Ethernet (SMSC9115 from SMSC9118 family) */ | |
| 3970884c SP |
231 | #define CONFIG_SMC911X |
| 232 | #define CONFIG_SMC911X_32_BIT | |
| 233 | #define CONFIG_SMC911X_BASE 0x2C000000 | |
| 234 | ||
| 235 | /* BOOTP fields */ | |
| 236 | #define CONFIG_BOOTP_SUBNETMASK 0x00000001 | |
| 237 | #define CONFIG_BOOTP_GATEWAY 0x00000002 | |
| 238 | #define CONFIG_BOOTP_HOSTNAME 0x00000004 | |
| 239 | #define CONFIG_BOOTP_BOOTPATH 0x00000010 | |
| 240 | ||
| 241 | #endif /* CONFIG_CMD_NET */ | |
| 242 | ||
| 243 | /* Support for relocation */ | |
| 244 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 | |
| 245 | #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 | |
| 246 | #define CONFIG_SYS_INIT_RAM_SIZE 0x800 | |
| 247 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ | |
| 248 | CONFIG_SYS_INIT_RAM_SIZE - \ | |
| 249 | GENERATED_GBL_DATA_SIZE) | |
| 250 | ||
| 251 | /* ----------------------------------------------------------------------------- | |
| 252 | * Board specific | |
| 253 | * ----------------------------------------------------------------------------- | |
| 254 | */ | |
| 255 | #define CONFIG_SYS_NO_FLASH | |
| 256 | ||
| 257 | /* Uncomment to define the board revision statically */ | |
| 258 | /* #define CONFIG_STATIC_BOARD_REV OMAP3EVM_BOARD_GEN_2 */ | |
| 259 | ||
| 8e40852f A |
260 | #define CONFIG_SYS_CACHELINE_SIZE 64 |
| 261 | ||
| 673283f3 TR |
262 | /* Defines for SPL */ |
| 263 | #define CONFIG_SPL | |
| 47f7bcae | 264 | #define CONFIG_SPL_FRAMEWORK |
| 673283f3 | 265 | #define CONFIG_SPL_TEXT_BASE 0x40200800 |
| e0820ccc | 266 | #define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */ |
| 673283f3 TR |
267 | #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK |
| 268 | ||
| 269 | #define CONFIG_SPL_BSS_START_ADDR 0x80000000 | |
| 270 | #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ | |
| 271 | ||
| 49175c49 | 272 | #define CONFIG_SPL_BOARD_INIT |
| 673283f3 TR |
273 | #define CONFIG_SPL_LIBCOMMON_SUPPORT |
| 274 | #define CONFIG_SPL_LIBDISK_SUPPORT | |
| 275 | #define CONFIG_SPL_I2C_SUPPORT | |
| 276 | #define CONFIG_SPL_LIBGENERIC_SUPPORT | |
| 277 | #define CONFIG_SPL_SERIAL_SUPPORT | |
| 278 | #define CONFIG_SPL_POWER_SUPPORT | |
| 279 | #define CONFIG_SPL_OMAP3_ID_NAND | |
| 280 | #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" | |
| 281 | ||
| 282 | /* | |
| 283 | * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM | |
| 284 | * 64 bytes before this address should be set aside for u-boot.img's | |
| 285 | * header. That is 0x800FFFC0--0x80100000 should not be used for any | |
| 286 | * other needs. | |
| 287 | */ | |
| 288 | #define CONFIG_SYS_TEXT_BASE 0x80100000 | |
| 289 | #define CONFIG_SYS_SPL_MALLOC_START 0x80208000 | |
| 290 | #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 | |
| 291 | ||
| 3970884c | 292 | #endif /* __OMAP3_EVM_COMMON_H */ |