[thirdparty/u-boot.git] / include / configs / omap3_logic.h

/*
 * (C) Copyright 2011 Logic Product Development <www.logicpd.com>
 *	Peter Barada <peter.barada@logicpd.com>
 *
 * Configuration settings for the Logic OMAP35x/DM37x SOM LV/Torpedo
 * reference boards.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __CONFIG_H
#define __CONFIG_H

/*
 * High Level Configuration Options
 */
#define CONFIG_OMAP			/* in a TI OMAP core */
#define CONFIG_OMAP3_LOGIC		/* working with Logic OMAP boards */
#define CONFIG_OMAP_GPIO
#define CONFIG_OMAP_COMMON
/* Common ARM Erratas */
#define CONFIG_ARM_ERRATA_454179
#define CONFIG_ARM_ERRATA_430973
#define CONFIG_ARM_ERRATA_621766

#define CONFIG_SYS_TEXT_BASE	0x80400000

#define CONFIG_SDRC	/* The chip has SDRC controller */

#include <asm/arch/cpu.h>	/* get chip and board defs */
#include <asm/arch/omap.h>

/*
 * Display CPU and Board information
 */
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO

/* Clock Defines */
#define V_OSCK			26000000	/* Clock output from T2 */
#define V_SCLK			(V_OSCK >> 1)

#define CONFIG_MISC_INIT_R		/* misc_init_r dumps the die id */

#define CONFIG_CMDLINE_TAG			/* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_REVISION_TAG

#define CONFIG_CMDLINE_EDITING			/* cmd line edit/history */
#define CONFIG_ZERO_BOOTDELAY_CHECK		/* check keypress w/no delay */

/*
 * Size of malloc() pool
 */
#define CONFIG_ENV_SIZE			(128 << 10)	/* 128 KiB */
						/* Sector */
#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (128 << 10))

/*
 * Hardware drivers
 */

/*
 * NS16550 Configuration
 */
#define V_NS16550_CLK			48000000	/* 48MHz (APLL96/2) */

#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE	(-4)
#define CONFIG_SYS_NS16550_CLK		V_NS16550_CLK

/*
 * select serial console configuration
 */
#define CONFIG_CONS_INDEX		1
#define CONFIG_SYS_NS16550_COM1		OMAP34XX_UART1
#define CONFIG_SERIAL1			1	/* UART1 on OMAP Logic boards */

/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_BAUDRATE			115200
#define CONFIG_SYS_BAUDRATE_TABLE	{4800, 9600, 19200, 38400, 57600,\
					115200}
#define CONFIG_GENERIC_MMC
#define CONFIG_MMC
#define CONFIG_OMAP_HSMMC
#define CONFIG_DOS_PARTITION

/* commands to include */
#define CONFIG_CMD_CACHE
#define CONFIG_CMD_EXT2		/* EXT2 Support			*/
#define CONFIG_CMD_FAT		/* FAT support			*/
#define CONFIG_CMD_JFFS2	/* JFFS2 Support		*/
#define CONFIG_CMD_MTDPARTS	/* Enable MTD parts commands */
#define CONFIG_MTD_DEVICE	/* needed for mtdparts commands */
#define MTDIDS_DEFAULT			"nand0=omap2-nand.0"
#define MTDPARTS_DEFAULT		"mtdparts=omap2-nand.0:512k(x-loader),"\
					"1920k(u-boot),128k(u-boot-env),"\
					"4m(kernel),-(fs)"

#define CONFIG_CMD_I2C		/* I2C serial bus support	*/
#define CONFIG_CMD_MMC		/* MMC support			*/
#define CONFIG_CMD_NAND		/* NAND support			*/
#define CONFIG_CMD_NAND_LOCK_UNLOCK	/* nand (un)lock commands	*/
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP

#define CONFIG_SYS_NO_FLASH

/*
 * I2C
 */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_OMAP24_I2C_SPEED	100000
#define CONFIG_SYS_OMAP24_I2C_SLAVE	1
#define CONFIG_SYS_I2C_OMAP34XX

/*
 * TWL4030
 */
#define CONFIG_TWL4030_POWER

/*
 * Board NAND Info.
 */
#define CONFIG_SYS_NAND_QUIET_TEST
#define CONFIG_NAND_OMAP_GPMC
#define CONFIG_SYS_NAND_ADDR		NAND_BASE	/* physical address */
							/* to access nand */
#define CONFIG_SYS_NAND_BASE		NAND_BASE	/* physical address */
							/* to access nand at */
							/* CS0 */

#define CONFIG_SYS_MAX_NAND_DEVICE	1		/* Max number of */
							/* NAND devices */
#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
#define CONFIG_JFFS2_NAND
/* nand device jffs2 lives on */
#define CONFIG_JFFS2_DEV		"nand0"
/* start of jffs2 partition */
#define CONFIG_JFFS2_PART_OFFSET	0x680000
#define CONFIG_JFFS2_PART_SIZE		0xf980000	/* size of jffs2 */
							/* partition */

/* Environment information */
#define CONFIG_BOOTDELAY		2

/*
 * PREBOOT assumes the 4.3" display is attached.  User can interrupt
 * and modify display variable to suit their needs.
 */
#define CONFIG_PREBOOT \
	"echo ======================NOTICE============================;"\
	"echo \"The u-boot environment is not set.\";"			\
	"echo \"If using a display a valid display varible for your panel\";" \
	"echo \"needs to be set.\";"					\
	"echo \"Valid display options are:\";"				\
	"echo \"  2 == LQ121S1DG31     TFT SVGA    (12.1)  Sharp\";"	\
	"echo \"  3 == LQ036Q1DA01     TFT QVGA    (3.6)   Sharp w/ASIC\";" \
	"echo \"  5 == LQ064D343       TFT VGA     (6.4)   Sharp\";"	\
	"echo \"  7 == LQ10D368        TFT VGA     (10.4)  Sharp\";"	\
	"echo \" 15 == LQ043T1DG01     TFT WQVGA   (4.3)   Sharp (DEFAULT)\";" \
	"echo \" vga[-dvi or -hdmi]    LCD VGA     640x480\";"          \
	"echo \" svga[-dvi or -hdmi]   LCD SVGA    800x600\";"          \
	"echo \" xga[-dvi or -hdmi]    LCD XGA     1024x768\";"         \
	"echo \" 720p[-dvi or -hdmi]   LCD 720P    1280x720\";"         \
	"echo \"Defaulting to 4.3 LCD panel (display=15).\";"		\
	"setenv display 15;"						\
	"setenv preboot;"						\
	"saveenv;"


#define CONFIG_EXTRA_ENV_SETTINGS \
	"loadaddr=0x81000000\0" \
	"bootfile=uImage\0" \
	"mtdids=" MTDIDS_DEFAULT "\0"	\
	"mtdparts=" MTDPARTS_DEFAULT "\0" \
	"mmcdev=0\0" \
	"autoboot=mmc dev ${mmcdev}; if mmc rescan; then " \
			"if run loadbootscript; then " \
				"run bootscript; " \
			"else " \
				"run defaultboot;" \
			"fi; " \
		"else run defaultboot; fi\0" \
	"defaultboot=run mmcramboot\0" \
	"consoledevice=ttyO0\0" \
	"display=15\0" \
	"setconsole=setenv console ${consoledevice},${baudrate}n8\0" \
	"dump_bootargs=echo 'Bootargs: '; echo $bootargs\0" \
	"rotation=0\0" \
	"vrfb_arg=if itest ${rotation} -ne 0; then " \
		"setenv bootargs ${bootargs} omapfb.vrfb=y " \
		"omapfb.rotate=${rotation}; " \
		"fi\0" \
	"otherbootargs=ignore_loglevel early_printk no_console_suspend\0" \
	"addmtdparts=setenv bootargs ${bootargs} ${mtdparts}\0" \
	"common_bootargs=setenv bootargs ${bootargs} display=${display} " \
		"${otherbootargs};" \
		"run addmtdparts; " \
		"run vrfb_arg\0" \
	"loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
	"bootscript=echo 'Running bootscript from mmc ...'; " \
		"source ${loadaddr}\0" \
	"loaduimage=mmc rescan ${mmcdev}; " \
		"fatload mmc ${mmcdev} ${loadaddr} ${bootfile}\0" \
	"ramdisksize=64000\0" \
	"ramdiskaddr=0x82000000\0" \
	"ramdiskimage=rootfs.ext2.gz.uboot\0" \
	"ramargs=run setconsole; setenv bootargs console=${console} " \
		"root=/dev/ram rw ramdisk_size=${ramdisksize}\0" \
	"mmcramboot=echo 'Booting kernel from mmc w/ramdisk...'; " \
		"run ramargs; " \
		"run common_bootargs; " \
		"run dump_bootargs; " \
		"run loaduimage; " \
		"fatload mmc ${mmcdev} ${ramdiskaddr} ${ramdiskimage}; "\
		"bootm ${loadaddr} ${ramdiskaddr}\0" \
	"ramboot=echo 'Booting kernel/ramdisk rootfs from tftp...'; " \
		"run ramargs; " \
		"run common_bootargs; " \
		"run dump_bootargs; " \
		"tftpboot ${loadaddr} ${bootfile}; "\
		"tftpboot ${ramdiskaddr} ${ramdiskimage}; "\
		"bootm ${loadaddr} ${ramdiskaddr}\0"

#define CONFIG_BOOTCOMMAND \
	"run autoboot"

#define CONFIG_AUTO_COMPLETE
/*
 * Miscellaneous configurable options
 */
#define CONFIG_SYS_LONGHELP		/* undef to save memory */
#define CONFIG_SYS_HUSH_PARSER		/* use "hush" command parser */
#define CONFIG_SYS_CBSIZE		512	/* Console I/O Buffer Size */
/* Print Buffer Size */
#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
					sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_MAXARGS		16	/* max number of command args */
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE		(CONFIG_SYS_CBSIZE)
/* memtest works on */
#define CONFIG_SYS_MEMTEST_START	(OMAP34XX_SDRC_CS0)
#define CONFIG_SYS_MEMTEST_END		(OMAP34XX_SDRC_CS0 + \
					0x01F00000) /* 31MB */

#define CONFIG_SYS_LOAD_ADDR		(OMAP34XX_SDRC_CS0) /* default load */
								/* address */

/*
 * OMAP3 has 12 GP timers, they can be driven by the system clock
 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
 * This rate is divided by a local divisor.
 */
#define CONFIG_SYS_TIMERBASE		(OMAP34XX_GPT2)
#define CONFIG_SYS_PTV			2	/* Divisor: 2^(PTV+1) => 8 */

/*
 * Physical Memory Map
 */
#define CONFIG_NR_DRAM_BANKS	2	/* CS1 may or may not be populated */
#define PHYS_SDRAM_1		OMAP34XX_SDRC_CS0
#define PHYS_SDRAM_2		OMAP34XX_SDRC_CS1

/*
 * FLASH and environment organization
 */

/* **** PISMO SUPPORT *** */
#define CONFIG_SYS_MONITOR_LEN		(256 << 10)	/* Reserve 2 sectors */

#if defined(CONFIG_CMD_NAND)
#define CONFIG_SYS_FLASH_BASE		NAND_BASE
#elif defined(CONFIG_CMD_ONENAND)
#define CONFIG_SYS_FLASH_BASE		ONENAND_MAP
#endif

/* Monitor at start of flash */
#define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_FLASH_BASE

#define SMNAND_ENV_OFFSET		0x260000 /* environment starts here */

#if defined(CONFIG_CMD_NAND)
#define CONFIG_NAND_OMAP_GPMC
#define CONFIG_ENV_IS_IN_NAND
#define CONFIG_ENV_OFFSET		SMNAND_ENV_OFFSET
#endif

#define CONFIG_SYS_ENV_SECT_SIZE	(128 << 10)	/* 128 KiB */
#define CONFIG_ENV_ADDR			CONFIG_ENV_OFFSET

#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
#define CONFIG_SYS_INIT_RAM_ADDR	0x4020f800
#define CONFIG_SYS_INIT_RAM_SIZE	0x800
#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
					 CONFIG_SYS_INIT_RAM_SIZE - \
					 GENERATED_GBL_DATA_SIZE)

/*
 * SMSC922x Ethernet
 */
#if defined(CONFIG_CMD_NET)

#define CONFIG_SMC911X
#define CONFIG_SMC911X_16_BIT
#define CONFIG_SMC911X_BASE	0x08000000

#endif /* (CONFIG_CMD_NET) */

/*
 * BOOTP fields
 */

#define CONFIG_BOOTP_SUBNETMASK		0x00000001
#define CONFIG_BOOTP_GATEWAY		0x00000002
#define CONFIG_BOOTP_HOSTNAME		0x00000004
#define CONFIG_BOOTP_BOOTPATH		0x00000010

#endif /* __CONFIG_H */
Commit	Line	Data
86887f8e PB	1	/*
	2	* (C) Copyright 2011 Logic Product Development <www.logicpd.com>
	3	* Peter Barada <peter.barada@logicpd.com>
	4	*
	5	* Configuration settings for the Logic OMAP35x/DM37x SOM LV/Torpedo
	6	* reference boards.
	7	*
3765b3e7	8	* SPDX-License-Identifier: GPL-2.0+
86887f8e PB	9	*/
	10
	11	#ifndef __CONFIG_H
	12	#define __CONFIG_H
	13
	14	/*
	15	* High Level Configuration Options
	16	*/
	17	#define CONFIG_OMAP /* in a TI OMAP core */
86887f8e	18	#define CONFIG_OMAP3_LOGIC /* working with Logic OMAP boards */
308252ad	19	#define CONFIG_OMAP_GPIO
806d2792	20	#define CONFIG_OMAP_COMMON
c6f90e14 NM	21	/* Common ARM Erratas */
	22	#define CONFIG_ARM_ERRATA_454179
	23	#define CONFIG_ARM_ERRATA_430973
	24	#define CONFIG_ARM_ERRATA_621766
86887f8e	25
86887f8e PB	26	#define CONFIG_SYS_TEXT_BASE 0x80400000
	27
	28	#define CONFIG_SDRC /* The chip has SDRC controller */
	29
	30	#include <asm/arch/cpu.h> /* get chip and board defs */
987ec585	31	#include <asm/arch/omap.h>
86887f8e PB	32
	33	/*
	34	* Display CPU and Board information
	35	*/
	36	#define CONFIG_DISPLAY_CPUINFO
	37	#define CONFIG_DISPLAY_BOARDINFO
	38
	39	/* Clock Defines */
	40	#define V_OSCK 26000000 /* Clock output from T2 */
	41	#define V_SCLK (V_OSCK >> 1)
	42
	43	#define CONFIG_MISC_INIT_R /* misc_init_r dumps the die id */
	44
	45	#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
	46	#define CONFIG_SETUP_MEMORY_TAGS
	47	#define CONFIG_INITRD_TAG
	48	#define CONFIG_REVISION_TAG
	49
	50	#define CONFIG_CMDLINE_EDITING /* cmd line edit/history */
	51	#define CONFIG_ZERO_BOOTDELAY_CHECK /* check keypress w/no delay */
	52
	53	/*
	54	* Size of malloc() pool
	55	*/
	56	#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
	57	/* Sector */
	58	#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
	59
	60	/*
	61	* Hardware drivers
	62	*/
	63
	64	/*
	65	* NS16550 Configuration
	66	*/
	67	#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
	68
	69	#define CONFIG_SYS_NS16550
	70	#define CONFIG_SYS_NS16550_SERIAL
	71	#define CONFIG_SYS_NS16550_REG_SIZE (-4)
	72	#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
	73
	74	/*
	75	* select serial console configuration
	76	*/
	77	#define CONFIG_CONS_INDEX 1
	78	#define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1
	79	#define CONFIG_SERIAL1 1 /* UART1 on OMAP Logic boards */
	80
	81	/* allow to overwrite serial and ethaddr */
	82	#define CONFIG_ENV_OVERWRITE
	83	#define CONFIG_BAUDRATE 115200
	84	#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
	85	115200}
	86	#define CONFIG_GENERIC_MMC
	87	#define CONFIG_MMC
	88	#define CONFIG_OMAP_HSMMC
	89	#define CONFIG_DOS_PARTITION
	90
	91	/* commands to include */
86887f8e PB	92	#define CONFIG_CMD_CACHE
	93	#define CONFIG_CMD_EXT2 /* EXT2 Support */
	94	#define CONFIG_CMD_FAT /* FAT support */
	95	#define CONFIG_CMD_JFFS2 /* JFFS2 Support */
	96	#define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */
	97	#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
	98	#define MTDIDS_DEFAULT "nand0=omap2-nand.0"
	99	#define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:512k(x-loader),"\
	100	"1920k(u-boot),128k(u-boot-env),"\
	101	"4m(kernel),-(fs)"
	102
	103	#define CONFIG_CMD_I2C /* I2C serial bus support */
	104	#define CONFIG_CMD_MMC /* MMC support */
	105	#define CONFIG_CMD_NAND /* NAND support */
	106	#define CONFIG_CMD_NAND_LOCK_UNLOCK /* nand (un)lock commands */
86887f8e PB	107	#define CONFIG_CMD_PING
86887f8e PB	108	#define CONFIG_CMD_DHCP
86887f8e	109
86887f8e PB	110	#define CONFIG_SYS_NO_FLASH
	111
	112	/*
	113	* I2C
	114	*/
6789e84e HS	115	#define CONFIG_SYS_I2C
	116	#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
	117	#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
	118	#define CONFIG_SYS_I2C_OMAP34XX
86887f8e PB	119
	120	/*
	121	* TWL4030
	122	*/
	123	#define CONFIG_TWL4030_POWER
	124
	125	/*
	126	* Board NAND Info.
	127	*/
	128	#define CONFIG_SYS_NAND_QUIET_TEST
	129	#define CONFIG_NAND_OMAP_GPMC
	130	#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
	131	/* to access nand */
	132	#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
	133	/* to access nand at */
	134	/* CS0 */
	135
	136	#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */
	137	/* NAND devices */
55f1b39f	138	#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
86887f8e PB	139	#define CONFIG_JFFS2_NAND
	140	/* nand device jffs2 lives on */
	141	#define CONFIG_JFFS2_DEV "nand0"
	142	/* start of jffs2 partition */
	143	#define CONFIG_JFFS2_PART_OFFSET 0x680000
	144	#define CONFIG_JFFS2_PART_SIZE 0xf980000 /* size of jffs2 */
	145	/* partition */
	146
	147	/* Environment information */
	148	#define CONFIG_BOOTDELAY 2
	149
	150	/*
	151	* PREBOOT assumes the 4.3" display is attached. User can interrupt
	152	* and modify display variable to suit their needs.
	153	*/
	154	#define CONFIG_PREBOOT \
	155	"echo ======================NOTICE============================;"\
	156	"echo \"The u-boot environment is not set.\";" \
	157	"echo \"If using a display a valid display varible for your panel\";" \
	158	"echo \"needs to be set.\";" \
	159	"echo \"Valid display options are:\";" \
	160	"echo \" 2 == LQ121S1DG31 TFT SVGA (12.1) Sharp\";" \
	161	"echo \" 3 == LQ036Q1DA01 TFT QVGA (3.6) Sharp w/ASIC\";" \
	162	"echo \" 5 == LQ064D343 TFT VGA (6.4) Sharp\";" \
	163	"echo \" 7 == LQ10D368 TFT VGA (10.4) Sharp\";" \
	164	"echo \" 15 == LQ043T1DG01 TFT WQVGA (4.3) Sharp (DEFAULT)\";" \
	165	"echo \" vga[-dvi or -hdmi] LCD VGA 640x480\";" \
	166	"echo \" svga[-dvi or -hdmi] LCD SVGA 800x600\";" \
	167	"echo \" xga[-dvi or -hdmi] LCD XGA 1024x768\";" \
	168	"echo \" 720p[-dvi or -hdmi] LCD 720P 1280x720\";" \
	169	"echo \"Defaulting to 4.3 LCD panel (display=15).\";" \
	170	"setenv display 15;" \
	171	"setenv preboot;" \
	172	"saveenv;"
	173
	174
	175	#define CONFIG_EXTRA_ENV_SETTINGS \
	176	"loadaddr=0x81000000\0" \
	177	"bootfile=uImage\0" \
	178	"mtdids=" MTDIDS_DEFAULT "\0" \
	179	"mtdparts=" MTDPARTS_DEFAULT "\0" \
	180	"mmcdev=0\0" \
66968110	181	"autoboot=mmc dev ${mmcdev}; if mmc rescan; then " \
86887f8e PB	182	"if run loadbootscript; then " \
	183	"run bootscript; " \
	184	"else " \
	185	"run defaultboot;" \
	186	"fi; " \
	187	"else run defaultboot; fi\0" \
	188	"defaultboot=run mmcramboot\0" \
	189	"consoledevice=ttyO0\0" \
	190	"display=15\0" \
	191	"setconsole=setenv console ${consoledevice},${baudrate}n8\0" \
	192	"dump_bootargs=echo 'Bootargs: '; echo $bootargs\0" \
	193	"rotation=0\0" \
	194	"vrfb_arg=if itest ${rotation} -ne 0; then " \
	195	"setenv bootargs ${bootargs} omapfb.vrfb=y " \
	196	"omapfb.rotate=${rotation}; " \
	197	"fi\0" \
	198	"otherbootargs=ignore_loglevel early_printk no_console_suspend\0" \
	199	"addmtdparts=setenv bootargs ${bootargs} ${mtdparts}\0" \
	200	"common_bootargs=setenv bootargs ${bootargs} display=${display} " \
	201	"${otherbootargs};" \
	202	"run addmtdparts; " \
	203	"run vrfb_arg\0" \
	204	"loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
	205	"bootscript=echo 'Running bootscript from mmc ...'; " \
	206	"source ${loadaddr}\0" \
	207	"loaduimage=mmc rescan ${mmcdev}; " \
	208	"fatload mmc ${mmcdev} ${loadaddr} ${bootfile}\0" \
	209	"ramdisksize=64000\0" \
	210	"ramdiskaddr=0x82000000\0" \
	211	"ramdiskimage=rootfs.ext2.gz.uboot\0" \
	212	"ramargs=run setconsole; setenv bootargs console=${console} " \
	213	"root=/dev/ram rw ramdisk_size=${ramdisksize}\0" \
	214	"mmcramboot=echo 'Booting kernel from mmc w/ramdisk...'; " \
	215	"run ramargs; " \
	216	"run common_bootargs; " \
	217	"run dump_bootargs; " \
	218	"run loaduimage; " \
	219	"fatload mmc ${mmcdev} ${ramdiskaddr} ${ramdiskimage}; "\
	220	"bootm ${loadaddr} ${ramdiskaddr}\0" \
	221	"ramboot=echo 'Booting kernel/ramdisk rootfs from tftp...'; " \
	222	"run ramargs; " \
	223	"run common_bootargs; " \
	224	"run dump_bootargs; " \
	225	"tftpboot ${loadaddr} ${bootfile}; "\
	226	"tftpboot ${ramdiskaddr} ${ramdiskimage}; "\
	227	"bootm ${loadaddr} ${ramdiskaddr}\0"
	228
	229	#define CONFIG_BOOTCOMMAND \
	230	"run autoboot"
	231
	232	#define CONFIG_AUTO_COMPLETE
	233	/*
	234	* Miscellaneous configurable options
	235	*/
	236	#define CONFIG_SYS_LONGHELP /* undef to save memory */
	237	#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
86887f8e PB	238	#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
	239	/* Print Buffer Size */
	240	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
	241	sizeof(CONFIG_SYS_PROMPT) + 16)
	242	#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
	243	/* Boot Argument Buffer Size */
	244	#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
	245	/* memtest works on */
	246	#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
	247	#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
	248	0x01F00000) /* 31MB */
	249
	250	#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */
	251	/* address */
	252
	253	/*
	254	* OMAP3 has 12 GP timers, they can be driven by the system clock
	255	* (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
	256	* This rate is divided by a local divisor.
	257	*/
	258	#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
	259	#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
86887f8e	260
86887f8e PB	261	/*
	262	* Physical Memory Map
	263	*/
	264	#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
	265	#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
	266	#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
	267
	268	/*
	269	* FLASH and environment organization
	270	*/
	271
	272	/* ** PISMO SUPPORT * */
86887f8e PB	273	#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
	274
	275	#if defined(CONFIG_CMD_NAND)
222a3113	276	#define CONFIG_SYS_FLASH_BASE NAND_BASE
86887f8e	277	#elif defined(CONFIG_CMD_ONENAND)
222a3113	278	#define CONFIG_SYS_FLASH_BASE ONENAND_MAP
86887f8e PB	279	#endif
	280
	281	/* Monitor at start of flash */
	282	#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
	283
	284	#define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
	285
	286	#if defined(CONFIG_CMD_NAND)
	287	#define CONFIG_NAND_OMAP_GPMC
86887f8e PB	288	#define CONFIG_ENV_IS_IN_NAND
	289	#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
	290	#endif
	291
	292	#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
	293	#define CONFIG_ENV_ADDR CONFIG_ENV_OFFSET
	294
	295	#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
	296	#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
	297	#define CONFIG_SYS_INIT_RAM_SIZE 0x800
	298	#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
	299	CONFIG_SYS_INIT_RAM_SIZE - \
	300	GENERATED_GBL_DATA_SIZE)
	301
	302	/*
	303	* SMSC922x Ethernet
	304	*/
	305	#if defined(CONFIG_CMD_NET)
	306
	307	#define CONFIG_SMC911X
	308	#define CONFIG_SMC911X_16_BIT
	309	#define CONFIG_SMC911X_BASE 0x08000000
	310
	311	#endif /* (CONFIG_CMD_NET) */
	312
	313	/*
	314	* BOOTP fields
	315	*/
	316
	317	#define CONFIG_BOOTP_SUBNETMASK 0x00000001
	318	#define CONFIG_BOOTP_GATEWAY 0x00000002
	319	#define CONFIG_BOOTP_HOSTNAME 0x00000004
	320	#define CONFIG_BOOTP_BOOTPATH 0x00000010
	321
	322	#endif /* __CONFIG_H */