[people/ms/u-boot.git] / include / configs / omap3_overo.h

/*
 * Configuration settings for the Gumstix Overo board.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __CONFIG_H
#define __CONFIG_H

#define CONFIG_NR_DRAM_BANKS	2	/* CS1 may or may not be populated */
#define CONFIG_NAND

#include <configs/ti_omap3_common.h>
/*
 * We are only ever GP parts and will utilize all of the "downloaded image"
 * area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB).
 */
#undef CONFIG_SPL_TEXT_BASE
#define CONFIG_SPL_TEXT_BASE		0x40200000

#define CONFIG_BCH

/* Display CPU and Board information */
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO

/* call misc_init_r */
#define CONFIG_MISC_INIT_R

/* pass the revision tag */
#define CONFIG_REVISION_TAG

/* override size of malloc() pool */
#undef CONFIG_SYS_MALLOC_LEN
#define CONFIG_ENV_SIZE		(128 << 10)	/* 128 KiB sector */
/* Shift 128 << 15 provides 4 MiB heap to support UBI commands.
 * Shift 128 << 10 provides 128 KiB heap for limited-memory devices. */
#define CONFIG_SYS_MALLOC_LEN	(CONFIG_ENV_SIZE + (128 << 15))

/* I2C Support */
#define CONFIG_SYS_I2C_OMAP34XX

/* TWL4030 LED */
#define CONFIG_TWL4030_LED

/* USB EHCI */
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_OMAP
#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO	183
#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	3

/* Initialize GPIOs by default */
#define CONFIG_OMAP3_GPIO_2	/* GPIO32..63 is in GPIO Bank 2 */
#define CONFIG_OMAP3_GPIO_3	/* GPIO64..95 is in GPIO Bank 3 */
#define CONFIG_OMAP3_GPIO_4	/* GPIO96..127 is in GPIO Bank 4 */
#define CONFIG_OMAP3_GPIO_5	/* GPIO128..159 is in GPIO Bank 5 */
#define CONFIG_OMAP3_GPIO_6	/* GPIO160..191 is in GPIO Bank 6 */

/* commands to include */

#ifdef CONFIG_NAND
#define CONFIG_CMD_UBI		/* UBI-formated MTD partition support */
#define CONFIG_CMD_UBIFS	/* Read-only UBI volume operations */

#define CONFIG_RBTREE		/* required by CONFIG_CMD_UBI */
#define CONFIG_LZO		/* required by CONFIG_CMD_UBIFS */

#define CONFIG_MTD_PARTITIONS	/* required for UBI partition support */

/* NAND block size is 128 KiB.  Synchronize these values with
 * overo_nand_partitions in mach-omap2/board-overo.c in Linux:
 *  xloader              4 * NAND_BLOCK_SIZE = 512 KiB
 *  uboot               14 * NAND_BLOCK_SIZE = 1792 KiB
 *  uboot environtment   2 * NAND_BLOCK_SIZE = 256 KiB
 *  linux               64 * NAND_BLOCK_SIZE = 8 MiB
 *  rootfs              remainder
 */
#define MTDIDS_DEFAULT "nand0=omap2-nand.0"
#define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:"	\
	"512k(xloader),"				\
	"1792k(u-boot),"				\
	"256k(environ),"				\
	"8m(linux),"					\
	"-(rootfs)"
#else /* CONFIG_NAND */
#define MTDPARTS_DEFAULT
#endif /* CONFIG_NAND */

/* Board NAND Info. */
#define CONFIG_SYS_NAND_ADDR		NAND_BASE	/* physical address */
							/* to access nand */
/* Environment information */
#define CONFIG_EXTRA_ENV_SETTINGS \
	DEFAULT_LINUX_BOOT_ENV \
	"bootdir=/boot\0" \
	"bootfile=zImage\0" \
	"usbtty=cdc_acm\0" \
	"console=ttyO2,115200n8\0" \
	"mpurate=auto\0" \
	"optargs=\0" \
	"vram=12M\0" \
	"dvimode=1024x768MR-16@60\0" \
	"defaultdisplay=dvi\0" \
	"mmcdev=0\0" \
	"mmcroot=/dev/mmcblk0p2 rw\0" \
	"mmcrootfstype=ext4 rootwait\0" \
	"nandroot=ubi0:rootfs ubi.mtd=4\0" \
	"nandrootfstype=ubifs\0" \
	"mtdparts=" MTDPARTS_DEFAULT "\0" \
	"mmcargs=setenv bootargs console=${console} " \
		"${optargs} " \
		"mpurate=${mpurate} " \
		"vram=${vram} " \
		"omapfb.mode=dvi:${dvimode} " \
		"omapdss.def_disp=${defaultdisplay} " \
		"root=${mmcroot} " \
		"rootfstype=${mmcrootfstype}\0" \
	"nandargs=setenv bootargs console=${console} " \
		"${optargs} " \
		"mpurate=${mpurate} " \
		"vram=${vram} " \
		"omapfb.mode=dvi:${dvimode} " \
		"omapdss.def_disp=${defaultdisplay} " \
		"root=${nandroot} " \
		"rootfstype=${nandrootfstype}\0" \
	"loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \
	"bootscript=echo Running boot script from mmc ...; " \
		"source ${loadaddr}\0" \
	"loadbootenv=load mmc ${mmcdev} ${loadaddr} uEnv.txt\0" \
	"importbootenv=echo Importing environment from mmc ...; " \
		"env import -t ${loadaddr} ${filesize}\0" \
	"loaduimage=load mmc ${mmcdev} ${loadaddr} uImage\0" \
	"mmcboot=echo Booting from mmc...; " \
		"run mmcargs; " \
		"bootm ${loadaddr}\0" \
	"loadzimage=load mmc ${mmcdev}:2 ${loadaddr} ${bootdir}/${bootfile}\0" \
	"loadfdt=load mmc ${mmcdev}:2 ${fdtaddr} ${bootdir}/${fdtfile}\0" \
	"loadubizimage=ubifsload ${loadaddr} ${bootdir}/${bootfile}\0" \
	"loadubifdt=ubifsload ${fdtaddr} ${bootdir}/${fdtfile}\0" \
	"mmcbootfdt=echo Booting with DT from mmc ...; " \
		"run mmcargs; " \
		"bootz ${loadaddr} - ${fdtaddr}\0" \
	"nandboot=echo Booting from nand ...; " \
		"run nandargs; " \
		"if nand read ${loadaddr} linux; then " \
			"bootm ${loadaddr};" \
		"fi;\0" \
	"nanddtsboot=echo Booting from nand with DTS...; " \
		"run nandargs; " \
		"ubi part rootfs; "\
		"ubifsmount ubi0:rootfs; "\
		"run loadubifdt; "\
		"run loadubizimage; "\
		"bootz ${loadaddr} - ${fdtaddr}\0" \

#define CONFIG_BOOTCOMMAND \
	"mmc dev ${mmcdev}; if mmc rescan; then " \
		"if run loadbootscript; then " \
			"run bootscript; " \
		"fi;" \
		"if run loadbootenv; then " \
			"echo Loaded environment from ${bootenv};" \
			"run importbootenv;" \
		"fi;" \
		"if test -n $uenvcmd; then " \
			"echo Running uenvcmd ...;" \
			"run uenvcmd;" \
		"fi;" \
		"if run loaduimage; then " \
			"run mmcboot;" \
		"fi;" \
		"if run loadzimage; then " \
			"if test -z \"${fdtfile}\"; then " \
				"setenv fdtfile omap3-${boardname}-${expansionname}.dtb;" \
			"fi;" \
			"if run loadfdt; then " \
				"run mmcbootfdt;" \
			"fi;" \
		"fi;" \
	"fi;" \
	"run nandboot; " \
	"if test -z \"${fdtfile}\"; then "\
		"setenv fdtfile omap3-${boardname}-${expansionname}.dtb;" \
	"fi;" \
	"run nanddtsboot; " \

/* memtest works on */
#define CONFIG_SYS_MEMTEST_START	(OMAP34XX_SDRC_CS0)
#define CONFIG_SYS_MEMTEST_END		(OMAP34XX_SDRC_CS0 + \
					0x01F00000) /* 31MB */

/* FLASH and environment organization */
#if defined(CONFIG_NAND)
#define CONFIG_SYS_FLASH_BASE		NAND_BASE
#endif

/* Monitor at start of flash */
#define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_FLASH_BASE
#define CONFIG_SYS_ONENAND_BASE		ONENAND_MAP

#define CONFIG_ENV_IS_IN_NAND
#define ONENAND_ENV_OFFSET		0x240000 /* environment starts here */
#define SMNAND_ENV_OFFSET		0x240000 /* environment starts here */

#define CONFIG_SYS_ENV_SECT_SIZE	(128 << 10)	/* 128 KiB */
#define CONFIG_ENV_OFFSET		SMNAND_ENV_OFFSET
#define CONFIG_ENV_ADDR			SMNAND_ENV_OFFSET

/* Configure SMSC9211 ethernet */
#if defined(CONFIG_CMD_NET)
#define CONFIG_SMC911X
#define CONFIG_SMC911X_32_BIT
#define CONFIG_SMC911X_BASE		0x2C000000
#endif /* (CONFIG_CMD_NET) */

/* Initial RAM setup */
#define CONFIG_SYS_INIT_RAM_ADDR	0x4020f800
#define CONFIG_SYS_INIT_RAM_SIZE	0x800

/* NAND boot config */
#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
#define CONFIG_SYS_NAND_MAX_ECCPOS  56
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_PAGE_COUNT	64
#define CONFIG_SYS_NAND_PAGE_SIZE	2048
#define CONFIG_SYS_NAND_OOBSIZE		64
#define CONFIG_SYS_NAND_BLOCK_SIZE	(128*1024)
#define CONFIG_SYS_NAND_BAD_BLOCK_POS	NAND_LARGE_BADBLOCK_POS
#define CONFIG_SYS_NAND_ECCPOS      {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, \
					13, 14, 16, 17, 18, 19, 20, 21, 22, \
					23, 24, 25, 26, 27, 28, 30, 31, 32, \
					33, 34, 35, 36, 37, 38, 39, 40, 41, \
					42, 44, 45, 46, 47, 48, 49, 50, 51, \
					52, 53, 54, 55, 56}
#define CONFIG_SYS_NAND_ECCSIZE		512
#define CONFIG_SYS_NAND_ECCBYTES	13
#define CONFIG_NAND_OMAP_ECCSCHEME	OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
#define CONFIG_SYS_NAND_U_BOOT_START	CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_NAND_U_BOOT_OFFS	0x80000
/* NAND: SPL falcon mode configs */
#ifdef CONFIG_SPL_OS_BOOT
#define CONFIG_CMD_SPL_NAND_OFS		0x240000
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS	0x280000
#define CONFIG_CMD_SPL_WRITE_SIZE	0x2000
#endif

#endif				/* __CONFIG_H */
Commit	Line	Data
9d0fc811 DB	1	/*
	2	* Configuration settings for the Gumstix Overo board.
	3	*
1a459660	4	* SPDX-License-Identifier: GPL-2.0+
9d0fc811 DB	5	*/
	6
	7	#ifndef __CONFIG_H
	8	#define __CONFIG_H
9d0fc811	9
29cc1d8e AC	10	#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
29cc1d8e AC	11	#define CONFIG_NAND
cae377b5	12
29cc1d8e	13	#include <configs/ti_omap3_common.h>
fa2f81b0 TR	14	/*
	15	* We are only ever GP parts and will utilize all of the "downloaded image"
	16	* area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB).
	17	*/
ce170a1c	18	#undef CONFIG_SPL_TEXT_BASE
fa2f81b0	19	#define CONFIG_SPL_TEXT_BASE 0x40200000
ce170a1c AC	20
ce170a1c AC	21	#define CONFIG_BCH
9d0fc811	22
29cc1d8e	23	/* Display CPU and Board information */
0f8d3eb9 AM	24	#define CONFIG_DISPLAY_CPUINFO
0f8d3eb9 AM	25	#define CONFIG_DISPLAY_BOARDINFO
6a6b62e3	26
29cc1d8e	27	/* call misc_init_r */
9d0fc811 DB	28	#define CONFIG_MISC_INIT_R
9d0fc811 DB	29
29cc1d8e	30	/* pass the revision tag */
0f8d3eb9	31	#define CONFIG_REVISION_TAG
9d0fc811	32
29cc1d8e AC	33	/* override size of malloc() pool */
29cc1d8e AC	34	#undef CONFIG_SYS_MALLOC_LEN
dbba3daf	35	#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB sector */
dbba3daf AC	36	/* Shift 128 << 15 provides 4 MiB heap to support UBI commands.
	37	* Shift 128 << 10 provides 128 KiB heap for limited-memory devices. */
	38	#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 15))
9d0fc811	39
29cc1d8e AC	40	/* I2C Support */
29cc1d8e AC	41	#define CONFIG_SYS_I2C_OMAP34XX
9d0fc811	42
29cc1d8e AC	43	/* TWL4030 LED */
29cc1d8e AC	44	#define CONFIG_TWL4030_LED
9d0fc811	45
f5c30c1b SH	46	/* USB EHCI */
	47	#define CONFIG_USB_EHCI
	48	#define CONFIG_USB_EHCI_OMAP
f5c30c1b SH	49	#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 183
	50	#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
	51
29cc1d8e	52	/* Initialize GPIOs by default */
06ae2b0c AC	53	#define CONFIG_OMAP3_GPIO_2 /* GPIO32..63 is in GPIO Bank 2 */
	54	#define CONFIG_OMAP3_GPIO_3 /* GPIO64..95 is in GPIO Bank 3 */
	55	#define CONFIG_OMAP3_GPIO_4 /* GPIO96..127 is in GPIO Bank 4 */
	56	#define CONFIG_OMAP3_GPIO_5 /* GPIO128..159 is in GPIO Bank 5 */
	57	#define CONFIG_OMAP3_GPIO_6 /* GPIO160..191 is in GPIO Bank 6 */
	58
9d0fc811	59	/* commands to include */
dbba3daf	60
29cc1d8e	61	#ifdef CONFIG_NAND
dbba3daf AC	62	#define CONFIG_CMD_UBI /* UBI-formated MTD partition support */
	63	#define CONFIG_CMD_UBIFS /* Read-only UBI volume operations */
	64
	65	#define CONFIG_RBTREE /* required by CONFIG_CMD_UBI */
	66	#define CONFIG_LZO /* required by CONFIG_CMD_UBIFS */
	67
dbba3daf AC	68	#define CONFIG_MTD_PARTITIONS /* required for UBI partition support */
	69
	70	/* NAND block size is 128 KiB. Synchronize these values with
	71	* overo_nand_partitions in mach-omap2/board-overo.c in Linux:
	72	* xloader 4 * NAND_BLOCK_SIZE = 512 KiB
	73	* uboot 14 * NAND_BLOCK_SIZE = 1792 KiB
	74	* uboot environtment 2 * NAND_BLOCK_SIZE = 256 KiB
e5c809d7	75	* linux 64 * NAND_BLOCK_SIZE = 8 MiB
dbba3daf AC	76	* rootfs remainder
	77	*/
	78	#define MTDIDS_DEFAULT "nand0=omap2-nand.0"
	79	#define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:" \
	80	"512k(xloader)," \
	81	"1792k(u-boot)," \
	82	"256k(environ)," \
e5c809d7	83	"8m(linux)," \
dbba3daf	84	"-(rootfs)"
29cc1d8e	85	#else /* CONFIG_NAND */
dbba3daf	86	#define MTDPARTS_DEFAULT
29cc1d8e	87	#endif /* CONFIG_NAND */
dbba3daf	88
29cc1d8e	89	/* Board NAND Info. */
9d0fc811 DB	90	#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
9d0fc811 DB	91	/* to access nand */
9d0fc811	92	/* Environment information */
9d0fc811	93	#define CONFIG_EXTRA_ENV_SETTINGS \
29cc1d8e	94	DEFAULT_LINUX_BOOT_ENV \
3c92c323 AC	95	"bootdir=/boot\0" \
	96	"bootfile=zImage\0" \
	97	"usbtty=cdc_acm\0" \
75b988a2	98	"console=ttyO2,115200n8\0" \
3c92c323	99	"mpurate=auto\0" \
e6847dba	100	"optargs=\0" \
13d2cb98 SS	101	"vram=12M\0" \
	102	"dvimode=1024x768MR-16@60\0" \
	103	"defaultdisplay=dvi\0" \
cd7c5726	104	"mmcdev=0\0" \
13d2cb98	105	"mmcroot=/dev/mmcblk0p2 rw\0" \
1584e4f4	106	"mmcrootfstype=ext4 rootwait\0" \
254973e6 SS	107	"nandroot=ubi0:rootfs ubi.mtd=4\0" \
254973e6 SS	108	"nandrootfstype=ubifs\0" \
dbba3daf	109	"mtdparts=" MTDPARTS_DEFAULT "\0" \
9d0fc811	110	"mmcargs=setenv bootargs console=${console} " \
e6847dba	111	"${optargs} " \
5af32460	112	"mpurate=${mpurate} " \
13d2cb98 SS	113	"vram=${vram} " \
13d2cb98 SS	114	"omapfb.mode=dvi:${dvimode} " \
13d2cb98 SS	115	"omapdss.def_disp=${defaultdisplay} " \
	116	"root=${mmcroot} " \
	117	"rootfstype=${mmcrootfstype}\0" \
9d0fc811	118	"nandargs=setenv bootargs console=${console} " \
e6847dba	119	"${optargs} " \
5af32460	120	"mpurate=${mpurate} " \
13d2cb98 SS	121	"vram=${vram} " \
13d2cb98 SS	122	"omapfb.mode=dvi:${dvimode} " \
13d2cb98 SS	123	"omapdss.def_disp=${defaultdisplay} " \
	124	"root=${nandroot} " \
	125	"rootfstype=${nandrootfstype}\0" \
3c92c323 AC	126	"loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \
3c92c323 AC	127	"bootscript=echo Running boot script from mmc ...; " \
74de7aef	128	"source ${loadaddr}\0" \
3c92c323 AC	129	"loadbootenv=load mmc ${mmcdev} ${loadaddr} uEnv.txt\0" \
3c92c323 AC	130	"importbootenv=echo Importing environment from mmc ...; " \
0b3fde11	131	"env import -t ${loadaddr} ${filesize}\0" \
3c92c323 AC	132	"loaduimage=load mmc ${mmcdev} ${loadaddr} uImage\0" \
3c92c323 AC	133	"mmcboot=echo Booting from mmc...; " \
9d0fc811 DB	134	"run mmcargs; " \
9d0fc811 DB	135	"bootm ${loadaddr}\0" \
3c92c323	136	"loadzimage=load mmc ${mmcdev}:2 ${loadaddr} ${bootdir}/${bootfile}\0" \
29cc1d8e	137	"loadfdt=load mmc ${mmcdev}:2 ${fdtaddr} ${bootdir}/${fdtfile}\0" \
88d89668 AC	138	"loadubizimage=ubifsload ${loadaddr} ${bootdir}/${bootfile}\0" \
88d89668 AC	139	"loadubifdt=ubifsload ${fdtaddr} ${bootdir}/${fdtfile}\0" \
3c92c323 AC	140	"mmcbootfdt=echo Booting with DT from mmc ...; " \
3c92c323 AC	141	"run mmcargs; " \
29cc1d8e	142	"bootz ${loadaddr} - ${fdtaddr}\0" \
9d0fc811 DB	143	"nandboot=echo Booting from nand ...; " \
9d0fc811 DB	144	"run nandargs; " \
f2565a55 SH	145	"if nand read ${loadaddr} linux; then " \
	146	"bootm ${loadaddr};" \
	147	"fi;\0" \
88d89668 AC	148	"nanddtsboot=echo Booting from nand with DTS...; " \
	149	"run nandargs; " \
	150	"ubi part rootfs; "\
	151	"ubifsmount ubi0:rootfs; "\
	152	"run loadubifdt; "\
	153	"run loadubizimage; "\
	154	"bootz ${loadaddr} - ${fdtaddr}\0" \
9d0fc811 DB	155
9d0fc811 DB	156	#define CONFIG_BOOTCOMMAND \
66968110	157	"mmc dev ${mmcdev}; if mmc rescan; then " \
9d0fc811 DB	158	"if run loadbootscript; then " \
9d0fc811 DB	159	"run bootscript; " \
3c92c323 AC	160	"fi;" \
	161	"if run loadbootenv; then " \
	162	"echo Loaded environment from ${bootenv};" \
	163	"run importbootenv;" \
	164	"fi;" \
	165	"if test -n $uenvcmd; then " \
	166	"echo Running uenvcmd ...;" \
	167	"run uenvcmd;" \
	168	"fi;" \
	169	"if run loaduimage; then " \
	170	"run mmcboot;" \
	171	"fi;" \
	172	"if run loadzimage; then " \
115e71f7	173	"if test -z \"${fdtfile}\"; then " \
12cc5437 AC	174	"setenv fdtfile omap3-${boardname}-${expansionname}.dtb;" \
	175	"fi;" \
	176	"if run loadfdt; then " \
	177	"run mmcbootfdt;" \
0b3fde11	178	"fi;" \
3c92c323 AC	179	"fi;" \
	180	"fi;" \
	181	"run nandboot; " \
88d89668 AC	182	"if test -z \"${fdtfile}\"; then "\
	183	"setenv fdtfile omap3-${boardname}-${expansionname}.dtb;" \
	184	"fi;" \
	185	"run nanddtsboot; " \
9d0fc811	186
9d0fc811 DB	187	/* memtest works on */
	188	#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
	189	#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
	190	0x01F00000) /* 31MB */
	191
29cc1d8e	192	/* FLASH and environment organization */
29cc1d8e	193	#if defined(CONFIG_NAND)
222a3113	194	#define CONFIG_SYS_FLASH_BASE NAND_BASE
6cbec7b3	195	#endif
9d0fc811 DB	196
	197	/* Monitor at start of flash */
	198	#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
	199	#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
	200
0f8d3eb9	201	#define CONFIG_ENV_IS_IN_NAND
9d0fc811 DB	202	#define ONENAND_ENV_OFFSET 0x240000 /* environment starts here */
	203	#define SMNAND_ENV_OFFSET 0x240000 /* environment starts here */
	204
6cbec7b3 LC	205	#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
6cbec7b3 LC	206	#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
9d0fc811 DB	207	#define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
9d0fc811 DB	208
29cc1d8e	209	/* Configure SMSC9211 ethernet */
df382626	210	#if defined(CONFIG_CMD_NET)
0f8d3eb9	211	#define CONFIG_SMC911X
df382626	212	#define CONFIG_SMC911X_32_BIT
0f8d3eb9	213	#define CONFIG_SMC911X_BASE 0x2C000000
df382626 OJ	214	#endif /* (CONFIG_CMD_NET) */
df382626 OJ	215
29cc1d8e	216	/* Initial RAM setup */
31bfcf1c SS	217	#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
31bfcf1c SS	218	#define CONFIG_SYS_INIT_RAM_SIZE 0x800
8e40852f	219
137703b8	220	/* NAND boot config */
55f1b39f	221	#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
ce170a1c	222	#define CONFIG_SYS_NAND_MAX_ECCPOS 56
137703b8 AM	223	#define CONFIG_SYS_NAND_5_ADDR_CYCLE
	224	#define CONFIG_SYS_NAND_PAGE_COUNT 64
	225	#define CONFIG_SYS_NAND_PAGE_SIZE 2048
	226	#define CONFIG_SYS_NAND_OOBSIZE 64
	227	#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
	228	#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
ce170a1c AC	229	#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, \
	230	13, 14, 16, 17, 18, 19, 20, 21, 22, \
	231	23, 24, 25, 26, 27, 28, 30, 31, 32, \
	232	33, 34, 35, 36, 37, 38, 39, 40, 41, \
	233	42, 44, 45, 46, 47, 48, 49, 50, 51, \
	234	52, 53, 54, 55, 56}
137703b8	235	#define CONFIG_SYS_NAND_ECCSIZE 512
ce170a1c AC	236	#define CONFIG_SYS_NAND_ECCBYTES 13
ce170a1c AC	237	#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
137703b8 AM	238	#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
137703b8 AM	239	#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
434f2cfc	240	/* NAND: SPL falcon mode configs */
	241	#ifdef CONFIG_SPL_OS_BOOT
	242	#define CONFIG_CMD_SPL_NAND_OFS 0x240000
	243	#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
	244	#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
	245	#endif
137703b8	246
9d0fc811	247	#endif /* __CONFIG_H */