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Commit | Line | Data |
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9d0fc811 DB |
1 | /* |
2 | * Configuration settings for the Gumstix Overo board. | |
3 | * | |
1a459660 | 4 | * SPDX-License-Identifier: GPL-2.0+ |
9d0fc811 DB |
5 | */ |
6 | ||
7 | #ifndef __CONFIG_H | |
8 | #define __CONFIG_H | |
9d0fc811 | 9 | |
29cc1d8e AC |
10 | #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ |
11 | #define CONFIG_NAND | |
cae377b5 | 12 | |
29cc1d8e | 13 | #include <configs/ti_omap3_common.h> |
9d0fc811 | 14 | |
29cc1d8e | 15 | /* Display CPU and Board information */ |
0f8d3eb9 AM |
16 | #define CONFIG_DISPLAY_CPUINFO |
17 | #define CONFIG_DISPLAY_BOARDINFO | |
6a6b62e3 | 18 | |
29cc1d8e | 19 | /* call misc_init_r */ |
9d0fc811 DB |
20 | #define CONFIG_MISC_INIT_R |
21 | ||
29cc1d8e | 22 | /* pass the revision tag */ |
0f8d3eb9 | 23 | #define CONFIG_REVISION_TAG |
9d0fc811 | 24 | |
29cc1d8e AC |
25 | /* override size of malloc() pool */ |
26 | #undef CONFIG_SYS_MALLOC_LEN | |
dbba3daf | 27 | #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB sector */ |
dbba3daf AC |
28 | /* Shift 128 << 15 provides 4 MiB heap to support UBI commands. |
29 | * Shift 128 << 10 provides 128 KiB heap for limited-memory devices. */ | |
30 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 15)) | |
9d0fc811 | 31 | |
29cc1d8e AC |
32 | /* I2C Support */ |
33 | #define CONFIG_SYS_I2C_OMAP34XX | |
9d0fc811 | 34 | |
29cc1d8e AC |
35 | /* TWL4030 LED */ |
36 | #define CONFIG_TWL4030_LED | |
9d0fc811 | 37 | |
f5c30c1b SH |
38 | /* USB EHCI */ |
39 | #define CONFIG_USB_EHCI | |
40 | #define CONFIG_USB_EHCI_OMAP | |
41 | #define CONFIG_USB_STORAGE | |
42 | #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 183 | |
43 | #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3 | |
44 | ||
29cc1d8e | 45 | /* Initialize GPIOs by default */ |
06ae2b0c AC |
46 | #define CONFIG_OMAP3_GPIO_2 /* GPIO32..63 is in GPIO Bank 2 */ |
47 | #define CONFIG_OMAP3_GPIO_3 /* GPIO64..95 is in GPIO Bank 3 */ | |
48 | #define CONFIG_OMAP3_GPIO_4 /* GPIO96..127 is in GPIO Bank 4 */ | |
49 | #define CONFIG_OMAP3_GPIO_5 /* GPIO128..159 is in GPIO Bank 5 */ | |
50 | #define CONFIG_OMAP3_GPIO_6 /* GPIO160..191 is in GPIO Bank 6 */ | |
51 | ||
9d0fc811 | 52 | /* commands to include */ |
68b0fbf0 | 53 | #define CONFIG_CMD_CACHE |
f5c30c1b | 54 | #define CONFIG_CMD_USB |
9d0fc811 DB |
55 | #undef CONFIG_CMD_FPGA /* FPGA configuration Support */ |
56 | #undef CONFIG_CMD_IMI /* iminfo */ | |
9d0fc811 | 57 | #undef CONFIG_CMD_NFS /* NFS support */ |
dbba3daf | 58 | |
29cc1d8e | 59 | #ifdef CONFIG_NAND |
dbba3daf AC |
60 | #define CONFIG_CMD_UBI /* UBI-formated MTD partition support */ |
61 | #define CONFIG_CMD_UBIFS /* Read-only UBI volume operations */ | |
62 | ||
63 | #define CONFIG_RBTREE /* required by CONFIG_CMD_UBI */ | |
64 | #define CONFIG_LZO /* required by CONFIG_CMD_UBIFS */ | |
65 | ||
dbba3daf AC |
66 | #define CONFIG_MTD_PARTITIONS /* required for UBI partition support */ |
67 | ||
68 | /* NAND block size is 128 KiB. Synchronize these values with | |
69 | * overo_nand_partitions in mach-omap2/board-overo.c in Linux: | |
70 | * xloader 4 * NAND_BLOCK_SIZE = 512 KiB | |
71 | * uboot 14 * NAND_BLOCK_SIZE = 1792 KiB | |
72 | * uboot environtment 2 * NAND_BLOCK_SIZE = 256 KiB | |
e5c809d7 | 73 | * linux 64 * NAND_BLOCK_SIZE = 8 MiB |
dbba3daf AC |
74 | * rootfs remainder |
75 | */ | |
76 | #define MTDIDS_DEFAULT "nand0=omap2-nand.0" | |
77 | #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:" \ | |
78 | "512k(xloader)," \ | |
79 | "1792k(u-boot)," \ | |
80 | "256k(environ)," \ | |
e5c809d7 | 81 | "8m(linux)," \ |
dbba3daf | 82 | "-(rootfs)" |
29cc1d8e | 83 | #else /* CONFIG_NAND */ |
dbba3daf | 84 | #define MTDPARTS_DEFAULT |
29cc1d8e | 85 | #endif /* CONFIG_NAND */ |
dbba3daf | 86 | |
29cc1d8e | 87 | /* Board NAND Info. */ |
0f8d3eb9 | 88 | #define CONFIG_SYS_NAND_QUIET_TEST |
9d0fc811 DB |
89 | #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ |
90 | /* to access nand */ | |
9d0fc811 | 91 | /* Environment information */ |
9d0fc811 | 92 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
29cc1d8e | 93 | DEFAULT_LINUX_BOOT_ENV \ |
3c92c323 AC |
94 | "bootdir=/boot\0" \ |
95 | "bootfile=zImage\0" \ | |
96 | "usbtty=cdc_acm\0" \ | |
75b988a2 | 97 | "console=ttyO2,115200n8\0" \ |
3c92c323 | 98 | "mpurate=auto\0" \ |
e6847dba | 99 | "optargs=\0" \ |
13d2cb98 SS |
100 | "vram=12M\0" \ |
101 | "dvimode=1024x768MR-16@60\0" \ | |
102 | "defaultdisplay=dvi\0" \ | |
cd7c5726 | 103 | "mmcdev=0\0" \ |
13d2cb98 SS |
104 | "mmcroot=/dev/mmcblk0p2 rw\0" \ |
105 | "mmcrootfstype=ext3 rootwait\0" \ | |
254973e6 SS |
106 | "nandroot=ubi0:rootfs ubi.mtd=4\0" \ |
107 | "nandrootfstype=ubifs\0" \ | |
dbba3daf | 108 | "mtdparts=" MTDPARTS_DEFAULT "\0" \ |
9d0fc811 | 109 | "mmcargs=setenv bootargs console=${console} " \ |
e6847dba | 110 | "${optargs} " \ |
5af32460 | 111 | "mpurate=${mpurate} " \ |
13d2cb98 SS |
112 | "vram=${vram} " \ |
113 | "omapfb.mode=dvi:${dvimode} " \ | |
13d2cb98 SS |
114 | "omapdss.def_disp=${defaultdisplay} " \ |
115 | "root=${mmcroot} " \ | |
116 | "rootfstype=${mmcrootfstype}\0" \ | |
9d0fc811 | 117 | "nandargs=setenv bootargs console=${console} " \ |
e6847dba | 118 | "${optargs} " \ |
5af32460 | 119 | "mpurate=${mpurate} " \ |
13d2cb98 SS |
120 | "vram=${vram} " \ |
121 | "omapfb.mode=dvi:${dvimode} " \ | |
13d2cb98 SS |
122 | "omapdss.def_disp=${defaultdisplay} " \ |
123 | "root=${nandroot} " \ | |
124 | "rootfstype=${nandrootfstype}\0" \ | |
3c92c323 AC |
125 | "loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \ |
126 | "bootscript=echo Running boot script from mmc ...; " \ | |
74de7aef | 127 | "source ${loadaddr}\0" \ |
3c92c323 AC |
128 | "loadbootenv=load mmc ${mmcdev} ${loadaddr} uEnv.txt\0" \ |
129 | "importbootenv=echo Importing environment from mmc ...; " \ | |
0b3fde11 | 130 | "env import -t ${loadaddr} ${filesize}\0" \ |
3c92c323 AC |
131 | "loaduimage=load mmc ${mmcdev} ${loadaddr} uImage\0" \ |
132 | "mmcboot=echo Booting from mmc...; " \ | |
9d0fc811 DB |
133 | "run mmcargs; " \ |
134 | "bootm ${loadaddr}\0" \ | |
3c92c323 | 135 | "loadzimage=load mmc ${mmcdev}:2 ${loadaddr} ${bootdir}/${bootfile}\0" \ |
29cc1d8e | 136 | "loadfdt=load mmc ${mmcdev}:2 ${fdtaddr} ${bootdir}/${fdtfile}\0" \ |
3c92c323 AC |
137 | "mmcbootfdt=echo Booting with DT from mmc ...; " \ |
138 | "run mmcargs; " \ | |
29cc1d8e | 139 | "bootz ${loadaddr} - ${fdtaddr}\0" \ |
9d0fc811 DB |
140 | "nandboot=echo Booting from nand ...; " \ |
141 | "run nandargs; " \ | |
f2565a55 SH |
142 | "if nand read ${loadaddr} linux; then " \ |
143 | "bootm ${loadaddr};" \ | |
144 | "fi;\0" \ | |
9d0fc811 DB |
145 | |
146 | #define CONFIG_BOOTCOMMAND \ | |
66968110 | 147 | "mmc dev ${mmcdev}; if mmc rescan; then " \ |
9d0fc811 DB |
148 | "if run loadbootscript; then " \ |
149 | "run bootscript; " \ | |
3c92c323 AC |
150 | "fi;" \ |
151 | "if run loadbootenv; then " \ | |
152 | "echo Loaded environment from ${bootenv};" \ | |
153 | "run importbootenv;" \ | |
154 | "fi;" \ | |
155 | "if test -n $uenvcmd; then " \ | |
156 | "echo Running uenvcmd ...;" \ | |
157 | "run uenvcmd;" \ | |
158 | "fi;" \ | |
159 | "if run loaduimage; then " \ | |
160 | "run mmcboot;" \ | |
161 | "fi;" \ | |
162 | "if run loadzimage; then " \ | |
115e71f7 | 163 | "if test -z \"${fdtfile}\"; then " \ |
12cc5437 AC |
164 | "setenv fdtfile omap3-${boardname}-${expansionname}.dtb;" \ |
165 | "fi;" \ | |
166 | "if run loadfdt; then " \ | |
167 | "run mmcbootfdt;" \ | |
0b3fde11 | 168 | "fi;" \ |
3c92c323 AC |
169 | "fi;" \ |
170 | "fi;" \ | |
171 | "run nandboot; " \ | |
9d0fc811 | 172 | |
9d0fc811 DB |
173 | /* |
174 | * Miscellaneous configurable options | |
175 | */ | |
29cc1d8e | 176 | #undef CONFIG_SYS_PROMPT |
1270ec13 | 177 | #define CONFIG_SYS_PROMPT "Overo # " |
29cc1d8e | 178 | |
9d0fc811 DB |
179 | /* memtest works on */ |
180 | #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) | |
181 | #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ | |
182 | 0x01F00000) /* 31MB */ | |
183 | ||
29cc1d8e | 184 | /* FLASH and environment organization */ |
29cc1d8e | 185 | #if defined(CONFIG_NAND) |
222a3113 | 186 | #define CONFIG_SYS_FLASH_BASE NAND_BASE |
6cbec7b3 | 187 | #endif |
9d0fc811 DB |
188 | |
189 | /* Monitor at start of flash */ | |
190 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE | |
191 | #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP | |
192 | ||
0f8d3eb9 | 193 | #define CONFIG_ENV_IS_IN_NAND |
9d0fc811 DB |
194 | #define ONENAND_ENV_OFFSET 0x240000 /* environment starts here */ |
195 | #define SMNAND_ENV_OFFSET 0x240000 /* environment starts here */ | |
196 | ||
6cbec7b3 LC |
197 | #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ |
198 | #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET | |
9d0fc811 DB |
199 | #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET |
200 | ||
29cc1d8e | 201 | /* Configure SMSC9211 ethernet */ |
df382626 | 202 | #if defined(CONFIG_CMD_NET) |
0f8d3eb9 | 203 | #define CONFIG_SMC911X |
df382626 | 204 | #define CONFIG_SMC911X_32_BIT |
0f8d3eb9 | 205 | #define CONFIG_SMC911X_BASE 0x2C000000 |
df382626 OJ |
206 | #endif /* (CONFIG_CMD_NET) */ |
207 | ||
29cc1d8e | 208 | /* Initial RAM setup */ |
31bfcf1c SS |
209 | #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 |
210 | #define CONFIG_SYS_INIT_RAM_SIZE 0x800 | |
8e40852f A |
211 | #define CONFIG_SYS_CACHELINE_SIZE 64 |
212 | ||
137703b8 | 213 | /* NAND boot config */ |
b80a6603 | 214 | #define CONFIG_SYS_NAND_BUSWIDTH_16BIT 16 |
137703b8 AM |
215 | #define CONFIG_SYS_NAND_5_ADDR_CYCLE |
216 | #define CONFIG_SYS_NAND_PAGE_COUNT 64 | |
217 | #define CONFIG_SYS_NAND_PAGE_SIZE 2048 | |
218 | #define CONFIG_SYS_NAND_OOBSIZE 64 | |
219 | #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) | |
220 | #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS | |
221 | #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\ | |
222 | 10, 11, 12, 13} | |
223 | #define CONFIG_SYS_NAND_ECCSIZE 512 | |
224 | #define CONFIG_SYS_NAND_ECCBYTES 3 | |
3f719069 | 225 | #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW |
137703b8 AM |
226 | #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE |
227 | #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 | |
434f2cfc | 228 | /* NAND: SPL falcon mode configs */ |
229 | #ifdef CONFIG_SPL_OS_BOOT | |
230 | #define CONFIG_CMD_SPL_NAND_OFS 0x240000 | |
231 | #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000 | |
232 | #define CONFIG_CMD_SPL_WRITE_SIZE 0x2000 | |
233 | #endif | |
137703b8 | 234 | |
9d0fc811 | 235 | #endif /* __CONFIG_H */ |