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Commit | Line | Data |
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9d0fc811 DB |
1 | /* |
2 | * Configuration settings for the Gumstix Overo board. | |
3 | * | |
1a459660 | 4 | * SPDX-License-Identifier: GPL-2.0+ |
9d0fc811 DB |
5 | */ |
6 | ||
7 | #ifndef __CONFIG_H | |
8 | #define __CONFIG_H | |
9d0fc811 | 9 | |
29cc1d8e AC |
10 | #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ |
11 | #define CONFIG_NAND | |
cae377b5 | 12 | |
29cc1d8e | 13 | #include <configs/ti_omap3_common.h> |
ce170a1c AC |
14 | #undef CONFIG_SPL_MAX_SIZE |
15 | #define CONFIG_SPL_MAX_SIZE (64*1024) | |
16 | #undef CONFIG_SPL_TEXT_BASE | |
17 | #define CONFIG_SPL_TEXT_BASE 0x40200000 | |
18 | ||
19 | #define CONFIG_BCH | |
9d0fc811 | 20 | |
29cc1d8e | 21 | /* Display CPU and Board information */ |
0f8d3eb9 AM |
22 | #define CONFIG_DISPLAY_CPUINFO |
23 | #define CONFIG_DISPLAY_BOARDINFO | |
6a6b62e3 | 24 | |
29cc1d8e | 25 | /* call misc_init_r */ |
9d0fc811 DB |
26 | #define CONFIG_MISC_INIT_R |
27 | ||
29cc1d8e | 28 | /* pass the revision tag */ |
0f8d3eb9 | 29 | #define CONFIG_REVISION_TAG |
9d0fc811 | 30 | |
29cc1d8e AC |
31 | /* override size of malloc() pool */ |
32 | #undef CONFIG_SYS_MALLOC_LEN | |
dbba3daf | 33 | #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB sector */ |
dbba3daf AC |
34 | /* Shift 128 << 15 provides 4 MiB heap to support UBI commands. |
35 | * Shift 128 << 10 provides 128 KiB heap for limited-memory devices. */ | |
36 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 15)) | |
9d0fc811 | 37 | |
29cc1d8e AC |
38 | /* I2C Support */ |
39 | #define CONFIG_SYS_I2C_OMAP34XX | |
9d0fc811 | 40 | |
29cc1d8e AC |
41 | /* TWL4030 LED */ |
42 | #define CONFIG_TWL4030_LED | |
9d0fc811 | 43 | |
f5c30c1b SH |
44 | /* USB EHCI */ |
45 | #define CONFIG_USB_EHCI | |
46 | #define CONFIG_USB_EHCI_OMAP | |
47 | #define CONFIG_USB_STORAGE | |
48 | #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 183 | |
49 | #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3 | |
50 | ||
29cc1d8e | 51 | /* Initialize GPIOs by default */ |
06ae2b0c AC |
52 | #define CONFIG_OMAP3_GPIO_2 /* GPIO32..63 is in GPIO Bank 2 */ |
53 | #define CONFIG_OMAP3_GPIO_3 /* GPIO64..95 is in GPIO Bank 3 */ | |
54 | #define CONFIG_OMAP3_GPIO_4 /* GPIO96..127 is in GPIO Bank 4 */ | |
55 | #define CONFIG_OMAP3_GPIO_5 /* GPIO128..159 is in GPIO Bank 5 */ | |
56 | #define CONFIG_OMAP3_GPIO_6 /* GPIO160..191 is in GPIO Bank 6 */ | |
57 | ||
9d0fc811 | 58 | /* commands to include */ |
68b0fbf0 | 59 | #define CONFIG_CMD_CACHE |
f5c30c1b | 60 | #define CONFIG_CMD_USB |
9d0fc811 DB |
61 | #undef CONFIG_CMD_FPGA /* FPGA configuration Support */ |
62 | #undef CONFIG_CMD_IMI /* iminfo */ | |
9d0fc811 | 63 | #undef CONFIG_CMD_NFS /* NFS support */ |
dbba3daf | 64 | |
29cc1d8e | 65 | #ifdef CONFIG_NAND |
dbba3daf AC |
66 | #define CONFIG_CMD_UBI /* UBI-formated MTD partition support */ |
67 | #define CONFIG_CMD_UBIFS /* Read-only UBI volume operations */ | |
68 | ||
69 | #define CONFIG_RBTREE /* required by CONFIG_CMD_UBI */ | |
70 | #define CONFIG_LZO /* required by CONFIG_CMD_UBIFS */ | |
71 | ||
dbba3daf AC |
72 | #define CONFIG_MTD_PARTITIONS /* required for UBI partition support */ |
73 | ||
74 | /* NAND block size is 128 KiB. Synchronize these values with | |
75 | * overo_nand_partitions in mach-omap2/board-overo.c in Linux: | |
76 | * xloader 4 * NAND_BLOCK_SIZE = 512 KiB | |
77 | * uboot 14 * NAND_BLOCK_SIZE = 1792 KiB | |
78 | * uboot environtment 2 * NAND_BLOCK_SIZE = 256 KiB | |
e5c809d7 | 79 | * linux 64 * NAND_BLOCK_SIZE = 8 MiB |
dbba3daf AC |
80 | * rootfs remainder |
81 | */ | |
82 | #define MTDIDS_DEFAULT "nand0=omap2-nand.0" | |
83 | #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:" \ | |
84 | "512k(xloader)," \ | |
85 | "1792k(u-boot)," \ | |
86 | "256k(environ)," \ | |
e5c809d7 | 87 | "8m(linux)," \ |
dbba3daf | 88 | "-(rootfs)" |
29cc1d8e | 89 | #else /* CONFIG_NAND */ |
dbba3daf | 90 | #define MTDPARTS_DEFAULT |
29cc1d8e | 91 | #endif /* CONFIG_NAND */ |
dbba3daf | 92 | |
29cc1d8e | 93 | /* Board NAND Info. */ |
0f8d3eb9 | 94 | #define CONFIG_SYS_NAND_QUIET_TEST |
9d0fc811 DB |
95 | #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ |
96 | /* to access nand */ | |
9d0fc811 | 97 | /* Environment information */ |
9d0fc811 | 98 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
29cc1d8e | 99 | DEFAULT_LINUX_BOOT_ENV \ |
3c92c323 AC |
100 | "bootdir=/boot\0" \ |
101 | "bootfile=zImage\0" \ | |
102 | "usbtty=cdc_acm\0" \ | |
75b988a2 | 103 | "console=ttyO2,115200n8\0" \ |
3c92c323 | 104 | "mpurate=auto\0" \ |
e6847dba | 105 | "optargs=\0" \ |
13d2cb98 SS |
106 | "vram=12M\0" \ |
107 | "dvimode=1024x768MR-16@60\0" \ | |
108 | "defaultdisplay=dvi\0" \ | |
cd7c5726 | 109 | "mmcdev=0\0" \ |
13d2cb98 SS |
110 | "mmcroot=/dev/mmcblk0p2 rw\0" \ |
111 | "mmcrootfstype=ext3 rootwait\0" \ | |
254973e6 SS |
112 | "nandroot=ubi0:rootfs ubi.mtd=4\0" \ |
113 | "nandrootfstype=ubifs\0" \ | |
dbba3daf | 114 | "mtdparts=" MTDPARTS_DEFAULT "\0" \ |
9d0fc811 | 115 | "mmcargs=setenv bootargs console=${console} " \ |
e6847dba | 116 | "${optargs} " \ |
5af32460 | 117 | "mpurate=${mpurate} " \ |
13d2cb98 SS |
118 | "vram=${vram} " \ |
119 | "omapfb.mode=dvi:${dvimode} " \ | |
13d2cb98 SS |
120 | "omapdss.def_disp=${defaultdisplay} " \ |
121 | "root=${mmcroot} " \ | |
122 | "rootfstype=${mmcrootfstype}\0" \ | |
9d0fc811 | 123 | "nandargs=setenv bootargs console=${console} " \ |
e6847dba | 124 | "${optargs} " \ |
5af32460 | 125 | "mpurate=${mpurate} " \ |
13d2cb98 SS |
126 | "vram=${vram} " \ |
127 | "omapfb.mode=dvi:${dvimode} " \ | |
13d2cb98 SS |
128 | "omapdss.def_disp=${defaultdisplay} " \ |
129 | "root=${nandroot} " \ | |
130 | "rootfstype=${nandrootfstype}\0" \ | |
3c92c323 AC |
131 | "loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \ |
132 | "bootscript=echo Running boot script from mmc ...; " \ | |
74de7aef | 133 | "source ${loadaddr}\0" \ |
3c92c323 AC |
134 | "loadbootenv=load mmc ${mmcdev} ${loadaddr} uEnv.txt\0" \ |
135 | "importbootenv=echo Importing environment from mmc ...; " \ | |
0b3fde11 | 136 | "env import -t ${loadaddr} ${filesize}\0" \ |
3c92c323 AC |
137 | "loaduimage=load mmc ${mmcdev} ${loadaddr} uImage\0" \ |
138 | "mmcboot=echo Booting from mmc...; " \ | |
9d0fc811 DB |
139 | "run mmcargs; " \ |
140 | "bootm ${loadaddr}\0" \ | |
3c92c323 | 141 | "loadzimage=load mmc ${mmcdev}:2 ${loadaddr} ${bootdir}/${bootfile}\0" \ |
29cc1d8e | 142 | "loadfdt=load mmc ${mmcdev}:2 ${fdtaddr} ${bootdir}/${fdtfile}\0" \ |
88d89668 AC |
143 | "loadubizimage=ubifsload ${loadaddr} ${bootdir}/${bootfile}\0" \ |
144 | "loadubifdt=ubifsload ${fdtaddr} ${bootdir}/${fdtfile}\0" \ | |
3c92c323 AC |
145 | "mmcbootfdt=echo Booting with DT from mmc ...; " \ |
146 | "run mmcargs; " \ | |
29cc1d8e | 147 | "bootz ${loadaddr} - ${fdtaddr}\0" \ |
9d0fc811 DB |
148 | "nandboot=echo Booting from nand ...; " \ |
149 | "run nandargs; " \ | |
f2565a55 SH |
150 | "if nand read ${loadaddr} linux; then " \ |
151 | "bootm ${loadaddr};" \ | |
152 | "fi;\0" \ | |
88d89668 AC |
153 | "nanddtsboot=echo Booting from nand with DTS...; " \ |
154 | "run nandargs; " \ | |
155 | "ubi part rootfs; "\ | |
156 | "ubifsmount ubi0:rootfs; "\ | |
157 | "run loadubifdt; "\ | |
158 | "run loadubizimage; "\ | |
159 | "bootz ${loadaddr} - ${fdtaddr}\0" \ | |
9d0fc811 DB |
160 | |
161 | #define CONFIG_BOOTCOMMAND \ | |
66968110 | 162 | "mmc dev ${mmcdev}; if mmc rescan; then " \ |
9d0fc811 DB |
163 | "if run loadbootscript; then " \ |
164 | "run bootscript; " \ | |
3c92c323 AC |
165 | "fi;" \ |
166 | "if run loadbootenv; then " \ | |
167 | "echo Loaded environment from ${bootenv};" \ | |
168 | "run importbootenv;" \ | |
169 | "fi;" \ | |
170 | "if test -n $uenvcmd; then " \ | |
171 | "echo Running uenvcmd ...;" \ | |
172 | "run uenvcmd;" \ | |
173 | "fi;" \ | |
174 | "if run loaduimage; then " \ | |
175 | "run mmcboot;" \ | |
176 | "fi;" \ | |
177 | "if run loadzimage; then " \ | |
115e71f7 | 178 | "if test -z \"${fdtfile}\"; then " \ |
12cc5437 AC |
179 | "setenv fdtfile omap3-${boardname}-${expansionname}.dtb;" \ |
180 | "fi;" \ | |
181 | "if run loadfdt; then " \ | |
182 | "run mmcbootfdt;" \ | |
0b3fde11 | 183 | "fi;" \ |
3c92c323 AC |
184 | "fi;" \ |
185 | "fi;" \ | |
186 | "run nandboot; " \ | |
88d89668 AC |
187 | "if test -z \"${fdtfile}\"; then "\ |
188 | "setenv fdtfile omap3-${boardname}-${expansionname}.dtb;" \ | |
189 | "fi;" \ | |
190 | "run nanddtsboot; " \ | |
9d0fc811 | 191 | |
9d0fc811 DB |
192 | /* |
193 | * Miscellaneous configurable options | |
194 | */ | |
29cc1d8e | 195 | #undef CONFIG_SYS_PROMPT |
1270ec13 | 196 | #define CONFIG_SYS_PROMPT "Overo # " |
29cc1d8e | 197 | |
9d0fc811 DB |
198 | /* memtest works on */ |
199 | #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) | |
200 | #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ | |
201 | 0x01F00000) /* 31MB */ | |
202 | ||
29cc1d8e | 203 | /* FLASH and environment organization */ |
29cc1d8e | 204 | #if defined(CONFIG_NAND) |
222a3113 | 205 | #define CONFIG_SYS_FLASH_BASE NAND_BASE |
6cbec7b3 | 206 | #endif |
9d0fc811 DB |
207 | |
208 | /* Monitor at start of flash */ | |
209 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE | |
210 | #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP | |
211 | ||
0f8d3eb9 | 212 | #define CONFIG_ENV_IS_IN_NAND |
9d0fc811 DB |
213 | #define ONENAND_ENV_OFFSET 0x240000 /* environment starts here */ |
214 | #define SMNAND_ENV_OFFSET 0x240000 /* environment starts here */ | |
215 | ||
6cbec7b3 LC |
216 | #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ |
217 | #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET | |
9d0fc811 DB |
218 | #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET |
219 | ||
29cc1d8e | 220 | /* Configure SMSC9211 ethernet */ |
df382626 | 221 | #if defined(CONFIG_CMD_NET) |
0f8d3eb9 | 222 | #define CONFIG_SMC911X |
df382626 | 223 | #define CONFIG_SMC911X_32_BIT |
0f8d3eb9 | 224 | #define CONFIG_SMC911X_BASE 0x2C000000 |
df382626 OJ |
225 | #endif /* (CONFIG_CMD_NET) */ |
226 | ||
29cc1d8e | 227 | /* Initial RAM setup */ |
31bfcf1c SS |
228 | #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 |
229 | #define CONFIG_SYS_INIT_RAM_SIZE 0x800 | |
8e40852f A |
230 | #define CONFIG_SYS_CACHELINE_SIZE 64 |
231 | ||
137703b8 | 232 | /* NAND boot config */ |
b80a6603 | 233 | #define CONFIG_SYS_NAND_BUSWIDTH_16BIT 16 |
ce170a1c | 234 | #define CONFIG_SYS_NAND_MAX_ECCPOS 56 |
137703b8 AM |
235 | #define CONFIG_SYS_NAND_5_ADDR_CYCLE |
236 | #define CONFIG_SYS_NAND_PAGE_COUNT 64 | |
237 | #define CONFIG_SYS_NAND_PAGE_SIZE 2048 | |
238 | #define CONFIG_SYS_NAND_OOBSIZE 64 | |
239 | #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) | |
240 | #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS | |
ce170a1c AC |
241 | #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, \ |
242 | 13, 14, 16, 17, 18, 19, 20, 21, 22, \ | |
243 | 23, 24, 25, 26, 27, 28, 30, 31, 32, \ | |
244 | 33, 34, 35, 36, 37, 38, 39, 40, 41, \ | |
245 | 42, 44, 45, 46, 47, 48, 49, 50, 51, \ | |
246 | 52, 53, 54, 55, 56} | |
137703b8 | 247 | #define CONFIG_SYS_NAND_ECCSIZE 512 |
ce170a1c AC |
248 | #define CONFIG_SYS_NAND_ECCBYTES 13 |
249 | #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW | |
137703b8 AM |
250 | #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE |
251 | #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 | |
434f2cfc | 252 | /* NAND: SPL falcon mode configs */ |
253 | #ifdef CONFIG_SPL_OS_BOOT | |
254 | #define CONFIG_CMD_SPL_NAND_OFS 0x240000 | |
255 | #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000 | |
256 | #define CONFIG_CMD_SPL_WRITE_SIZE 0x2000 | |
257 | #endif | |
137703b8 | 258 | |
9d0fc811 | 259 | #endif /* __CONFIG_H */ |