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7379f45a DB |
1 | /* |
2 | * (C) Copyright 2006-2008 | |
3 | * Texas Instruments. | |
4 | * Richard Woodruff <r-woodruff2@ti.com> | |
5 | * Syed Mohammed Khasim <x0khasim@ti.com> | |
6 | * Nishanth Menon <nm@ti.com> | |
7 | * | |
8 | * Configuration settings for the TI OMAP3430 Zoom MDK board. | |
9 | * | |
3765b3e7 | 10 | * SPDX-License-Identifier: GPL-2.0+ |
7379f45a DB |
11 | */ |
12 | ||
13 | #ifndef __CONFIG_H | |
14 | #define __CONFIG_H | |
7379f45a DB |
15 | |
16 | /* | |
17 | * High Level Configuration Options | |
18 | */ | |
7379f45a DB |
19 | #define CONFIG_OMAP3_ZOOM1 1 /* working with Zoom MDK Rev1 */ |
20 | ||
161d2d5e NM |
21 | #define CONFIG_NAND |
22 | #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ | |
7379f45a | 23 | #include <asm/arch/cpu.h> /* get chip and board defs */ |
987ec585 | 24 | #include <asm/arch/omap.h> |
161d2d5e NM |
25 | #include <configs/ti_omap3_common.h> |
26 | ||
27 | /* Remove SPL boot option - we do not support that on LDP yet */ | |
161d2d5e NM |
28 | #undef CONFIG_SPL_FRAMEWORK |
29 | #undef CONFIG_SPL_OS_BOOT | |
30 | ||
31 | /* Generic NAND definition conflicts with debug_base */ | |
32 | #undef CONFIG_SYS_NAND_BASE | |
7379f45a | 33 | |
6a6b62e3 SP |
34 | /* |
35 | * Display CPU and Board information | |
36 | */ | |
37 | #define CONFIG_DISPLAY_CPUINFO 1 | |
38 | #define CONFIG_DISPLAY_BOARDINFO 1 | |
39 | ||
7379f45a DB |
40 | #define CONFIG_MISC_INIT_R |
41 | ||
7379f45a DB |
42 | #define CONFIG_REVISION_TAG 1 |
43 | ||
9c44ddcc | 44 | #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ |
7379f45a DB |
45 | |
46 | /* | |
47 | * Hardware drivers | |
48 | */ | |
49 | ||
05be5a60 | 50 | /* USB */ |
95de1e2f | 51 | #define CONFIG_USB_MUSB_UDC 1 |
05be5a60 TR |
52 | #define CONFIG_USB_OMAP3 1 |
53 | #define CONFIG_TWL4030_USB 1 | |
54 | ||
55 | /* USB device configuration */ | |
56 | #define CONFIG_USB_DEVICE 1 | |
57 | #define CONFIG_USB_TTY 1 | |
58 | #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 | |
59 | /* Change these to suit your needs */ | |
60 | #define CONFIG_USBD_VENDORID 0x0451 | |
61 | #define CONFIG_USBD_PRODUCTID 0x5678 | |
62 | #define CONFIG_USBD_MANUFACTURER "Texas Instruments" | |
63 | #define CONFIG_USBD_PRODUCT_NAME "Zoom1" | |
64 | ||
4e8183b7 NM |
65 | #define MTDIDS_DEFAULT "nand0=nand" |
66 | #define MTDPARTS_DEFAULT "mtdparts=nand:512k(x-loader),"\ | |
67 | "1920k(u-boot),128k(u-boot-env),"\ | |
68 | "4m(kernel),-(fs)" | |
7379f45a | 69 | |
161d2d5e | 70 | #if defined(CONFIG_CMD_NAND) |
434f2cfc | 71 | /* NAND: SPL falcon mode configs */ |
72 | #ifdef CONFIG_SPL_OS_BOOT | |
73 | #define CONFIG_CMD_SPL_NAND_OFS 0x240000 | |
74 | #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000 | |
75 | #define CONFIG_CMD_SPL_WRITE_SIZE 0x2000 | |
76 | #endif | |
e7deec1b | 77 | #define CONFIG_CMD_NAND_LOCK_UNLOCK /* Enable lock/unlock support */ |
161d2d5e | 78 | #endif |
7379f45a | 79 | |
161d2d5e | 80 | #undef CONFIG_SYS_I2C_OMAP24XX |
6789e84e | 81 | #define CONFIG_SYS_I2C_OMAP34XX |
7379f45a | 82 | |
cd782635 TR |
83 | /* |
84 | * TWL4030 | |
85 | */ | |
2c155130 | 86 | #define CONFIG_TWL4030_LED 1 |
cd782635 | 87 | |
7379f45a DB |
88 | /* |
89 | * Board NAND Info. | |
90 | */ | |
7379f45a DB |
91 | #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ |
92 | /* to access nand */ | |
93 | #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ | |
94 | /* to access nand at */ | |
95 | /* CS0 */ | |
55f1b39f | 96 | #define CONFIG_SYS_NAND_BUSWIDTH_16BIT |
7379f45a DB |
97 | |
98 | /* Environment information */ | |
7379f45a DB |
99 | |
100 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
101 | "loadaddr=0x82000000\0" \ | |
c2e7c7b2 | 102 | "fdtaddr=0x80f80000\0" \ |
4e8183b7 | 103 | "bootfile=uImage\0" \ |
c2e7c7b2 | 104 | "fdtfile=omap3-ldp.dtb\0" \ |
4e8183b7 NM |
105 | "bootdir=/\0" \ |
106 | "bootpart=0:1\0" \ | |
05be5a60 | 107 | "usbtty=cdc_acm\0" \ |
ea467c73 | 108 | "console=ttyO2,115200n8\0" \ |
d6906cb8 | 109 | "mmcdev=0\0" \ |
7379f45a DB |
110 | "videomode=1024x768@60,vxres=1024,vyres=768\0" \ |
111 | "videospec=omapfb:vram:2M,vram:4M\0" \ | |
112 | "mmcargs=setenv bootargs console=${console} " \ | |
113 | "video=${videospec},mode:${videomode} " \ | |
114 | "root=/dev/mmcblk0p2 rw " \ | |
115 | "rootfstype=ext3 rootwait\0" \ | |
116 | "nandargs=setenv bootargs console=${console} " \ | |
117 | "video=${videospec},mode:${videomode} " \ | |
118 | "root=/dev/mtdblock4 rw " \ | |
119 | "rootfstype=jffs2\0" \ | |
d6906cb8 | 120 | "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ |
7379f45a | 121 | "bootscript=echo Running bootscript from mmc ...; " \ |
74de7aef | 122 | "source ${loadaddr}\0" \ |
4e8183b7 | 123 | "loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \ |
c2e7c7b2 NM |
124 | "loadfdt=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}\0" \ |
125 | "loadzimage=setenv bootfile zImage; if run loadimage; then run loadfdt;fi\0"\ | |
7379f45a DB |
126 | "mmcboot=echo Booting from mmc ...; " \ |
127 | "run mmcargs; " \ | |
128 | "bootm ${loadaddr}\0" \ | |
c2e7c7b2 NM |
129 | "mmczboot=echo Booting from mmc ...; " \ |
130 | "run mmcargs; " \ | |
131 | "bootz ${loadaddr} - ${fdtaddr}\0" \ | |
7379f45a DB |
132 | "nandboot=echo Booting from nand ...; " \ |
133 | "run nandargs; " \ | |
134 | "nand read ${loadaddr} 280000 400000; " \ | |
135 | "bootm ${loadaddr}\0" \ | |
136 | ||
137 | #define CONFIG_BOOTCOMMAND \ | |
66968110 | 138 | "mmc dev ${mmcdev}; if mmc rescan; then " \ |
7379f45a DB |
139 | "if run loadbootscript; then " \ |
140 | "run bootscript; " \ | |
141 | "else " \ | |
4e8183b7 | 142 | "if run loadimage; then " \ |
7379f45a | 143 | "run mmcboot; " \ |
c2e7c7b2 NM |
144 | "else if run loadzimage; then " \ |
145 | "run mmczboot; " \ | |
7379f45a | 146 | "else run nandboot; " \ |
c2e7c7b2 | 147 | "fi; fi;" \ |
7379f45a DB |
148 | "fi; " \ |
149 | "else run nandboot; fi" | |
150 | ||
7379f45a DB |
151 | /* |
152 | * Miscellaneous configurable options | |
153 | */ | |
161d2d5e NM |
154 | #define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM_1) /* memtest */ |
155 | #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_2 + \ | |
7379f45a DB |
156 | 0x01F00000) /* 31MB */ |
157 | ||
7379f45a DB |
158 | /*----------------------------------------------------------------------- |
159 | * FLASH and environment organization | |
160 | */ | |
161 | ||
162 | /* **** PISMO SUPPORT *** */ | |
6cbec7b3 | 163 | #if defined(CONFIG_CMD_NAND) |
222a3113 | 164 | #define CONFIG_SYS_FLASH_BASE NAND_BASE |
6cbec7b3 | 165 | #endif |
7379f45a DB |
166 | |
167 | /* Monitor at start of flash */ | |
168 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE | |
169 | #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP | |
170 | ||
171 | #define CONFIG_ENV_IS_IN_NAND 1 | |
172 | #define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */ | |
173 | #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */ | |
174 | ||
6cbec7b3 LC |
175 | #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ |
176 | #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET | |
7379f45a DB |
177 | #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET |
178 | ||
8e40852f A |
179 | #define CONFIG_SYS_CACHELINE_SIZE 64 |
180 | ||
9d70e772 NM |
181 | #ifdef CONFIG_CMD_NET |
182 | /* Ethernet (LAN9211 from SMSC9118 family) */ | |
183 | #define CONFIG_SMC911X | |
184 | #define CONFIG_SMC911X_32_BIT | |
185 | #define CONFIG_SMC911X_BASE DEBUG_BASE | |
186 | ||
187 | #endif | |
188 | ||
7379f45a | 189 | #endif /* __CONFIG_H */ |