[people/ms/u-boot.git] / include / configs / omap4_common.h

/*
 * (C) Copyright 2010
 * Texas Instruments Incorporated.
 * Aneesh V       <aneesh@ti.com>
 * Steve Sakoman  <steve@sakoman.com>
 *
 * TI OMAP4 common configuration settings
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#ifndef __CONFIG_OMAP4_COMMON_H
#define __CONFIG_OMAP4_COMMON_H

/*
 * High Level Configuration Options
 */
#define CONFIG_ARMV7		1	/* This is an ARM V7 CPU core */
#define CONFIG_OMAP		1	/* in a TI OMAP core */
#define CONFIG_OMAP44XX		1	/* which is a 44XX */
#define CONFIG_OMAP4430		1	/* which is in a 4430 */
#define CONFIG_ARCH_CPU_INIT

/* Get CPU defs */
#include <asm/arch/cpu.h>
#include <asm/arch/omap4.h>

/* Display CPU and Board Info */
#define CONFIG_DISPLAY_CPUINFO		1
#define CONFIG_DISPLAY_BOARDINFO	1

/* Clock Defines */
#define V_OSCK			38400000	/* Clock output from T2 */
#define V_SCLK                   V_OSCK

#undef CONFIG_USE_IRQ				/* no support for IRQs */
#define CONFIG_MISC_INIT_R

#define CONFIG_OF_LIBFDT		1

#define CONFIG_CMDLINE_TAG		1	/* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS	1
#define CONFIG_INITRD_TAG		1
#define CONFIG_REVISION_TAG		1

/*
 * Size of malloc() pool
 * Total Size Environment - 128k
 * Malloc - add 256k
 */
#define CONFIG_ENV_SIZE			(128 << 10)
#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (256 << 10))
/* Vector Base */
#define CONFIG_SYS_CA9_VECTOR_BASE	SRAM_ROM_VECT_BASE

/*
 * Hardware drivers
 */

/*
 * serial port - NS16550 compatible
 */
#define V_NS16550_CLK			48000000

#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE	(-4)
#define CONFIG_SYS_NS16550_CLK		V_NS16550_CLK
#define CONFIG_CONS_INDEX		3
#define CONFIG_SYS_NS16550_COM3		UART3_BASE

#define CONFIG_BAUDRATE			115200
#define CONFIG_SYS_BAUDRATE_TABLE	{4800, 9600, 19200, 38400, 57600,\
					115200}
/* I2C  */
#define CONFIG_HARD_I2C			1
#define CONFIG_SYS_I2C_SPEED		100000
#define CONFIG_SYS_I2C_SLAVE		1
#define CONFIG_SYS_I2C_BUS		0
#define CONFIG_SYS_I2C_BUS_SELECT	1
#define CONFIG_DRIVER_OMAP34XX_I2C	1
#define CONFIG_I2C_MULTI_BUS		1

/* TWL6030 */
#ifndef CONFIG_SPL_BUILD
#define CONFIG_TWL6030_POWER		1
#endif

/* MMC */
#define CONFIG_GENERIC_MMC		1
#define CONFIG_MMC			1
#define CONFIG_OMAP_HSMMC		1
#define CONFIG_SYS_MMC_SET_DEV		1
#define CONFIG_DOS_PARTITION		1


/* USB */
#define CONFIG_MUSB_UDC			1
#define CONFIG_USB_OMAP3		1

/* USB device configuration */
#define CONFIG_USB_DEVICE		1
#define CONFIG_USB_TTY			1
#define CONFIG_SYS_CONSOLE_IS_IN_ENV	1

/* Flash */
#define CONFIG_SYS_NO_FLASH	1

/* commands to include */
#include <config_cmd_default.h>

/* Enabled commands */
#define CONFIG_CMD_EXT2		/* EXT2 Support                 */
#define CONFIG_CMD_FAT		/* FAT support                  */
#define CONFIG_CMD_I2C		/* I2C serial bus support	*/
#define CONFIG_CMD_MMC		/* MMC support                  */

/* Disabled commands */
#undef CONFIG_CMD_NET
#undef CONFIG_CMD_NFS
#undef CONFIG_CMD_FPGA		/* FPGA configuration Support   */
#undef CONFIG_CMD_IMLS		/* List all found images        */

/*
 * Environment setup
 */

#define CONFIG_BOOTDELAY	3

#define CONFIG_ENV_OVERWRITE

#define CONFIG_EXTRA_ENV_SETTINGS \
	"loadaddr=0x82000000\0" \
	"console=ttyS2,115200n8\0" \
	"usbtty=cdc_acm\0" \
	"vram=16M\0" \
	"mmcdev=0\0" \
	"mmcroot=/dev/mmcblk0p2 rw\0" \
	"mmcrootfstype=ext3 rootwait\0" \
	"mmcargs=setenv bootargs console=${console} " \
		"vram=${vram} " \
		"root=${mmcroot} " \
		"rootfstype=${mmcrootfstype}\0" \
	"loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
	"bootscript=echo Running bootscript from mmc${mmcdev} ...; " \
		"source ${loadaddr}\0" \
	"loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
	"mmcboot=echo Booting from mmc${mmcdev} ...; " \
		"run mmcargs; " \
		"bootm ${loadaddr}\0" \

#define CONFIG_BOOTCOMMAND \
	"if mmc rescan ${mmcdev}; then " \
		"if run loadbootscript; then " \
			"run bootscript; " \
		"else " \
			"if run loaduimage; then " \
				"run mmcboot; " \
			"fi; " \
		"fi; " \
	"fi"

#define CONFIG_AUTO_COMPLETE		1

/*
 * Miscellaneous configurable options
 */

#define CONFIG_SYS_LONGHELP	/* undef to save memory */
#define CONFIG_SYS_HUSH_PARSER	/* use "hush" command parser */
#define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
#define CONFIG_SYS_CBSIZE		512
/* Print Buffer Size */
#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
					sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_MAXARGS		16
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE		(CONFIG_SYS_CBSIZE)

/*
 * memtest setup
 */
#define CONFIG_SYS_MEMTEST_START	0x80000000
#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + (32 << 20))

/* Default load address */
#define CONFIG_SYS_LOAD_ADDR		0x80000000

/* Use General purpose timer 1 */
#define CONFIG_SYS_TIMERBASE		GPT2_BASE
#define CONFIG_SYS_PTV			2	/* Divisor: 2^(PTV+1) => 8 */
#define CONFIG_SYS_HZ			1000

/*
 * Stack sizes
 *
 * The stack sizes are set up in start.S using the settings below
 */
#define CONFIG_STACKSIZE	(128 << 10)	/* Regular stack */
#ifdef CONFIG_USE_IRQ
#define CONFIG_STACKSIZE_IRQ	(4 << 10)	/* IRQ stack */
#define CONFIG_STACKSIZE_FIQ	(4 << 10)	/* FIQ stack */
#endif

/*
 * SDRAM Memory Map
 * Even though we use two CS all the memory
 * is mapped to one contiguous block
 */
#define CONFIG_NR_DRAM_BANKS	1

#define CONFIG_SYS_SDRAM_BASE		0x80000000
#define CONFIG_SYS_INIT_RAM_ADDR	0x4030D800
#define CONFIG_SYS_INIT_RAM_SIZE	0x800
#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
					 CONFIG_SYS_INIT_RAM_SIZE - \
					 GENERATED_GBL_DATA_SIZE)

#ifndef CONFIG_SYS_L2CACHE_OFF
#define CONFIG_SYS_L2_PL310		1
#define CONFIG_SYS_PL310_BASE	0x48242000
#endif

/* Defines for SDRAM init */
#define CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS

#ifndef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
#define CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION
#define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS
#endif

/* Defines for SPL */
#define CONFIG_SPL
#define CONFIG_SPL_TEXT_BASE		0x40304350
#define CONFIG_SPL_MAX_SIZE		(38 * 1024)
#define CONFIG_SPL_STACK		LOW_LEVEL_SRAM_STACK

#define CONFIG_SPL_BSS_START_ADDR	0x80000000
#define CONFIG_SPL_BSS_MAX_SIZE		0x80000		/* 512 KB */
/*
 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
 * 64 bytes before this address should be set aside for u-boot.img's
 * header. That is 0x800FFFC0--0x80100000 should not be used for any
 * other needs.
 */
#define CONFIG_SYS_TEXT_BASE		0x80100000
#define CONFIG_SYS_SPL_MALLOC_START	0x80200000
#define CONFIG_SYS_SPL_MALLOC_SIZE	0x100000	/* 1 MB */


#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	0x300 /* address 0x60000 */
#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	0x200 /* 256 KB */
#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION	1
#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME	"u-boot.img"

#define CONFIG_SPL_LIBCOMMON_SUPPORT
#define CONFIG_SPL_LIBDISK_SUPPORT
#define CONFIG_SPL_I2C_SUPPORT
#define CONFIG_SPL_MMC_SUPPORT
#define CONFIG_SPL_FAT_SUPPORT
#define CONFIG_SPL_LIBGENERIC_SUPPORT
#define CONFIG_SPL_SERIAL_SUPPORT
#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/omap-common/u-boot-spl.lds"

#endif /* __CONFIG_OMAP4_COMMON_H */
Commit	Line	Data
16dc702f A	1	/*
	2	* (C) Copyright 2010
	3	* Texas Instruments Incorporated.
	4	* Aneesh V <aneesh@ti.com>
	5	* Steve Sakoman <steve@sakoman.com>
	6	*
	7	* TI OMAP4 common configuration settings
	8	*
	9	* See file CREDITS for list of people who contributed to this
	10	* project.
	11	*
	12	* This program is free software; you can redistribute it and/or
	13	* modify it under the terms of the GNU General Public License as
	14	* published by the Free Software Foundation; either version 2 of
	15	* the License, or (at your option) any later version.
	16	*
	17	* This program is distributed in the hope that it will be useful,
	18	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	19	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	20	* GNU General Public License for more details.
	21	*
	22	* You should have received a copy of the GNU General Public License
	23	* along with this program; if not, write to the Free Software
	24	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	25	* MA 02111-1307 USA
	26	*/
	27
	28	#ifndef __CONFIG_OMAP4_COMMON_H
	29	#define __CONFIG_OMAP4_COMMON_H
	30
	31	/*
	32	* High Level Configuration Options
	33	*/
	34	#define CONFIG_ARMV7 1 /* This is an ARM V7 CPU core */
	35	#define CONFIG_OMAP 1 /* in a TI OMAP core */
	36	#define CONFIG_OMAP44XX 1 /* which is a 44XX */
	37	#define CONFIG_OMAP4430 1 /* which is in a 4430 */
	38	#define CONFIG_ARCH_CPU_INIT
	39
	40	/* Get CPU defs */
	41	#include <asm/arch/cpu.h>
	42	#include <asm/arch/omap4.h>
	43
	44	/* Display CPU and Board Info */
	45	#define CONFIG_DISPLAY_CPUINFO 1
	46	#define CONFIG_DISPLAY_BOARDINFO 1
	47
	48	/* Clock Defines */
	49	#define V_OSCK 38400000 /* Clock output from T2 */
	50	#define V_SCLK V_OSCK
	51
	52	#undef CONFIG_USE_IRQ /* no support for IRQs */
	53	#define CONFIG_MISC_INIT_R
	54
	55	#define CONFIG_OF_LIBFDT 1
	56
	57	#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
	58	#define CONFIG_SETUP_MEMORY_TAGS 1
	59	#define CONFIG_INITRD_TAG 1
	60	#define CONFIG_REVISION_TAG 1
	61
	62	/*
	63	* Size of malloc() pool
	64	* Total Size Environment - 128k
65	* Malloc - add 256k
66	*/
67	#define CONFIG_ENV_SIZE (128 << 10)
68	#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (256 << 10))
69	/* Vector Base */
70	#define CONFIG_SYS_CA9_VECTOR_BASE SRAM_ROM_VECT_BASE
71
72	/*
73	* Hardware drivers
74	*/
75
76	/*
77	* serial port - NS16550 compatible
78	*/
79	#define V_NS16550_CLK 48000000
80
81	#define CONFIG_SYS_NS16550
82	#define CONFIG_SYS_NS16550_SERIAL
83	#define CONFIG_SYS_NS16550_REG_SIZE (-4)
84	#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
85	#define CONFIG_CONS_INDEX 3
86	#define CONFIG_SYS_NS16550_COM3 UART3_BASE
87
88	#define CONFIG_BAUDRATE 115200
89	#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
90	115200}
91	/* I2C */
92	#define CONFIG_HARD_I2C 1
93	#define CONFIG_SYS_I2C_SPEED 100000
94	#define CONFIG_SYS_I2C_SLAVE 1
95	#define CONFIG_SYS_I2C_BUS 0
96	#define CONFIG_SYS_I2C_BUS_SELECT 1
97	#define CONFIG_DRIVER_OMAP34XX_I2C 1
98	#define CONFIG_I2C_MULTI_BUS 1
99
100	/* TWL6030 */
14fa2dd0	101	#ifndef CONFIG_SPL_BUILD
16dc702f	102	#define CONFIG_TWL6030_POWER 1
14fa2dd0	103	#endif
16dc702f A	104
	105	/* MMC */
	106	#define CONFIG_GENERIC_MMC 1
	107	#define CONFIG_MMC 1
	108	#define CONFIG_OMAP_HSMMC 1
	109	#define CONFIG_SYS_MMC_SET_DEV 1
	110	#define CONFIG_DOS_PARTITION 1
	111
	112
	113	/* USB */
	114	#define CONFIG_MUSB_UDC 1
	115	#define CONFIG_USB_OMAP3 1
	116
	117	/* USB device configuration */
	118	#define CONFIG_USB_DEVICE 1
	119	#define CONFIG_USB_TTY 1
	120	#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
	121
	122	/* Flash */
	123	#define CONFIG_SYS_NO_FLASH 1
	124
	125	/* commands to include */
	126	#include <config_cmd_default.h>
	127
	128	/* Enabled commands */
	129	#define CONFIG_CMD_EXT2 /* EXT2 Support */
	130	#define CONFIG_CMD_FAT /* FAT support */
	131	#define CONFIG_CMD_I2C /* I2C serial bus support */
	132	#define CONFIG_CMD_MMC /* MMC support */
	133
	134	/* Disabled commands */
	135	#undef CONFIG_CMD_NET
	136	#undef CONFIG_CMD_NFS
	137	#undef CONFIG_CMD_FPGA /* FPGA configuration Support */
	138	#undef CONFIG_CMD_IMLS /* List all found images */
	139
	140	/*
	141	* Environment setup
	142	*/
	143
	144	#define CONFIG_BOOTDELAY 3
	145
	146	#define CONFIG_ENV_OVERWRITE
	147
	148	#define CONFIG_EXTRA_ENV_SETTINGS \
	149	"loadaddr=0x82000000\0" \
	150	"console=ttyS2,115200n8\0" \
	151	"usbtty=cdc_acm\0" \
	152	"vram=16M\0" \
	153	"mmcdev=0\0" \
	154	"mmcroot=/dev/mmcblk0p2 rw\0" \
	155	"mmcrootfstype=ext3 rootwait\0" \
	156	"mmcargs=setenv bootargs console=${console} " \
	157	"vram=${vram} " \
	158	"root=${mmcroot} " \
	159	"rootfstype=${mmcrootfstype}\0" \
	160	"loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
	161	"bootscript=echo Running bootscript from mmc${mmcdev} ...; " \
	162	"source ${loadaddr}\0" \
	163	"loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
	164	"mmcboot=echo Booting from mmc${mmcdev} ...; " \
	165	"run mmcargs; " \
	166	"bootm ${loadaddr}\0" \
	167
168	#define CONFIG_BOOTCOMMAND \
169	"if mmc rescan ${mmcdev}; then " \
170	"if run loadbootscript; then " \
171	"run bootscript; " \
172	"else " \
173	"if run loaduimage; then " \
174	"run mmcboot; " \
175	"fi; " \
176	"fi; " \
177	"fi"
178
179	#define CONFIG_AUTO_COMPLETE 1
180
181	/*
182	* Miscellaneous configurable options
183	*/
184
185	#define CONFIG_SYS_LONGHELP /* undef to save memory */
186	#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
187	#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
188	#define CONFIG_SYS_CBSIZE 512
189	/* Print Buffer Size */
190	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
191	sizeof(CONFIG_SYS_PROMPT) + 16)
192	#define CONFIG_SYS_MAXARGS 16
193	/* Boot Argument Buffer Size */
194	#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
195
196	/*
197	* memtest setup
198	*/
199	#define CONFIG_SYS_MEMTEST_START 0x80000000
200	#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (32 << 20))
201
202	/* Default load address */
203	#define CONFIG_SYS_LOAD_ADDR 0x80000000
204
205	/* Use General purpose timer 1 */
206	#define CONFIG_SYS_TIMERBASE GPT2_BASE
207	#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
208	#define CONFIG_SYS_HZ 1000
209
210	/*
211	* Stack sizes
212	*
213	* The stack sizes are set up in start.S using the settings below
214	*/
215	#define CONFIG_STACKSIZE (128 << 10) /* Regular stack */
216	#ifdef CONFIG_USE_IRQ
217	#define CONFIG_STACKSIZE_IRQ (4 << 10) /* IRQ stack */
218	#define CONFIG_STACKSIZE_FIQ (4 << 10) /* FIQ stack */
219	#endif
220
221	/*
222	* SDRAM Memory Map
223	* Even though we use two CS all the memory
224	* is mapped to one contiguous block
225	*/
226	#define CONFIG_NR_DRAM_BANKS 1
227
228	#define CONFIG_SYS_SDRAM_BASE 0x80000000
229	#define CONFIG_SYS_INIT_RAM_ADDR 0x4030D800
230	#define CONFIG_SYS_INIT_RAM_SIZE 0x800
231	#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
232	CONFIG_SYS_INIT_RAM_SIZE - \
233	GENERATED_GBL_DATA_SIZE)
234
235	#ifndef CONFIG_SYS_L2CACHE_OFF
236	#define CONFIG_SYS_L2_PL310 1
237	#define CONFIG_SYS_PL310_BASE 0x48242000
238	#endif
239
240	/* Defines for SDRAM init */
8e70691a S	241	#define CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
8e70691a S	242
16dc702f A	243	#ifndef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
	244	#define CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION
	245	#define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS
	246	#endif
	247
	248	/* Defines for SPL */
	249	#define CONFIG_SPL
	250	#define CONFIG_SPL_TEXT_BASE 0x40304350
	251	#define CONFIG_SPL_MAX_SIZE (38 * 1024)
	252	#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
	253
	254	#define CONFIG_SPL_BSS_START_ADDR 0x80000000
	255	#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
2d01dd95 A	256	/*
	257	* 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
	258	* 64 bytes before this address should be set aside for u-boot.img's
	259	* header. That is 0x800FFFC0--0x80100000 should not be used for any
	260	* other needs.
	261	*/
	262	#define CONFIG_SYS_TEXT_BASE 0x80100000
	263	#define CONFIG_SYS_SPL_MALLOC_START 0x80200000
	264	#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */
	265
16dc702f A	266
	267	#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
	268	#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
	269	#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1
	270	#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img"
	271
	272	#define CONFIG_SPL_LIBCOMMON_SUPPORT
	273	#define CONFIG_SPL_LIBDISK_SUPPORT
	274	#define CONFIG_SPL_I2C_SUPPORT
	275	#define CONFIG_SPL_MMC_SUPPORT
	276	#define CONFIG_SPL_FAT_SUPPORT
	277	#define CONFIG_SPL_LIBGENERIC_SUPPORT
	278	#define CONFIG_SPL_SERIAL_SUPPORT
	279	#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/omap-common/u-boot-spl.lds"
	280
16dc702f	281	#endif /* __CONFIG_OMAP4_COMMON_H */