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c57cca25 SS |
1 | /* |
2 | * (C) Copyright 2010 | |
3 | * Texas Instruments Incorporated. | |
4 | * Steve Sakoman <steve@sakoman.com> | |
5 | * | |
6 | * Configuration settings for the TI OMAP4 Panda board. | |
7 | * | |
8 | * See file CREDITS for list of people who contributed to this | |
9 | * project. | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or | |
12 | * modify it under the terms of the GNU General Public License as | |
13 | * published by the Free Software Foundation; either version 2 of | |
14 | * the License, or (at your option) any later version. | |
15 | * | |
16 | * This program is distributed in the hope that it will be useful, | |
17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
19 | * GNU General Public License for more details. | |
20 | * | |
21 | * You should have received a copy of the GNU General Public License | |
22 | * along with this program; if not, write to the Free Software | |
23 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
24 | * MA 02111-1307 USA | |
25 | */ | |
26 | ||
27 | #ifndef __CONFIG_H | |
28 | #define __CONFIG_H | |
29 | ||
30 | /* | |
31 | * High Level Configuration Options | |
32 | */ | |
33 | #define CONFIG_ARMV7 1 /* This is an ARM V7 CPU core */ | |
34 | #define CONFIG_OMAP 1 /* in a TI OMAP core */ | |
35 | #define CONFIG_OMAP44XX 1 /* which is a 44XX */ | |
36 | #define CONFIG_OMAP4430 1 /* which is in a 4430 */ | |
37 | #define CONFIG_PANDA 1 /* working with Panda */ | |
2ad853c3 | 38 | #define CONFIG_ARCH_CPU_INIT |
c57cca25 SS |
39 | |
40 | /* Get CPU defs */ | |
41 | #include <asm/arch/cpu.h> | |
42 | #include <asm/arch/omap4.h> | |
43 | ||
44 | /* Display CPU and Board Info */ | |
45 | #define CONFIG_DISPLAY_CPUINFO 1 | |
46 | #define CONFIG_DISPLAY_BOARDINFO 1 | |
47 | ||
c57cca25 SS |
48 | /* Clock Defines */ |
49 | #define V_OSCK 38400000 /* Clock output from T2 */ | |
50 | #define V_SCLK V_OSCK | |
51 | ||
52 | #undef CONFIG_USE_IRQ /* no support for IRQs */ | |
53 | #define CONFIG_MISC_INIT_R | |
54 | ||
55 | #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ | |
56 | #define CONFIG_SETUP_MEMORY_TAGS 1 | |
57 | #define CONFIG_INITRD_TAG 1 | |
58 | #define CONFIG_REVISION_TAG 1 | |
59 | ||
2fa8ca98 GL |
60 | #define CONFIG_OF_LIBFDT 1 |
61 | ||
c57cca25 SS |
62 | /* |
63 | * Size of malloc() pool | |
64 | * Total Size Environment - 256k | |
65 | * Malloc - add 256k | |
66 | */ | |
67 | #define CONFIG_ENV_SIZE (256 << 10) | |
68 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (256 << 10)) | |
c57cca25 SS |
69 | /* Vector Base */ |
70 | #define CONFIG_SYS_CA9_VECTOR_BASE SRAM_ROM_VECT_BASE | |
71 | ||
72 | /* | |
73 | * Hardware drivers | |
74 | */ | |
75 | ||
76 | /* | |
77 | * serial port - NS16550 compatible | |
78 | */ | |
79 | #define V_NS16550_CLK 48000000 | |
80 | ||
81 | #define CONFIG_SYS_NS16550 | |
82 | #define CONFIG_SYS_NS16550_SERIAL | |
83 | #define CONFIG_SYS_NS16550_REG_SIZE (-4) | |
84 | #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK | |
85 | #define CONFIG_CONS_INDEX 3 | |
86 | #define CONFIG_SYS_NS16550_COM3 UART3_BASE | |
87 | ||
88 | #define CONFIG_ENV_IS_NOWHERE | |
c57cca25 SS |
89 | #define CONFIG_BAUDRATE 115200 |
90 | #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ | |
91 | 115200} | |
92 | ||
93 | /* I2C */ | |
94 | #define CONFIG_HARD_I2C 1 | |
95 | #define CONFIG_SYS_I2C_SPEED 100000 | |
96 | #define CONFIG_SYS_I2C_SLAVE 1 | |
97 | #define CONFIG_SYS_I2C_BUS 0 | |
98 | #define CONFIG_SYS_I2C_BUS_SELECT 1 | |
99 | #define CONFIG_DRIVER_OMAP34XX_I2C 1 | |
100 | #define CONFIG_I2C_MULTI_BUS 1 | |
101 | ||
516799f6 SS |
102 | /* TWL6030 */ |
103 | #define CONFIG_TWL6030_POWER 1 | |
104 | ||
c57cca25 | 105 | /* MMC */ |
7e982c95 | 106 | #define CONFIG_GENERIC_MMC 1 |
c57cca25 | 107 | #define CONFIG_MMC 1 |
7e982c95 | 108 | #define CONFIG_OMAP_HSMMC 1 |
c57cca25 SS |
109 | #define CONFIG_SYS_MMC_SET_DEV 1 |
110 | #define CONFIG_DOS_PARTITION 1 | |
111 | ||
cbd7b09c SS |
112 | /* USB */ |
113 | #define CONFIG_MUSB_UDC 1 | |
114 | #define CONFIG_USB_OMAP3 1 | |
115 | ||
116 | /* USB device configuration */ | |
117 | #define CONFIG_USB_DEVICE 1 | |
118 | #define CONFIG_USB_TTY 1 | |
119 | #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 | |
cbd7b09c | 120 | |
c57cca25 SS |
121 | /* Flash */ |
122 | #define CONFIG_SYS_NO_FLASH 1 | |
123 | ||
124 | /* commands to include */ | |
125 | #include <config_cmd_default.h> | |
126 | ||
127 | /* Enabled commands */ | |
128 | #define CONFIG_CMD_EXT2 /* EXT2 Support */ | |
129 | #define CONFIG_CMD_FAT /* FAT support */ | |
130 | #define CONFIG_CMD_I2C /* I2C serial bus support */ | |
131 | #define CONFIG_CMD_MMC /* MMC support */ | |
132 | ||
133 | /* Disabled commands */ | |
134 | #undef CONFIG_CMD_NET | |
8721e95b | 135 | #undef CONFIG_CMD_NFS |
c57cca25 SS |
136 | #undef CONFIG_CMD_FPGA /* FPGA configuration Support */ |
137 | #undef CONFIG_CMD_IMLS /* List all found images */ | |
138 | ||
c57cca25 SS |
139 | /* |
140 | * Environment setup | |
141 | */ | |
142 | ||
1b03eede SS |
143 | #define CONFIG_BOOTDELAY 3 |
144 | ||
c57cca25 SS |
145 | #define CONFIG_ENV_OVERWRITE |
146 | ||
147 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
148 | "loadaddr=0x82000000\0" \ | |
149 | "console=ttyS2,115200n8\0" \ | |
cbd7b09c | 150 | "usbtty=cdc_acm\0" \ |
1b03eede | 151 | "vram=16M\0" \ |
7e982c95 | 152 | "mmcdev=0\0" \ |
c57cca25 SS |
153 | "mmcroot=/dev/mmcblk0p2 rw\0" \ |
154 | "mmcrootfstype=ext3 rootwait\0" \ | |
155 | "mmcargs=setenv bootargs console=${console} " \ | |
1b03eede | 156 | "vram=${vram} " \ |
c57cca25 SS |
157 | "root=${mmcroot} " \ |
158 | "rootfstype=${mmcrootfstype}\0" \ | |
159 | "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ | |
160 | "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \ | |
161 | "source ${loadaddr}\0" \ | |
162 | "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \ | |
163 | "mmcboot=echo Booting from mmc${mmcdev} ...; " \ | |
164 | "run mmcargs; " \ | |
165 | "bootm ${loadaddr}\0" \ | |
166 | ||
167 | #define CONFIG_BOOTCOMMAND \ | |
7e982c95 | 168 | "if mmc rescan ${mmcdev}; then " \ |
c57cca25 SS |
169 | "if run loadbootscript; then " \ |
170 | "run bootscript; " \ | |
171 | "else " \ | |
172 | "if run loaduimage; then " \ | |
173 | "run mmcboot; " \ | |
c57cca25 SS |
174 | "fi; " \ |
175 | "fi; " \ | |
176 | "fi" | |
177 | ||
178 | #define CONFIG_AUTO_COMPLETE 1 | |
179 | ||
180 | /* | |
181 | * Miscellaneous configurable options | |
182 | */ | |
183 | ||
184 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ | |
185 | #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ | |
186 | #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " | |
187 | #define CONFIG_SYS_PROMPT "Panda # " | |
188 | #define CONFIG_SYS_CBSIZE 256 | |
189 | /* Print Buffer Size */ | |
190 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ | |
191 | sizeof(CONFIG_SYS_PROMPT) + 16) | |
192 | #define CONFIG_SYS_MAXARGS 16 | |
193 | /* Boot Argument Buffer Size */ | |
194 | #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) | |
195 | ||
196 | /* | |
197 | * memtest setup | |
198 | */ | |
199 | #define CONFIG_SYS_MEMTEST_START 0x80000000 | |
200 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (32 << 20)) | |
201 | ||
202 | /* Default load address */ | |
203 | #define CONFIG_SYS_LOAD_ADDR 0x80000000 | |
204 | ||
205 | /* Use General purpose timer 1 */ | |
674e0b21 | 206 | #define CONFIG_SYS_TIMERBASE GPT2_BASE |
c57cca25 SS |
207 | #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ |
208 | #define CONFIG_SYS_HZ 1000 | |
209 | ||
210 | /* | |
211 | * Stack sizes | |
212 | * | |
213 | * The stack sizes are set up in start.S using the settings below | |
214 | */ | |
215 | #define CONFIG_STACKSIZE (128 << 10) /* Regular stack */ | |
216 | #ifdef CONFIG_USE_IRQ | |
217 | #define CONFIG_STACKSIZE_IRQ (4 << 10) /* IRQ stack */ | |
218 | #define CONFIG_STACKSIZE_FIQ (4 << 10) /* FIQ stack */ | |
219 | #endif | |
220 | ||
221 | /* | |
222 | * SDRAM Memory Map | |
223 | * Even though we use two CS all the memory | |
224 | * is mapped to one contiguous block | |
225 | */ | |
226 | #define CONFIG_NR_DRAM_BANKS 1 | |
227 | ||
57b512b2 | 228 | #define CONFIG_SYS_SDRAM_BASE 0x80000000 |
31bfcf1c SS |
229 | #define CONFIG_SYS_INIT_RAM_ADDR 0x4030D800 |
230 | #define CONFIG_SYS_INIT_RAM_SIZE 0x800 | |
231 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ | |
232 | CONFIG_SYS_INIT_RAM_SIZE - \ | |
233 | GENERATED_GBL_DATA_SIZE) | |
57b512b2 | 234 | |
8b457fa8 A |
235 | #ifndef CONFIG_SYS_L2CACHE_OFF |
236 | #define CONFIG_SYS_L2_PL310 1 | |
237 | #define CONFIG_SYS_PL310_BASE 0x48242000 | |
238 | #endif | |
239 | ||
c57cca25 | 240 | #endif /* __CONFIG_H */ |